Abstract: A buffering apparatus for buffering context arrays of a multi-tile encoded picture having a plurality of tiles includes a first buffer and a second buffer. The first buffer is arranged to buffer a first context array referenced for performing entropy decoding upon a first tile of the multi-tile encoded picture. The second buffer is arranged to buffer a second context array referenced for performing entropy decoding upon a second tile of the multi-tile encoded picture. When the first tile is currently decoded according to the first context array buffered in the first buffer, the second context array is buffered in the second buffer.

Abstract: An exemplary buffering apparatus for buffering a multi-partition video/image bitstream which transmits a plurality of compressed frames each having a plurality of partitions includes a first bitstream buffer and a second bitstream buffer. The first bitstream buffer is arranged to buffer data of a first partition of the partitions of a specific compressed frame. The second bitstream buffer is arranged to buffer data of a second partition of the partitions of the specific compressed frame.

Abstract: An apparatus and method for high-throughput entropy decoding in a video decoder are disclosed. The apparatus comprises an arithmetic decoding processing circuitry and a variable-length decoder (VLD). The arithmetic decoding processing circuitry receives a video bitstream through a bitstream input, applies arithmetic decoding to at least a portion of the video bitstream to derive one or more arithmetic-decoded binary strings containing no arithmetic encoded binary string, and stores the arithmetic-decoded binary strings in the storage device. The variable-length decoder (VLD) is coupled to the arithmetic decoding processing circuitry, the storage device and a VLD output.

Abstract: A syntax parsing apparatus includes a plurality of syntax parsing circuits and a dispatcher. Each of the syntax parsing circuits has at least entropy decoding capability. The syntax parsing circuits generate a plurality of entropy decoding results of a plurality of image regions within a same frame, respectively. The dispatcher assigns bitstream start points of the image regions to the syntax parsing circuits, and triggers the syntax parsing circuits to start entropy decoding, respectively.

Abstract: An exemplary video decoding apparatus includes a first decoding unit configured for decoding a first encoded block to generate first residual values, a first detecting unit configured for detecting whether all of the first residual values have a same first value, a first processing circuit configured for processing the first residual values to generate first processed residual values, and a second processing circuit configured for generating a decoded block corresponding to the first encoded block. When all of the first residual values have the same first value, the first detecting unit controls the second processing circuit to generate the decoded block without referring to the first processed residual values.

Abstract: An apparatus for multi-standard bin decoding in a video decoder for decoding two video coded in two different video coding standards is disclosed. The apparatus includes a first bin decoder to decode one or more first bin strings, a second bin decoder to decode one or more second bin strings, a standard change control module coupled to the first bin decoder and the second bin decoder and a system controller coupled to the standard change control module, the first bin decoder and the second bin decoder. The standard change control module or the system controller selects either a next slice or picture to be decoded by the first bin decoder or the second bin decoder based on one or more control parameters including the decoding time information.

Abstract: An apparatus for multi-standard Intra prediction decoding in a video decoder for decoding two video streams coded in two different video coding standards is disclosed. The apparatus comprises a first Intra prediction decoder to decode a first bitstream comprising one or more first Intra prediction coded blocks, and a second Intra prediction decoder to decode a second bitstream comprising one or more second Intra prediction coded blocks. The first Intra prediction coded blocks are coded according to a first video coding standard and the second Intra prediction coded blocks are coded according to a second video coding standard. The first Intra prediction decoder and the second Intra prediction decoder are arranged to perform Intra prediction decoding on the two video streams simultaneously by decoding the two video streams in an interleaved manner at a picture level, slice level, or largest coding unit (LCU)/macroblock (MB) level.

Abstract: A method, apparatus and computer readable medium storing a corresponding computer program for decoding a video bitstream based on multiple decoder cores are disclosed. In one embodiment of the present invention, the method arranges multiple decoder cores to decode one or more frames from a video bitstream using mixed level parallel decoding. The multiple decoder cores are arranged into groups of multiple decoder cores for parallel decoding one or more frames by using one group of multiple decoder cores for said one or more frames, wherein each group of multiple decoder cores comprises one or more decoder cores. The number of frames to be decoded in the mixed level parallel decoding or which frames to be decoded in the mixed level parallel decoding is adaptively determined.

Abstract: A multi-core decoder system and an associated method use a decoding progress synchronizer to reduce bandwidth consumption for decoding a video bitstream is disclosed. In one embodiment of the present invention, the multi-core decoder system includes a shared reference data buffer coupled to the multiple decoder cores and an external memory. The shared reference data buffer stores reference data received from the external memory and provides the reference data the multiple decoder cores for decoding video data. The multi-core decoder system also includes one or more decoding progress synchronizers coupled to the multiple decoder cores to detect decoding-progress information associated with the multiple decoder cores or status information of the shared reference data buffer, and to control decoding progress for the multiple decoder cores.

Abstract: An exemplary video decoding apparatus includes a first decoding unit configured for decoding a first encoded block to generate first residual values, a first detecting unit configured for detecting whether all of the first residual values have a same first value, a first processing circuit configured for processing the first residual values to generate first processed residual values, and a second processing circuit configured for generating a decoded block corresponding to the first encoded block. When all of the first residual values have the same first value, the first detecting unit controls the second processing circuit to generate the decoded block without referring to the first processed residual values.

Abstract: A video decoding method for decoding a bit stream to a plurality of frames, applied in a video decoding system, includes: determining whether a size of a current picture is equal to that of a next picture according to the bit stream; scaling a corresponding reference frame for the next picture to generate a scaled frame when the size of the current picture is not equal to that of the next picture; and storing the scaled frame in a first buffer of a storage unit, wherein at least a portion of a first frame originally stored in the first buffer is used; wherein when it is determined that the size of the current picture is not equal to that of the next picture, the next picture is encoded in the bit stream in a mode that the scaled corresponding reference frame is required for decoding the next picture.

Abstract: A video processing apparatus includes a first processing circuit, a second processing circuit, and a control circuit. The first processing circuit performs a first processing operation. The second processing circuit performs a second processing operation different from the first processing operation. The control circuit generates at least one output coding unit to the second processing circuit according to an input coding unit generated from the first processing circuit, wherein the control circuit checks a size of the input coding unit to selectively split the input coding unit into a plurality of output coding units.

Abstract: A decoding apparatus has an arithmetic decoder and a controller. A counter logic of the controller generates a first statistics result according to a first syntax element decoding result. A control logic of the controller instructs the arithmetic decoder to perform a first scan procedure at least once to generate the first syntax element decoding result of transform coefficients of a transform coefficient block, controls a repetition number of a second scan procedure based at least partly on the first statistics result, and instructs the arithmetic decoder to perform the second scan procedure at least once to generate a second syntax element decoding result of the transform coefficients. The first scan procedure decodes a first coded syntax element of one transform coefficient when performed by the arithmetic decoder once. The second scan procedure decodes a second coded syntax element of one transform coefficient when performed by the arithmetic decoder once.

Abstract: One exemplary video processing apparatus includes a control circuit and a size selection circuit. The control circuit determines picture boundary information. The size selection circuit refers to at least the picture boundary information to select a size for a block associated with encoding of a picture, wherein selection of the size is constrained by the picture boundary information to ensure that the block with the selected size is not across a picture boundary of the picture.

Abstract: A video processing apparatus includes a reconstruct circuit, a storage device, and an intra prediction circuit. The reconstruct circuit generates reconstructed pixels of a first block of a picture. The storage device at least stores a portion of the reconstructed pixels of the first block, wherein a capacity of the storage device is smaller than a reconstructed data size of the picture. The intra prediction circuit performs intra prediction of a second block of the picture based at least partly on pixel data obtained from the storage device.

Abstract: A count table maintenance apparatus for maintaining a count table referenced to apply a backward adaptation to a probability table. The count table maintenance apparatus includes a count data access interface, at least one buffer, and at least one count data updating circuit. The count data access interface determines a read address and a write address of the storage apparatus. The at least one buffer buffers at least one input count data, wherein the at least one input count data is derived from count data read from the count table according to the read address. The at least one count data updating circuit updates the at least one input count data read from the at least one buffer to generate at least one updated count data, and store the at least one updated count data into the storage apparatus according to the write address.

Abstract: A transmitter device includes a processing unit and a compression unit. The processing unit obtains a branch of data and partitions the branch of data into a plurality of snippets. Each snippet includes a group of data. The compression unit compresses each snippet into a plurality of packets according to value of each datum included in the corresponding snippet. The compression unit compares the value of each datum with a first threshold value to generate a first packet. The first packet includes first information indicating which data included in the corresponding snippet has the corresponding value not equal to the first threshold value. The compression unit further generates the remaining packets according to the first information.

Abstract: A method for read pointer maintenance of a buffering apparatus, which is arranged to buffer data of a multi-tile encoded picture having a plurality of tiles included therein, includes the following steps: judging if decoding of a first tile of the multi-tile encoded picture encounters a tile boundary of the first tile; and when it is judged that the tile boundary of the first tile is encountered, storing a currently used read pointer into a pointer buffer, and loading a selected read pointer from the pointer buffer to act as the currently used read pointer.

Abstract: A dental positioning stent for drilling an implant hole and a manufacturing method, a using method and components for the same are provided. The manufacturing method includes: slicing a tooth mold and a false tooth model along a preset slice plane; fixing two markers in the preset slice plane on two sides of the false tooth model respectively; covering the markers and the false tooth model with a shaping agent to form a positioning stent; putting the positioning stent on the teeth in a mouth to perform tomography imaging to acquire a slice image of the preset slice plane; mounting a positioning aid having a positioning hole in the positioning stent according to the slice image pasted up on the tooth mold to guide an initial drill. A dental positioning stent for tomography imaging, and a manufacturing method, a using method, and components thereof are provided.

Abstract: A method for read pointer maintenance of a buffering apparatus, which is arranged to buffer data of a multi-tile encoded picture having a plurality of tiles included therein, includes the following steps: judging if decoding of a first tile of the multi-tile encoded picture encounters a tile boundary of the first tile; and when it is judged that the tile boundary of the first tile is encountered, storing a currently used read pointer into a pointer buffer, and loading a selected read pointer from the pointer buffer to act as the currently used read pointer.