Abstract: A package comprises a first unit including a semiconductor body, a hole, an isolation layer, a conductive layer and a solder. The semiconductor body has a first surface having a pad and a protection layer exposing the pad. The hole penetrates the semiconductor body. The isolation layer is disposed on the side wall of the hole. The conductive layer covers the pad, a part of the protection layer, and the isolation layer. The lower end of the conductive layer extends to below a second surface of the semiconductor body. The solder is disposed in the hole, and is electrically connected to the pad via the conductive layer. A second unit similar to the first unit and stacked thereon includes a lower end of a second conductive layer that extends to below a second surface of a second semiconductor body and contacts the upper end of the first solder.

Abstract: The invention relates to a microelectromechanical microphone packaging system. The microelectromechanical microphone packaging system comprises a substrate, a chip, a microelectromechanical microphone, a conductive glue, a non-conductive glue and a cover. The substrate has a first surface. The chip is mounted on the first surface of the substrate. The microelectromechanical microphone is mounted on the first surface of the substrate, and electrically connected to the chip. The chip is enclosed by the non-conductive glue. The non-conductive glue is enclosed by the conductive glue. The cover is mounted on the first surface of the substrate to form a containing space, and has an acoustic aperture. The microelectromechanical microphone packaging system utilizes the conductive glue enclosing the chip and the non-conductive glue to shield interference from outside noise and obtain a shielding effect. In addition, the cover does not need to be made of metal material.

Abstract: A semiconductor chip package manufacturing method and a structure thereof are provided. The manufacturing method includes: providing a base having an image sensor chip and an encapsulant, in which the image sensor chip has pads and an active area; placing a transparent insulator on the active area; forming an insulation layer on an upper surface of the base; opening a plurality of openings to expose the pads; forming a plurality of through holes penetrating the insulation layer and the encapsulant outside of the image sensor chips; forming a metal layer on surfaces of the insulation layer, the openings, the pads and the through holes, and on a lower surface of the base, so as to extend the pads to the lower surface of the base; patterning the metal layer to expose a top area of the transparent insulator and remove a partial area of the metal layer on the lower surface of the base to form contacts; and sawing the base to form a package structure containing a single image sensor chip.

Abstract: A method of making a three-dimensional package, including: (a) providing a wafer; (b) forming at least one blind hole; (c) forming an isolation layer; (d) forming a conductive layer; (e) forming a dry film; (f) filling the blind hole with a solder; (g) removing the dry film; (h) patterning the conductive layer; (i) removing a part of the lower surface of the wafer and the isolation layer, so as to expose the conductive layer; (j) stacking a plurality of the wafers, and performing a reflow process; and (k) cutting the stacked wafers, so as to form a plurality of three-dimensional packages. As such, the lower end of the conductive layer is inserted into the solder of the lower wafer, so as to enhance the joint between the conductive layer and the solder, and effectively reduce the overall height of the three-dimensional packages after joining.

Abstract: A package comprises a first unit including a semiconductor body, a hole, an isolation layer, a conductive layer and a solder. The semiconductor body has a first surface having a pad and a protection layer exposing the pad. The hole penetrates the semiconductor body. The isolation layer is disposed on the side wall of the hole. The conductive layer covers the pad, a part of the protection layer, and the isolation layer. The lower end of the conductive layer extends to below a second surface of the semiconductor body. The solder is disposed in the hole, and is electrically connected to the pad via the conductive layer. A second unit similar to the first unit and stacked thereon includes a lower end of a second conductive layer that extends to below a second surface of a second semiconductor body and contacts the upper end of the first solder.

Abstract: The present invention relates to a three-dimensional package and a method of making the same. The method comprises: (a) providing a semiconductor body; (b) forming at least one blind hole in the semiconductor body; (c) forming an isolation layer on the side wall of the blind hole; (d) forming a conductive layer on the isolation layer; (e) patterning the conductive layer; (f) removing a part of the lower surface of the semiconductor body and a part of the isolation layer, so as to expose a part of the conductive layer; (g) forming a solder on the lower end of the conductive layer; (h) stacking a plurality of the semiconductor bodies, and performing a reflow process; and (i) cutting the stacked semiconductor bodies, so as to form a plurality of three-dimensional packages.

Abstract: A wire-bonding method for a wire-bonding apparatus is provided. The wire-bonding apparatus includes at least a first wire-bonder and a second wire-bonder for respectively bonding at least several first chips in a first region and several second chips in a second region on a substrate simultaneously. The wire-bonding method includes following steps. First, initial position coordinates of the first region and the second region are obtained. Next, it is determined whether a space between the first region and the second region is greater than a predetermined space. When the space between the first region and the second region is greater than the predetermined space, the first wire-bonder and the second wire-bonder respectively bond the first chips and the second chips simultaneously.

Abstract: A die bonder and a die bonding method thereof are provided. The die bonder includes a wafer platform, an arranging platform, a conveyer, at least one first pick-up device and a second pick-up device. The wafer platform is for placing a wafer with several dies. The conveyer is for carrying and conveying a substrate. The first pick-up device is for picking up one of the dies and placing each die on the arranging platform. The second pick-up device is for picking up the dies on the arranging platform and placing the dies on the substrate at the same time.

Abstract: A three-dimensional package and a method of making the same including providing a wafer; forming at least one blind hole in the wafer; forming an isolation layer on the side wall of the blind hole; forming a conductive layer on the isolation layer; forming a dry film on the conductive layer; filling the blind hole with metal; removing the dry film, and patterning the conductive layer; removing a part of the metal in the blind hole to form a space; removing a part of the second surface of the wafer and a part of the isolation layer, to expose a part of the conductive layer; forming a solder on the lower end of the conductive layer, the melting point of the solder is lower than the metal; stacking a plurality of the wafers, and performing a reflow process; and cutting the stacked wafers, to form three-dimensional packages.

Abstract: A three-dimensional package including a first wafer having at least one first pad and a first protection layer exposing the first pad. A first hole penetrates the first wafer. A first isolation layer is disposed on the side wall of the first hole. The lower end of a first conductive layer extends below the surface of the first wafer. A first metal is disposed in the first hole, and is electrically connected to the first pad via the first conductive layer. A first solder is disposed on the first metal in the first hole, wherein the melting point of the first solder is lower than that of the first metal. A second wafer is configured similarly as the first wafer. A lower end of a second conductive layer of the second wafer extends below the surface of the second wafer and contacts the upper end of the first solder.

Abstract: A packaging substrate and a manufacturing method thereof are provided. The manufacturing method includes following steps. First, a first packaging substrate including several first substrate units and at least one defected substrate unit is provided. Next, the defected substrate unit is separated from the packaging substrate, and at least one opening is formed in a frame of the first packaging substrate correspondingly. Then, a second substrate unit is provided. The shape of the second substrate unit is different from the shape of the opening. Afterwards, the second substrate unit is disposed in the opening.

Abstract: A packaging substrate and a manufacturing method thereof are provided. The manufacturing method includes following steps. First, a first packaging substrate including several first substrate units and at least one defected substrate unit is provided. Next, the defected substrate unit is separated from the packaging substrate, and at least one opening is formed in a frame of the first packaging substrate correspondingly. Then, a second substrate unit is provided. The shape of the second substrate unit is different from the shape of the opening. Afterwards, the second substrate unit is disposed in the opening.

Abstract: A wire-bonding method for a wire-bonding apparatus is provided. The wire-bonding apparatus includes at least a first wire-bonder and a second wire-bonder for respectively bonding at least several first chips in a first region and several second chips in a second region on a substrate simultaneously. The wire-bonding method includes following steps. First, initial position coordinates of the first region and the second region are obtained. Next, it is determined whether a space between the first region and the second region is greater than a predetermined space. When the space between the first region and the second region is greater than the predetermined space, the first wire-bonder and the second wire-bonder respectively bond the first chips and the second chips simultaneously.

Abstract: A semiconductor chip package manufacturing method and a structure thereof are provided. The manufacturing method includes: providing a base having an image sensor chip and an encapsulant, in which the image sensor chip has pads and an active area; placing a transparent insulator on the active area; forming an insulation layer on an upper surface of the base; opening a plurality of openings to expose the pads; forming a plurality of through holes penetrating the insulation layer and the encapsulant outside of the image sensor chips; forming a metal layer on surfaces of the insulation layer, the openings, the pads and the through holes, and on a lower surface of the base, so as to extend the pads to the lower surface of the base; patterning the metal layer to expose a top area of the transparent insulator and remove a partial area of the metal layer on the lower surface of the base to form contacts; and sawing the base to form a package structure containing a single image sensor chip.

Abstract: A die bonder and a die bonding method thereof are provided. The die bonder includes a wafer platform, an arranging platform, a conveyer, at least one first pick-up device and a second pick-up device. The wafer platform is for placing a wafer with several dies. The conveyer is for carrying and conveying a substrate. The first pick-up device is for picking up one of the dies and placing each die on the arranging platform. The second pick-up device is for picking up the dies on the arranging platform and placing the dies on the substrate at the same time.

Abstract: A packaging substrate and a method of manufacturing the same are provided. The method includes following steps. First, a first substrate including at least one defected packaging unit and several first packaging units is provided. The defected packaging unit and the first packaging units are arranged in an array on the first substrate. Next, the defected packaging unit is removed from the first substrate to correspondingly form at least one opening in the first substrate. Then, a second substrate including at least one second packaging unit is provided. Later, the second packaging unit is separated from the second substrate. The area of the second packaging unit is less than that of the opening. Subsequently, the second packaging unit is disposed in the opening. The edge of the second packaging unit is placed partially against an inner wall of the opening.

Abstract: A wire-bonding apparatus is used for wire-bonding at least a first chip and a second chip on a substrate at the same time. The wire-bonding apparatus includes at least a first capillary, a second capillary, a driving unit, a processing unit and a database. The driving unit is used for driving the first capillary and the second capillary. The processing unit is used for outputting a command to the driving unit to control the first capillary and the second capillary. The database is used for storing an operating parameter data. The processing unit controls the first capillary and the second capillary according to the operating parameter data.

Abstract: The invention relates to a microelectromechanical microphone packaging system. The microelectromechanical microphone packaging system comprises a substrate, a chip, a microelectromechanical microphone, a conductive glue, a non-conductive glue and a cover. The substrate has a first surface. The chip is mounted on the first surface of the substrate. The microelectromechanical microphone is mounted on the first surface of the substrate, and electrically connected to the chip. The chip is enclosed by the non-conductive glue. The non-conductive glue is enclosed by the conductive glue. The cover is mounted on the first surface of the substrate to form a containing space, and has an acoustic aperture. The microelectromechanical microphone packaging system utilizes the conductive glue enclosing the chip and the non-conductive glue to shield interference from outside noise and obtain a shielding effect. In addition, the cover does not need to be made of metal material.

Abstract: A multi-chips module package comprises a lead frame, a first chip, a second chip, a plurality of electrically conductive wires and an encapsulation. The lead frame has a plurality of first leads, second leads and chip pads connecting to the first leads. The first chip is placed on the lead frame and electrically connected to the lead frame through the bumps connecting the bump-bonding pads and the chip pads and the first leads; the second chip is placed over the first chip and electrically connected to the lead frame through the wires connecting the wire-bonding pads to the second leads; and the encapsulation covers the first chip, the second chip, the lead frame, and the wires. In such a manner, it not only reduces the distance of transmitting the electrical signals from chips to the outside but also it can save cost due to the lead frame manufactured by a simple manufacturing processes. In addition, a manufacturing method of the multi-chips module package is provided.

Abstract: The present invention relates to a three-dimensional package and a method of making the same. The three-dimensional package comprises a first wafer, at least one first hole, a first isolation layer, a first conductive layer, a first solder, a second wafer, at least one second hole, a second isolation layer, a second conductive layer, and a second solder. The first wafer has at least one first pad and a first protection layer exposing the first pad. The first hole penetrates the first wafer. The first isolation layer is disposed on the side wall of the first hole. The lower end of the first conductive layer extends below the surface of the first wafer. The first solder is disposed in the first hole, and is electrically connected to the first pad via the first conductive layer. The second wafer has at least one second pad and a second protection layer exposing the second pad. The second hole penetrates the second wafer. The second isolation layer is disposed on the side wall of the second hole.