Abstract: An integrated over-current protection device includes a positive temperature coefficient (PTC) component, a first conductive unit, a second conductive unit, a first conductive via, and a second conductive via. The PTC component includes a first PTC body, and has opposing first and second surfaces. The first conductive unit is disposed on the first surface, and includes a first electrode and a first conductive pad electrically insulated from the first electrode. The second conductive unit is disposed on the second surface, and includes a second electrode and a second conductive pad electrically insulated from the second electrode. The first conductive via extends through the first conductive unit and the PTC component to electrically connect the first electrode to the second conductive pad. The second conductive via extends through the second conductive unit and the PTC component to electrically connect the second electrode to the first conductive pad.

Abstract: An optical engine module including at least two laser sources, collimators, a light combining lens group, an aperture, a beam shaping lens group, a MEMS scanning module, and a beam expansion lens group is provided. The at least two laser sources respectively generate at least two laser beams with different wavelengths. The collimators respectively collimate the at least two laser beams to generate at least two collimated beams. The light combining lens group combines the at least two collimated beams into a combined beam. The aperture filters stray beams of the combined beam. The beam shaping lens group shapes the combined beam to generate a shaped beam with a perfect circle. The MEMS scanning module reflects the shaped beam and scans in horizontal and vertical directions to form a scanning beam. The beam expansion lens group expands the scanning beam into an expanded beam having a predetermined area.

Abstract: A chip structure provided herein includes a bridge structure including an interconnect bridge, a dielectric layer laterally surrounding the interconnect bridge and through dielectric vias extending from a top of the dielectric layer to a bottom of the dielectric layer, wherein a thickness of the interconnect bridge is identical to a height of each of the through dielectric vias; semiconductor dies disposed on the bridge structure, wherein each of the semiconductor dies overlaps both the interconnect bridge and the dielectric layer and is electrically connected to the interconnect bridge and at least one of the through dielectric vias; and a die support, the semiconductor dies being disposed between the die support and the bridge structure, wherein a sidewall of the die support is coplanar with a sidewall of the bridge structure.

Abstract: Die structures and methods of forming the same are described. In an embodiment, a device includes: a lower integrated circuit die; a first upper integrated circuit die face-to-face bonded to the lower integrated circuit die, the first upper integrated circuit die including a first semiconductor substrate and a first through-substrate via; a gap-fill dielectric around the first upper integrated circuit die, a top surface of the gap-fill dielectric being substantially coplanar with a top surface of the first semiconductor substrate and with a top surface of the first through-substrate via; and an interconnect structure including a first dielectric layer and first conductive vias, the first dielectric layer disposed on the top surface of the gap-fill dielectric and the top surface of the first semiconductor substrate, the first conductive vias extending through the first dielectric layer to contact the top surface of the first through-substrate via.

Abstract: In an embodiment, a device includes: a first integrated circuit die comprising a semiconductor substrate and a first through-substrate via; a gap-fill dielectric around the first integrated circuit die, a surface of the gap-fill dielectric being substantially coplanar with an inactive surface of the semiconductor substrate and with a surface of the first through-substrate via; a dielectric layer on the surface of the gap-fill dielectric and the inactive surface of the semiconductor substrate; a first bond pad extending through the dielectric layer to contact the surface of the first through-substrate via, a width of the first bond pad being less than a width of the first through-substrate via; and a second integrated circuit die comprising a die connector bonded to the first bond pad.

Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes: forming a transistor region in a substrate; forming a gate dielectric layer over the transistor region; forming a diffusion-blocking layer over the gate dielectric layer; forming a first portion of a work function layer over the diffusion-blocking layer; forming a second portion of the work function layer over the first portion of the work function layer; forming a plurality of barrier elements on or under a top surface of the second portion of the work function layer; and forming a gate electrode over the work function layer, wherein the plurality of barrier elements block oxygen from diffusing into the work function layer during the formation of the gate electrode.

Abstract: A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers.

Abstract: Provided is a bioreactor apparatus including: a liquid storage chamber for storing a culture medium; a pump for providing pressure to drive the flow of the culture medium; a plurality of culture chambers providing an accommodating space to accommodate the culture medium and a cell to be cultured; and a pipeline connecting the liquid storage chamber, the pump, and the culture chamber to form a closed loop. Also provided is a bioreactor system including the bioreactor apparatus of the present disclosure, the culture medium, and a cell. Further provided is a method for culturing a cell or an organoid by the bioreactor apparatus of the present disclosure. The bioreactor apparatus, bioreactor system, and method of the present disclosure can form a biomimetic circulatory system, which is beneficial for simulating and evaluating the complex microenvironment and physiological mechanism in the living body.

Abstract: A routing protocol, the routing protocol includes the steps of: receiving a packet at an ingress node of a distributed router, the ingress node having an ingress node address, and the packet having a packet header containing a global destination address; converting the global destination address into a local destination address, the local destination address identifying a location on the distributed router; and routing the packet to the local destination address.

Abstract: A routing protocol, the routing protocol includes the steps of: receiving a packet at an ingress node of a distributed router, the ingress node having an ingress node address, and the packet having a packet header containing a global destination address; converting the global destination address into a local destination address, the local destination address identifying a location on the distributed router; and routing the packet to the local destination address.

Abstract: A system and method for classifying packets according to packet header field values. Each of a set of subkey tables is searched for a respective packet header field value; each such search results in a value for a subkey. The subkeys are combined to form a decision key. A decision table is then searched for the decision key. The search of the decision table results in an action code and a reason code, one or both of which may be used to determine how to further process the packet.

Abstract: A system and method for selecting a resource from among a plurality of resources. A total range of numbers is divided into a plurality of sub-ranges, each associated with a respective one of the resources. An indexing number, e.g., a random number, is generated and, when it falls within the total range of numbers, the resource associated with the sub-range into which the indexing number falls is selected. When the indexing number falls outside of the total range, a resource associated with the difference between the indexing number and the greatest number in the total range is selected.

Abstract: A system and method for routing. A packet includes a stack of one or more headers, such as a stack of Multiprotocol Label Switching headers, that determines the path that the packet will take, through a sequence of switches, from its source to its destination. Each header in the stack contains an output port identifier that identifies an output port of a corresponding switch in the path. Each switch, upon receiving the packet, removes the first header to form a shortened packet, and routes the shortened packet to the output port identified by the output port identifier.

Abstract: A system and method for classifying packets according to packet header field values. Each of a set of subkey tables is searched for a respective packet header field value; each such search results in a value for a subkey. The subkeys are combined to form a decision key. A decision table is then searched for the decision key. The search of the decision table results in an action code and a reason code, one or both of which may be used to determine how to further process the packet.

Abstract: A system and method for measuring propagation delays and other delays in an optical switching system. A transmitter is connected, through a circuit switch, to a receiver. To measure the propagation delay between the transmitter and the receiver, the transmitter sends one or more time-tagged ranging messages and the receiver calculates a propagation delay from the difference between the time of receipt and the time of transmission. In another embodiment, a time delay between message transmission and transition of a CDR of the receiver to a fast acquisition mode is adjusted, by trial and error, to find a range of such time delays for which transmission is successful. A time delay between the transmitter and the switch is measured by establishing or breaking the connection and determining, for various tentative time delay values, whether transmission succeeds.

Abstract: A system and method for selecting a resource from among a plurality of resources. A total range of numbers is divided into a plurality of sub-ranges, each associated with a respective one of the resources. An indexing number, e.g., a random number, is generated and, when it falls within the total range of numbers, the resource associated with the sub-range into which the indexing number falls is selected. When the indexing number falls outside of the total range, a resource associated with the difference between the indexing number and the greatest number in the total range is selected.

Abstract: A system and method for measuring propagation delays and other delays in an optical switching system. A transmitter is connected, through a circuit switch, to a receiver. To measure the propagation delay between the transmitter and the receiver, the transmitter sends one or more time-tagged ranging messages and the receiver calculates a propagation delay from the difference between the time of receipt and the time of transmission. In another embodiment, a time delay between message transmission and transition of a CDR of the receiver to a fast acquisition mode is adjusted, by trial and error, to find a range of such time delays for which transmission is successful. A time delay between the transmitter and the switch is measured by establishing or breaking the connection and determining, for various tentative time delay values, whether transmission succeeds.

Abstract: A system and method for routing. A packet includes a stack of one or more headers, such as a stack of Multiprotocol Label Switching headers, that determines the path that the packet will take, through a sequence of switches, from its source to its destination. Each header in the stack contains an output port identifier that identifies an output port of a corresponding switch in the path. Each switch, upon receiving the packet, removes the first header to form a shortened packet, and routes the shortened packet to the output port identified by the output port identifier.

Abstract: A system for collaborative deep packet inspection in a network uses a coarse grain mechanism to perform deep packet inspection on sample packets sampled from a plurality of traffic flows received at a network device using a plurality of signatures and develop a profile of the network and a fine grain mechanism to perform real-time inspection of a traffic flow against a small set of the signatures that is updated based on the profile. The fine grain mechanism further enables at least one policy action to be applied to a traffic flow when the traffic flow matches one of the signatures in the set of signatures.

Abstract: A method of securely routing data traffic between communication networks. In an integrated security device, a host router supports a virtual router that peers with VRF (virtual routing and forwarding) instances associated with participating networks on the host router. Each VRF instance preferably runs its own dynamic routing protocol and determines when received data traffic may be directly forwarded from one network to another and when it must be forwarded to an OE (offload engine) for enforcement of security policies or NAT (network address translation) processing.