Abstract: An image capturing system lens assembly includes eight lens elements, the eight lens elements being, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element and an eighth lens element. Each of the eight lens elements has an object-side surface towards the object side and an image-side surface towards the image side. The fourth lens element has negative refractive power. The image-side surface of the eighth lens element is concave in a paraxial region thereof, and the image-side surface of the eighth lens element includes at least one inflection point.

Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

Abstract: A circulating current suppression method of a power system having a plurality of power modules is provided. Each power module includes a high-voltage bus, a low-voltage bus and a balance circuit having a neutral voltage. The circulating current suppression method includes: in each balance circuit, disposing a first capacitor electrically coupled between the high-voltage bus and the neutral voltage, and disposing a second capacitor electrically coupled between the neutral voltage and the low-voltage bus; acquiring a current effective value of an input of each power module; if detecting that the current effective value of at least one power module doesn't remain at a current reference value, determining that a circulating current occurs in the at least one power module; and operating the balance circuit of the at least one power module to charge the first capacitor or the second capacitor to regulate the neutral voltage for suppressing the circulating current.

Abstract: An optical device and a method of fabricating the same are disclosed. The optical device includes a first die layer and a second die layer. The first die layer includes a first substrate having a first surface and a second surface opposite to the first surface, first and second pixel structures, an inter-pixel isolation structure disposed in the first substrate and surrounding the first and second pixel structures, and a floating diffusion region disposed in the first substrate and between the first and second pixel structures. The second die layer includes a second substrate having a third surface and a fourth surface opposite to the third surface and a pixel transistor group disposed on the third surface of the second substrate and electrically connected to the first and second pixel structures.

Abstract: A polishing apparatus for double-sided polishing of semiconductor wafers including a first platen, a second platen, a wafer carrier, and a controller is disclosed. The controller is configured to perform operations including determining whether a batch of the semiconductor wafers is loaded on the wafer carrier for double-sided polishing and retrieving specification for the batch of semiconductor wafers. The operations include based on the retrieved specification, determining an amount of tuning required for one or more flatness control parameters, and based on the amount of tuning required for the one or more flatness control parameters, identifying, or generating a recipe to perform the double-sided polishing on the batch of the semiconductor wafers. The operations include storing statistical process control (SPC) feedback data in a database to perform one or more additional iterations of the double-sided polishing on the batch of the semiconductor wafers.

Abstract: A surface processing equipment using energy beam including a multi-axis platform, a surface profile measuring device, an energy beam generator and a computing device is provided. The multi-axis platform is configured to carry a workpiece and move the workpiece to the first position or the second position. The surface profile measuring device has a working area, and the first position is located on the working area. The surface profile measuring device is configured to measure the workpiece to obtain surface profile. The energy beam generator is configured to provide an energy beam to the workpiece for processing, and the second position is located on a transmission path of the energy beam. The computing device is connected to the surface profile measuring device and the energy beam generator. The computing device adjusts the energy beam generator according to the error profile.

Abstract: The present disclosure is related to an intelligent charging management system, a charging management device, and a charging management method. The charging management device is used to execute the charging management method for determining a chargeable power value of the electric vehicle according to an operation mode of the electric vehicle and an available capacity of a charging point, and determining a charging parking lot for providing to the electric vehicle according to the chargeable power value of the electric vehicle and available charging parking lots of the charging point. In the way, the charging power and charging parking lots of the charging point can be allocated according to the charging requirements of electric vehicles, electric vehicles can be accurately and efficiently charged and the damage caused by charging current to the battery is reduced, so as the purpose for improving charging efficiency of the charging point is determined.

Abstract: A flexible circuit board and a manufacturing method thereof are provided. The flexible circuit board includes a circuit structure, a first cover layer, and a second cover layer. The circuit structure has a top surface and a bottom surface opposite to the top surface. The circuit structure includes multiple circuit layers and multiple insulating layers stacked alternately. A material of the insulating layers is a photosensitive dielectric material and a Young's modulus of the insulating layers is between 0.36 GPa and 8 GPa. The first cover layer is disposed on the top surface of the circuit structure. The second cover layer is disposed on the bottom surface of the circuit structure.

Abstract: A fluid immersion cooling system has a fluid tank containing a hydrocarbon dielectric fluid as a coolant fluid. One or more components of an electronic system is immersed in the coolant fluid. A gas cylinder contains a non-flammable, compressed filling gas. The temperature of the coolant fluid is monitored during operation of the electronic system. The filling gas is released from the gas cylinder and into the fluid tank when the temperature of the coolant fluid rises to a trigger temperature that is set based on the flash point of the coolant fluid. The filling gas covers a surface of the coolant fluid to block oxygen from interacting with vapors of the coolant fluid to prevent combustion.

Abstract: A flyback power converter includes: a first transistor switching a transformer for generating a primary switching current and an output voltage; and a second transistor generating a circulated current to achieve ZVS (zero voltage switching) of the first transistor; wherein the flyback power converter actively forces at least one switching cycle to be operated in a DCM (discontinuous conduction mode) operation when the primary switching current is determined to have been operating in a non-DCM operation for a predetermined number of switching cycles. The flyback power converter generates a demagnetized signal which emulates the demagnetized time of the transformer for controlling the second transistor during the non-DCM operation. The flyback power converter calibrates the demagnetized signal according to the demagnetized time during the actively fored DCM operation.

Abstract: The present disclosure describes a semiconductor device having a contact structure isolated from a source/drain structure. The semiconductor structure includes a gate structure on a substrate, first and second source/drain (S/D) structures on opposite sides of the gate structure, an isolation layer on the second S/D structure, a third S/D structure adjacent to and separate from the second S/D structure, and a S/D contact structure on the isolation layer and the third S/D structure. The isolation layer separates the S/D contact structure from the second S/D structure.

Abstract: The present disclosure provides an optical module. The optical module includes an optical component disposed in or on a carrier and configured to receive a first light. The optical component is further configured to transmit a second light to a first portion of the carrier and transmit a third light to a second portion of the carrier.

Abstract: A fan module and computing device with the fan module are disclosed. The fan module includes a handle configured to actuate between an operation state and a release state. The handle in the release state allows a user to vertically remove the fan module from its respective fan module slot and away from the bottom panel.

Abstract: The described aspects and implementations enable efficient calibration of a sensing system of a vehicle. In one implementation, disclosed is a method and a system to perform the method, the system including the sensing system configured to obtain a plurality of images associated with a corresponding time of a plurality of times. The system further includes a data processing system operatively coupled to the sensing system and configured to generate a plurality of sets of feature tensors (FTs) associated with one or more objects of the environment depicted in a respective image. The data processing system is further to obtain a combined FT and process the combined FT using a neural network to identify one or more tracks characterizing motion of a respective object.

Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.

Abstract: A capacitive touchpad is provided, which includes a substrate module, a plurality of sensing electrodes, a plurality of driving electrodes and a plurality of light-emitting diode (LED) dies. The plurality of sensing electrodes and the plurality of driving electrodes form a touch sensing region of the capacitive touchpad, and the touch sensing region is divided into a plurality of sensing units having same areas. Each of the LED dies is arranged in two adjacent ones of the plurality of sensing units, and a position of each of the LED dies corresponds to one of the plurality of driving electrodes, and the LED dies are electrically isolated from the plurality of sensing electrodes and the plurality of driving electrodes.

Abstract: A photolithography system utilizes tin droplets to generate extreme ultraviolet radiation for photolithography. The photolithography system irradiates the droplets with a laser. The droplets become a plasma and emit extreme ultraviolet radiation. The photolithography system senses contamination of a collector mirror by the tin droplets and adjusts the flow of a buffer fluid to reduce the contamination.

Abstract: A protocol conversion circuit and a protocol conversion method are provided. The protocol conversion circuit includes a DisplayPort™ (DP) receiver, a control analysis circuit, a downstream transmitter and a frame buffer. The DP receiver analyzes a DP signal to obtain video data and packet information. The control analysis circuit determines whether the packet information indicates that a live function or a panel replay (PR) function is activated, and controls, in response to determining that the live function is activated, the frame buffer to store received current video data and transmits it to the downstream transmitter; and controls the frame buffer to discard the received current video data, or update previous video data stored in the frame buffer with a specified range in the current video data, and sends latest video data to the downstream transmitter, so as to output a target signal to the second electronic device.

Abstract: A hidden display device and a method of manufacturing the same are provided. The hidden display device includes an appearance decorative structure, a light-emitting module and a signal control module. The appearance decorative structure includes an appearance decorative shell. The light-emitting module is covered by the appearance decorative structure. The appearance decorative shell has a plurality of micron-level through openings each having a maximum diameter between 5 ?m and 200 ?m. The minimum distance between any two adjacent micron-level through openings is between 50 ?m and 100 ?m. The light-emitting module includes a plurality of light-emitting units respectively correspond to the micron-level through openings.

Abstract: One aspect of the present disclosure pertains to a method. The method includes receiving a first circuit structure having semiconductor devices, an interconnect structure, first feedthrough vias, top metal lines, redistribution vias, and bond pads. The method includes dicing the first circuit structure to form a top die having a top semiconductor device. The method includes forming a stacked integrated circuit (IC) structure by bonding the top die to a second circuit structure, the second circuit structure having second semiconductor devices, a second interconnect structure, second redistribution vias, and second bond pads. The method includes forming IC top metal lines over the first feedthrough vias, forming an IC passivation layer over the IC top metal lines, forming metal-insulator-metal (MIM) capacitor structures in the IC passivation layer, and forming IC redistribution vias penetrating through the MIM capacitor structures and the IC passivation layer to land on the IC top metal lines.