Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

Abstract: A static auto-tuning system and method for controlling operation of a motor in a system. A speed reference signal is generated resulting in a speed response of the motor. Closed-loop feedback magnifies the rotating friction effect to an observable level. Inertia and rotating friction coefficient values of the system are estimated based on the speed frequency response and a virtual damping coefficient. A fixed low frequency speed signal may result in a first frequency response function for determining virtual damping, and a variable frequency excitation signal may result in a second frequency response function for determining the inertia and rotating friction characteristics. Closed-loop gains are determined based on these characteristics. The excitation signal may be sampled and a peak value in each interval may be identified and stored to produce an envelope of peak values for determining the gain response. Operation of the motor is controlled using the determined gains.

Abstract: A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.

Abstract: A shower head structure and a plasma processing apparatus are provided. The shower head structure includes a plate body with a first zone and a second zone on a first surface. A plurality of first through holes are in the first zone, each of the first through holes having a diameter uniform with others of the first through holes. A plurality of second through holes are in the second zone. The first zone is in connection with the second zone, and the diameter of each of the first through holes is greater than a diameter of each of the second through holes. A plasma processing apparatus includes the shower head structure is also provided.

Abstract: A hammer includes a striking head (10), a handle (20) and a combining unit (30). The striking head (10) has a passage (15). The handle (20) has an installing part (21) having a mounting member (22), first ribs (23) and second ribs (24) outwardly extended from the mounting member (22). A flowing passage (25) is formed between the first ribs (23) and the second ribs (24), and a distance (D) is formed between the first ribs (23) and an internal wall of the passage (15). A resin is filled between the installing part (21) and the passage (15) to seal the flowing passages (25) and the distance (D), and the combining unit (30) is formed through each of the first ribs (23) and each of the second ribs (24) being interlocked after the resin is solidified.

Abstract: A pixel structure is provided. The pixel structure includes a display unit and a shading unit, and at least a portion of the shading unit is disposed on the display unit. The display unit includes a pixel switch element and a self-illuminating element, and the self-illuminating element is electrically connected to the pixel switch element. The shading unit includes a shading electrode and a shading layer, and the shading layer is disposed on the self-illuminating element and electrically connected to the shading layer.

Abstract: A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers.

Abstract: The present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate, an insulating layer disposed on the substrate, a first conductive feature disposed in the insulating layer, and a capacitor structure disposed on the insulating layer. The capacitor structure includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode sequentially stacked. The semiconductor device also includes a first via connected to the first electrode and the third electrode, a second via connected to the second electrode, and a third via connected to the first conductive feature. A part of the first via is disposed in the insulating layer. A portion of the first conductive feature is directly under the capacitor structure.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.

Abstract: The present disclosure provides a time delay integration (TDI) sensor using a rolling shutter. The TDI sensor includes multiple pixel columns. Each pixel column includes multiple pixels arranged in an along-track direction, wherein two adjacent pixels or two adjacent pixel groups in every pixel column have a separation space therebetween. The separation space is equal to a pixel height multiplied by a time ratio of a line time difference of the rolling shutter and a frame period, or equal to a summation of at least one pixel height and a multiplication of the pixel height by the time ratio of the line time difference and the frame period. The TDI sensor further records defect pixels of a pixel array such that in integrating pixel data to integrators, the pixel data associated with the defect pixels is not integrated into corresponding integrators.

Abstract: A system may include a first acoustic event detection (AED) component configured to detect a predetermined set of acoustic events, and include a second AED component configured to detect custom acoustic events that a user configures a device to detect. The first and second AED components are configured to perform task-specific processing, and may receive as input the same acoustic feature data corresponding to audio data that potentially represents occurrence of one or more events. Based on processing by the first and second AED components, a device may output data indicating that one or more acoustic events occurred, where the acoustic events may be a predetermined acoustic event and/or a custom acoustic event.

Abstract: The embodiments of the disclosure provide a method for inputting letters, a host, and a computer readable storage medium. The method includes: in response to determining that a first hand is presented as a first gesture, showing at least one letter set; in response to determining that the first hand has been changed from the first gesture to a second gesture corresponding to a first letter set among the at least one letter set, showing a subset of the first letter set, wherein the subset of the first letter set comprises at least one letter; in response to determining that a first letter among the at least one letter of the subset of the first letter set has been chosen, inputting the first letter.

Abstract: An optoelectronic package and a method for producing the optoelectronic package are provided. The optoelectronic package includes a carrier, a photonic device, a first encapsulant and a second encapsulant. The photonic device is disposed on the carrier. The first encapsulant covers the carrier and is disposed around the photonic device. The second encapsulant covers the first encapsulant and the photonic device. The first encapsulant has a topmost position and a bottommost position, and the topmost position is not higher than a surface of the photonic device.

Abstract: An electronic device includes a host, a display, a sliding plate, and a keyboard. The host has an operating surface. The display is pivoted to the host. The sliding plate is slidably disposed in the host, where the display is mechanically coupled to the sliding plate, and the sliding plate includes a plat portion and a recess portion that are arranged side by side. The keyboard is integrated to the host. The keyboard includes a key structure, where the key structure includes a key cap and a reciprocating element, and the key cap is exposed from the operating surface of the host. The reciprocating element is disposed between the key cap and the sliding plate and has a first end connected to the key cap and a second end contacting the sliding plate. The second end is located on a sliding path of the plat portion and the recess portion.

Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.

Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.

Abstract: A micro-electro-mechanical system acoustic sensor, a micro-electro-mechanical system package structure and a method for manufacturing the same are provided. The micro-electro-mechanical system acoustic sensor comprises a substrate, a cantilever structure and a diaphragm sensor. The cantilever structure is formed on the substrate, and comprises a fixed end and a free cantilever portion extended from the fixed end. The free cantilever portion comprises a free end. The free end and the fixed end are respectively at opposing sides of the free cantilever portion. The free cantilever portion is capable of generating a vibration wave in an empty space. The diaphragm sensor is formed on the substrate, and comprises a diaphragm film, a back plate, and at least one electrical contact point. The back plate and the diaphragm film have a first empty gap there between. The empty space and the first empty gap communicate to each other.

Abstract: In a layout alignment method of a lithographic system for semiconductor device processing, a reference pattern that is included in a reference pattern module is disposed over an alignment pattern of a substrate. The alignment pattern includes two or more sub-patterns that extend in a first interval along a first direction and are arranged with a first pitch in a second direction. Each sub-pattern includes first patterns and second patterns. A width of the first pattern is at least twice as wide as a width of the second pattern. The reference pattern at least partially overlap with the alignment pattern. An overlay alignment error between the reference pattern and the alignment pattern of the substrate is determined. When the overlay alignment error is not more than a threshold value, a photo resist pattern is produced on the substrate based on the layout pattern associated with reference pattern.