Abstract: A method forming a redistribution line, which includes a via and a metal trace over and joined to the via, over a carrier. The formation of the redistribution line includes depositing a first metal layer, depositing a barrier layer over the first metal layer, and depositing a second metal layer over the barrier layer. The method further includes de-bonding the redistribution line from the carrier, and bonding a package component to the redistribution line, wherein a metal bump bonds the package component to the via.

Abstract: A semiconductor device includes a semiconductor fin. The semiconductor device includes a metal gate disposed over the semiconductor fin. The semiconductor device includes a gate dielectric layer disposed between the semiconductor fin and the metal gate. The semiconductor device includes first spacers sandwiching the metal gate. The first spacers have a first top surface and the gate dielectric layer has a second top surface, and the first top surface and a first portion of the second top surface are coplanar with each other. The semiconductor device includes second spacers further sandwiching the first spacers. The second spacers have a third top surface above the first top surface and the second top surface. The semiconductor device includes a gate electrode disposed over the metal gate.

Abstract: A method of forming a semiconductor device includes surrounding a dummy gate disposed over a fin with a dielectric material; forming a gate trench in the dielectric material by removing the dummy gate and by removing upper portions of a first gate spacer disposed along sidewalls of the dummy gate, the gate trench comprising a lower trench between remaining lower portions of the first gate spacer and comprising an upper trench above the lower trench; forming a gate dielectric layer, a work function layer and a glue layer successively in the gate trench; removing the glue layer and the work function layer from the upper trench; filling the gate trench with a gate electrode material after the removing; and removing the gate electrode material from the upper trench, remaining portions of the gate electrode material forming a gate electrode.

Abstract: A semiconductor device includes a semiconductor fin. The semiconductor device includes first spacers over the semiconductor fin. The semiconductor device includes second spacers over the semiconductor fin. The second spacers vertically extend farther from the semiconductor fin than the first spacers. The semiconductor device includes a metal gate over the semiconductor fin, the metal gate is sandwiched by the first spacers. The metal gate includes a glue layer that contains tantalum nitride.

Abstract: A method of forming a semiconductor device includes surrounding a dummy gate disposed over a fin with a dielectric material; forming a gate trench in the dielectric material by removing the dummy gate and by removing upper portions of a first gate spacer disposed along sidewalls of the dummy gate, the gate trench comprising a lower trench between remaining lower portions of the first gate spacer and comprising an upper trench above the lower trench; forming a gate dielectric layer, a work function layer and a glue layer successively in the gate trench; removing the glue layer and the work function layer from the upper trench; filling the gate trench with a gate electrode material after the removing; and removing the gate electrode material from the upper trench, remaining portions of the gate electrode material forming a gate electrode.

Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.

Abstract: A method includes depositing a first work function layer over a gate dielectric layer, forming a first hard mask layer over the first work function layer, forming a photoresist mask over the first hard mask layer, where forming the photoresist mask includes depositing a bottom anti-reflective coating (BARC) layer over the first hard mask layer, etching a portion of the BARC layer, etching a portion of the first hard mask layer using the BARC layer as a mask, etching a portion of the first work function layer to expose a portion of the gate dielectric layer through the first hard mask layer and the first work function layer, removing the first hard mask layer, and depositing a second work function layer over the first work function layer and over the portion of the gate dielectric layer.

Abstract: A method for manufacturing a semiconductor device includes forming a gate trench over a semiconductor fin, the gate trench including an upper portion and a lower portion. The method includes sequentially forming one or more work function layers, a capping layer, and a glue layer over the gate trench. The glue layer includes a first sub-layer and a second sub-layer that have respective different etching rates with respect to an etching solution. The method includes removing the second sub-layer while leaving a first portion of the first sub-layer filled in the lower portion of the gate trench.

Abstract: An electronic device may have a display such as an organic light-emitting diode display. The organic light-emitting diode display may have an array of organic light-emitting diode pixels that each have organic light-emitting diode layers interposed between a cathode and an anode. To improve off-axis luminance and luminance uniformity, the display may include green pixels with emission spectra having a narrow full width at half maximum, the display may include a reflective layer that is formed separately from a transparent anode, and/or the display may include a diffusive layer. The diffusive layer may be embedded in one or more encapsulation layers for the display. The diffusive layer may be a diffusive color filter.

Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.

Abstract: A method for manufacturing a semiconductor device includes: forming a patterned dielectric layer over a substrate, the patterned dielectric layer including an interconnect opening having a sidewall surface and a bottom surface; and forming a doped film by an opening-adjustment process, the doped film being disposed on the patterned dielectric layer and extending into the interconnect opening to cover an upper portion of the sidewall surface, so as to adjust a profile of the interconnect opening.

Abstract: A method includes depositing a first work function layer over a gate dielectric layer, forming a first hard mask layer over the first work function layer, forming a photoresist mask over the first hard mask layer, where forming the photoresist mask includes depositing a bottom anti-reflective coating (BARC) layer over the first hard mask layer, etching a portion of the BARC layer, etching a portion of the first hard mask layer using the BARC layer as a mask, etching a portion of the first work function layer to expose a portion of the gate dielectric layer through the first hard mask layer and the first work function layer, removing the first hard mask layer, and depositing a second work function layer over the first work function layer and over the portion of the gate dielectric layer.

Abstract: A lenticular display may be formed with convex curvature. The lenticular display may have a lenticular lens film with lenticular lenses that extend across the length of the display. The lenticular lenses may be configured to enable stereoscopic viewing of the display. To enable more curvature in the display while ensuring satisfactory stereoscopic display performance, the display may have stereoscopic zones and non-stereoscopic zones. A central stereoscopic zone may be interposed between first and second non-stereoscopic zones. The non-stereoscopic zones may have more curvature than the stereoscopic zone. To prevent crosstalk within the lenticular display, a louver film may be incorporated into the display. The pixel array may have a diagonal layout and may be covered by vertically oriented lenticular lenses.

Abstract: A semiconductor device includes a semiconductor fin. The semiconductor device includes a metal gate disposed over the semiconductor fin. The semiconductor device includes a gate dielectric layer disposed between the semiconductor fin and the metal gate. The semiconductor device includes first spacers sandwiching the metal gate. The first spacers have a first top surface and the gate dielectric layer has a second top surface, and the first top surface and a first portion of the second top surface are coplanar with each other. The semiconductor device includes second spacers further sandwiching the first spacers. The second spacers have a third top surface above the first top surface and the second top surface. The semiconductor device includes a gate electrode disposed over the metal gate.

Abstract: A method of forming a semiconductor device includes: forming a semiconductor structure having source/drain regions, a fin disposed between the source/drain regions, and a dummy gate disposed on the fin and surrounded by a spacer; removing the dummy gate to form a gate trench which is defined by a trench-defining wall; forming a gate dielectric layer on the trench-defining wall; forming a work function structure on the gate dielectric layer; forming a resist layer to fill the gate trench; removing a top portion of the resist layer; removing the work function structure exposed from the resist layer using a wet chemical etchant; removing the resist layer; and forming a conductive gate in the gate trench.

Abstract: A lenticular display may be formed with convex curvature. The lenticular display may have a lenticular lens film with lenticular lenses that extend across the length of the display. The lenticular lenses may be configured to enable stereoscopic viewing of the display. To enable more curvature in the display while ensuring satisfactory stereoscopic display performance, the display may have stereoscopic zones and non-stereoscopic zones. A central stereoscopic zone may be interposed between first and second non-stereoscopic zones. The non-stereoscopic zones may have more curvature than the stereoscopic zone. To prevent crosstalk within the lenticular display, a louver film may be incorporated into the display. The pixel array may have a diagonal layout and may be covered by vertically oriented lenticular lenses.

Abstract: A semiconductor device includes a semiconductor fin. The semiconductor device includes a metal gate disposed over the semiconductor fin. The semiconductor device includes a gate dielectric layer disposed between the semiconductor fin and the metal gate. The semiconductor device includes first spacers sandwiching the metal gate. The first spacers have a first top surface and the gate dielectric layer has a second top surface, and the first top surface and a first portion of the second top surface are coplanar with each other. The semiconductor device includes second spacers further sandwiching the first spacers. The second spacers have a third top surface above the first top surface and the second top surface. The semiconductor device includes a gate electrode disposed over the metal gate.

Abstract: A method for manufacturing a semiconductor device includes forming a gate trench over a semiconductor fin, the gate trench including an upper portion and a lower portion. The method includes sequentially forming one or more work function layers, a capping layer, and a glue layer over the gate trench. The glue layer includes a first sub-layer and a second sub-layer that have respective different etching rates with respect to an etching solution. The method includes removing the second sub-layer while leaving a first portion of the first sub-layer filled in the lower portion of the gate trench.

Abstract: A method for manufacturing a semiconductor device includes forming a gate trench over a semiconductor fin, the gate trench including an upper portion and a lower portion. The method includes sequentially forming one or more work function layers, a capping layer, and a glue layer over the gate trench. The glue layer includes a first sub-layer and a second sub-layer that have respective different etching rates with respect to an etching solution. The method includes removing the second sub-layer while leaving a first portion of the first sub-layer filled in the lower portion of the gate trench.

Abstract: A method of fabricating a semiconductor device includes forming at least one fin on a substrate, a plurality of dummy gates over the at least one fin, and a sidewall spacer on the dummy gates. Source and drain regions are epitaxially formed contacting the at least one fin and laterally adjacent the dummy gates, where forming the source and drain regions leaves a void below the source and drain regions and adjacent the dummy gates. The dummy gates are replaced with active gates, each having a gate dielectric on the sidewall spacer and a gate electrode on the gate dielectric. A patterned layer is formed exposing a selected active gate of the active gates. A first etch is performed to remove exposed portions of the gate electrode of the selected active gate. A second etch is performed, after the first etch, to remove exposed portions of a gate dielectric of the selected active gate.