Patents by Inventor Chien-Hao Wang

Chien-Hao Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10560529
    Abstract: A vehicle information and environmental monitoring compound vehicle system is provided, including a sensor device used as a mobile sensor for collecting sensory data of roads, and the sensor device integrates various sensor modules and the second-generation on board computer diagnostic system serial port. The sensor device also integrates a long-distance low-power Internet of Things (LoRa) communication protocol, which can transmit data through the long-distance low-power Internet of Things gateway, and upload data to the cloud platform based on algorithm. The results of the analysis can establish a wide range of traffic congestion model through the detection information of traffic flow, and traffic density. The use of pixel-based measurement methods can quantify the urban road temperature, establish the urban heat island effect model, analyze the influence of temperature and humidity on the disease spread, establish the disease diffusion model, and display the sensor data in the graphical user interface.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: February 11, 2020
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Joe-Air Jiang, Chih-Hong Sun, Tzai-Hung Wen, Jehn-Yih Juang, Chien-Hao Wang, Zheng-Wei Ye, Chao-Liang Hsieh
  • Publication number: 20200003548
    Abstract: A method for evaluating a leadframe surface includes positioning a leadframe on a measurement apparatus at a first predetermined distance relative to an end portion of a light source of an optical sensor; irradiating a predetermined area on a surface of the leadframe with light having a single predetermined wavelength from the light source; receiving, with a light receiver of the optical sensor, reflected light from the predetermined area on the surface of the leadframe, and converting the reflected light into an electric signal; determining a reflection intensity value of the predetermined area on the surface of the leadframe based on the electric signal; and calculating a reflection ratio of the predetermined area on the surface of the leadframe based on the reflection intensity value and a predetermined reference reflection intensity value associated with the light source.
    Type: Application
    Filed: September 10, 2019
    Publication date: January 2, 2020
    Inventors: Hung-Yu Chou, Chien-Hao Wang, Tse-Tsun Chiu, Fu-Kang Lee, Liang-Kang Su
  • Patent number: 10429174
    Abstract: A method for evaluating a leadframe surface includes positioning a leadframe on a measurement apparatus at a first predetermined distance relative to an end portion of a light source of an optical sensor; irradiating a predetermined area on a surface of the leadframe with light having a single predetermined wavelength from the light source; receiving, with a light receiver of the optical sensor, reflected light from the predetermined area on the surface of the leadframe, and converting the reflected light into an electric signal; determining a reflection intensity value of the predetermined area on the surface of the leadframe based on the electric signal; and calculating a reflection ratio of the predetermined area on the surface of the leadframe based on the reflection intensity value and a predetermined reference reflection intensity value associated with the light source.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: October 1, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Hung-Yu Chou, Chien-Hao Wang, Tse-Tsun Chiu, Fu-Kang Lee, Liang-Kang Su
  • Publication number: 20190186897
    Abstract: A method for evaluating a leadframe surface includes positioning a leadframe on a measurement apparatus at a first predetermined distance relative to an end portion of a light source of an optical sensor; irradiating a predetermined area on a surface of the leadframe with light having a single predetermined wavelength from the light source; receiving, with a light receiver of the optical sensor, reflected light from the predetermined area on the surface of the leadframe, and converting the reflected light into an electric signal; determining a reflection intensity value of the predetermined area on the surface of the leadframe based on the electric signal; and calculating a reflection ratio of the predetermined area on the surface of the leadframe based on the reflection intensity value and a predetermined reference reflection intensity value associated with the light source.
    Type: Application
    Filed: December 20, 2017
    Publication date: June 20, 2019
    Inventors: Hung-Yu CHOU, Chien-Hao WANG, Tse-Tsun CHIU, Fu-Kang LEE, Liang-Kang SU
  • Publication number: 20190075165
    Abstract: A vehicle information and environmental monitoring compound vehicle system is provided, including a sensor device used as a mobile sensor for collecting sensory data of roads, and the sensor device integrates various sensor modules and the second-generation on board computer diagnostic system serial port. The sensor device also integrates a long-distance low-power Internet of Things (LoRa) communication protocol, which can transmit data through the long-distance low-power Internet of Things gateway, and upload data to the cloud platform based on algorithm. The results of the analysis can establish a wide range of traffic congestion model through the detection information of traffic flow, and traffic density. The use of pixel-based measurement methods can quantify the urban road temperature, establish the urban heat island effect model, analyze the influence of temperature and humidity on the disease spread, establish the disease diffusion model, and display the sensor data in the graphical user interface.
    Type: Application
    Filed: November 10, 2017
    Publication date: March 7, 2019
    Inventors: Joe-Air Jiang, Chih-Hong Sun, Tzai-Hung Wen, Jehn-Yih Juang, Chien-Hao Wang, Zheng-Wei Ye, Chao-Liang Hsieh
  • Patent number: 10139444
    Abstract: A sensing device for power transmission line includes an induction coil device, a sensing circuit device, and a housing. A plurality of iron cores and a plurality of windings defined in the induction coil device. The windings are wound around the iron cores. A hole for power transmission line is defined in the induction coil device. The sensing circuit device detects operation status of a power transmission line and environmental parameters. The sensing circuit device includes a cover and a bottom plate. Multiple circuit boards are mounted on the bottom plate. The induction coil device is mounted on one side of the cover. Each of two ends of the housing has a streamline shape. The housing is hollow for receiving the sensing circuit device. The iron cores of the induction coil device includes at least one first iron core and at least one second iron core.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: November 27, 2018
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Joe-Air Jiang, Xiang-Yao Zheng, Chien-Hao Wang, Yu-Cheng Yang, Ching-Ya Tseng
  • Publication number: 20180177159
    Abstract: A bee-keeping equipment includes a container, and a temperature adjusting device including conductive elements, a hive frame, a temperature adjusting circuit and two conductive films. Each conductive element is configured at an upper edge of each sidewall of the container. Metal through holes are arranged at the inner side of the hive frame. The temperature adjusting circuit includes heating elements. One end of each heating element is inserted into one metal through hole, and the other end of each heating element is inserted into another metal through hole to form a net-structure for supporting a hive. The conductive films are electrically connected to the metal through holes. The hive frame has two extending portions. The conductive films are respectively configured under the extending portions.
    Type: Application
    Filed: May 1, 2017
    Publication date: June 28, 2018
    Inventors: Joe-Air Jiang, En-Cheng Yang, Hung-Jen Lin, Chien-Hao Wang, Chien-Peng Huang
  • Publication number: 20180046778
    Abstract: The fever epidemic detection system comprises a detection module, a control module and a communication module. The detection module measures and obtains a body-temperature measured value. The control module comprises a first operation unit, a determination unit and an alert unit. The first operation unit receives and calibrates the body-temperature measured value with a calibration factor, and generates a body-temperature calibrated value. The determination unit receives and determines whether the body-temperature calibrated value is within a preset normal body-temperature range and generates a determination result. The alert unit receives the determination result. The communication module transmits data to an external device. The alert unit generates a first alerting message, if the determination result shows that the body-temperature calibrated value is not within a preset normal body-temperature range.
    Type: Application
    Filed: April 15, 2016
    Publication date: February 15, 2018
    Inventors: JOE-AIR JIANG, CHIEN-HAO WANG, YA-AN CHAN, LIN-KUEI SU, CHENG-YUE LIU, PO-HAN CHEN, WEI-SHENG CHEN, CHING-YA TSENG
  • Publication number: 20170285091
    Abstract: A sensing device for power transmission line includes an induction coil device, a sensing circuit device, and a housing. A plurality of iron cores and a plurality of windings defined in the induction coil device. The windings are wound around the iron cores. A hole for power transmission line is defined in the induction coil device. The sensing circuit device detects operation status of a power transmission line and environmental parameters. The sensing circuit device includes a cover and a bottom plate. Multiple circuit boards are mounted on the bottom plate. The induction coil device is mounted on one side of the cover. Each of two ends of the housing has a streamline shape. The housing is hollow for receiving the sensing circuit device. The iron cores of the induction coil device includes at least one first iron core and at least one second iron core.
    Type: Application
    Filed: October 25, 2016
    Publication date: October 5, 2017
    Inventors: Joe-Air Jiang, Xiang-Yao Zheng, Chien-Hao Wang, Yu-Cheng Yang, Ching-Ya Tseng
  • Patent number: 9680935
    Abstract: A grid gateway and a transmission tower management system having a plurality of the grid gateways are disclosed. The grid gateways are connected with one another to form a mesh network. A plurality of sensors are provided within a wireless transmission range of the grid gateways. The sensors collect and send environmental parameters to the corresponding grid gateway within the wireless transmission range, in order to choose an optimal transmission path in the mesh network through grid gateways to transmit. The environmental parameters are transmitted through the optimal transmission path to a server for storage and analysis. A grid gateway and a transmission tower management system having a plurality of the grid gateways have broad and local area wireless transmission ability, so as to overcome restrictions of topography and communication to execute broad area management and monitor tasks.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: June 13, 2017
    Assignee: National Taiwan University
    Inventors: Joe-Air Jiang, Cheng-Long Chuang, Chia-Pang Chen, Chien-Hao Wang, Chih-Hao Syue, Xiang-Yao Zheng
  • Publication number: 20160014204
    Abstract: A grid gateway and a transmission tower management system having a plurality of the grid gateways are disclosed. The grid gateways are connected with one another to form a mesh network. A plurality of sensors are provided within a wireless transmission range of the grid gateways. The sensors collect and send environmental parameters to the corresponding grid gateway within the wireless transmission range, in order to choose an optimal transmission path in the mesh network through grid gateways to transmit. The environmental parameters are transmitted through the optimal transmission path to a server for storage and analysis. A grid gateway and a transmission tower management system having a plurality of the grid gateways have broad and local area wireless transmission ability, so as to overcome restrictions of topography and communication to execute broad area management and monitor tasks.
    Type: Application
    Filed: October 29, 2014
    Publication date: January 14, 2016
    Inventors: Joe-Air Jiang, Cheng-Long Chuang, Chia-Pang Chen, Chien-Hao Wang, Chih-Hao Syue, Xiang-Yao Zheng
  • Publication number: 20150366169
    Abstract: A honeybee behavior monitoring system, including a honeybee behavior monitoring device positioned in a beehive for counting and recording the in-and-out activity of honeybees near a beehive, wherein the honeybee behavior monitoring device includes a first sensing unit and a second sensing unit for generating sensing signals; a counting unit for recording and determining whether honeybees are entering or departing from the beehive; a transmission unit for transmitting the in-and-out activity count to an external device, wherein each honeybee behavior monitoring device transfers data therebetween via a wireless sensing network, and finally data is transmitted to a rear-end server for storage and subsequent analysis of honeybee behaviors according to the status of counting and recording in each honeybee behavior monitoring device and ambient beehive environmental data or meteorological data, thereby providing accurate in-and-out activity counts to facilitate honeybee behavior studies.
    Type: Application
    Filed: October 29, 2014
    Publication date: December 24, 2015
    Inventors: Joe-Air Jiang, En-Cheng Yang, Cheng-Long Chuang, Chi-Hui Chen, Chien-Hao Wang, Yu-Kai Huang, Min-Sheng Liao, Jing-Yun Wu
  • Publication number: 20150047254
    Abstract: An energy-saving type plant cultivation system is provided, which includes: a first power source for generating first electric power from solar or wind energy; a plant cultivation device electrically connected to the first power source for receiving the first electric power, and having a plurality of layers of cultivation plates and further having at least a transparent sidewall to facilitate a monitoring staff to observe growth of the plants; a second power source electrically connected to the plant cultivation device so as to supply second electric power to the plant cultivation device; and a power storage unit electrically connected to the first power source, the plant cultivation device and the second power source so as to receive and store the first electric power or the second electric power and supply third electric power to the plant cultivation device if the first electric power or the second electric power is not sufficient.
    Type: Application
    Filed: August 14, 2014
    Publication date: February 19, 2015
    Inventors: Joe-Air Jiang, Yu-Li Su, Kun-Chang Kuo, Jen-Cheng Wang, Jyh-cherng Shieh, Chien-Hao Wang, Yu-Kai Huang, Chi-Hui Chen, Chi-Yang Lee
  • Patent number: 8895368
    Abstract: A method for manufacturing a chip package structure includes following steps. A carrier having a metal layer is provided. A patterned photoresist layer is formed on the metal layer. The patterned photoresist layer has a plurality of first openings exposing a portion of the metal layer. Connection terminals are formed in the first openings, respectively, and the connection terminals are connected to the metal layer. A chip is placed on the carrier, and first pads of the chip are respectively connected to the connection terminals through a plurality of connection conductors. After the chip is placed on the carrier, the patterned photoresist layer is removed. A encapsulant is formed on the carrier. The encapsulant encapsulates the chip, the connection conductors, and the metal layer. The carrier and the metal layer are removed to expose the connection terminals.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: November 25, 2014
    Assignee: ChipMOS Technologies Inc.
    Inventor: Chien-Hao Wang
  • Publication number: 20140322869
    Abstract: A method for manufacturing a chip package structure includes following steps. A carrier having a metal layer is provided. A patterned photoresist layer is formed on the metal layer. The patterned photoresist layer has a plurality of first openings exposing a portion of the metal layer. Connection terminals are formed in the first openings, respectively, and the connection terminals are connected to the metal layer. A chip is placed on the carrier, and first pads of the chip are respectively connected to the connection terminals through a plurality of connection conductors. After the chip is placed on the carrier, the patterned photoresist layer is removed. A encapsulant is formed on the carrier. The encapsulant encapsulates the chip, the connection conductors, and the metal layer. The carrier and the metal layer are removed to expose the connection terminals.
    Type: Application
    Filed: December 18, 2013
    Publication date: October 30, 2014
    Applicant: ChipMOS Technologies Inc.
    Inventor: Chien-Hao Wang
  • Patent number: 8671562
    Abstract: A method for manufacturing a circuit board includes the steps of: forming a first wiring layer on a substrate; forming an insulating layer on the surface of the first wiring layer by means of electrophoretic deposition; forming a second wiring layer on the insulating layer and the surface of the substrate; and performing the follow-up procedures, such as forming a solder mask; thereby reducing the thickness of the circuit board and increasing the density of the circuit layout.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: March 18, 2014
    Assignee: Advanced Semiconductor Engineering Inc.
    Inventor: Chien Hao Wang
  • Patent number: 8510940
    Abstract: A method of fabricating a multi-trace via substrate is disclosed. A substrate at least having a first surface and a hole is provided, wherein the hole has a hole wall. A first conductive layer is formed on the entire surface of the substrate and the hole wall. A photoresist layer applied over the entire surface of the first conductive layer is selectively patterned to define a plurality of laterally separated regions on the first conductive layer. A patterned photoresist layer is used as a mask and a second conductive layer substantially thicker than the first conductive layer is electroplated on the laterally separated regions. The patterned photoresist layer is removed. The portion of the first conductive layer not covered by the second conductive layer is substantially removed to form a plurality of laterally separated traces extended on the first surface and through the hole.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: August 20, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Min-Yao Chen, Mao-Chang Chuang, Ming-Chiang Lee, Chien-Hao Wang
  • Patent number: 8416577
    Abstract: The present invention relates to a coreless substrate and a method for making the same. The method for making the coreless substrate includes: (a) providing a carrier and a first conductive layer, wherein the carrier has a first surface and a second surface, and the first conductive layer is disposed on the first surface of the carrier; (b) forming a first embedded circuit on the first conductive layer; (c) forming a first dielectric layer so as to cover the first embedded circuit; (d) removing the carrier; (e) removing part of the first conductive layer so as to form at least one first pad; and (f) forming a first solder mask so as to cover the first embedded circuit and the first dielectric layer and to expose the first pad. Therefore, the coreless substrate of the present invention has high density of layout and involves low manufacturing cost.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: April 9, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Hao Wang, Ming-Chiang Lee
  • Patent number: 8387239
    Abstract: An embedded circuit substrate comprising: a core structure having a first surface and a second surface opposite to each other; a first patterned conductive layer disposed on the first surface and embedded in the core structure; a second patterned conductive layer disposed on the second surface and embedded in the core structure; and a plurality of conductive blocks disposed in the core structure for conducting the first patterned conductive layer and the second patterned conductive layer is provided. Furthermore, a manufacturing method of an embedded circuit substrate is also provided.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: March 5, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Hao Wang, Ming-Chiang Lee
  • Patent number: 8372689
    Abstract: In one embodiment, a method of forming a semiconductor device package includes: (1) providing a carrier and a semiconductor device including an active surface; (2) forming a first redistribution structure including a first electrical interconnect extending laterally within the first structure and a plurality of second electrical interconnects extending vertically from a first surface of the first interconnect, each second interconnect including a lower surface adjacent to the first surface and an upper surface opposite the lower surface; (3) disposing the device on the carrier such that the active surface is adjacent to the carrier; (4) disposing the first structure on the carrier such that the upper surface of each second interconnect is adjacent to the carrier, and the second interconnects are positioned around the device; and (5) forming a second redistribution structure adjacent to the active surface, and including a third electrical interconnect extending laterally within the second structure.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: February 12, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ming-Chiang Lee, Chien-Hao Wang