Abstract: An electronic device is provided. The electronic device includes a base and a conductive layer that is disposed on the base and patterned by a plurality of processes. The plurality of processes include providing a mask substrate. The mask substrate includes a first substrate and a patterned substrate. In the cross-sectional view, the width of the first substrate is greater than or equal to the width of the patterned substrate. The plurality of processes include arranging the mask substrate and the base correspondingly. The plurality of processes also include performing exposure and development processes on the conductive layer for patterning the conductive layer, and removing the mask substrate.

Abstract: A magnetoresistive random access memory (MRAM) includes a first transistor and a second transistor on a substrate, a source line coupled to a first source/drain region of the first transistor, and a first metal interconnection coupled to a second source/drain region of the first transistor. Preferably, the first metal interconnection is extended to overlap the first transistor and the second transistor and the first metal interconnection further includes a first end coupled to the second source/drain region of the first transistor and a second end coupled to a magnetic tunneling junction (MTJ).

Abstract: A first polymer layer is formed across a package region and a test region. A first metal pattern is formed in the package region and a first test pattern is simultaneously formed in the test region. The first metal pattern has an upper portion located on the first polymer layer and a lower portion penetrating through the first polymer layer, and the first test pattern is located on the first polymer layer and has a first opening exposing the first polymer layer. A second polymer layer is formed on the first metal pattern in the package region and a second test pattern is simultaneously formed on the first test pattern in the test region. The second polymer layer has a second opening exposing the upper portion of the first metal pattern, and the second test pattern has a third opening greater than the first opening of the first test pattern.

Abstract: A memory device and a semiconductor die are provided. The memory device includes single-level-cells (SLCs) and multi-level-cells (MLCs). Each of the SLCs and the MLCs includes: a phase change layer; and a first electrode, in contact with the phase change layer, and configured to provide joule heat to the phase change layer during a programming operation. The first electrode in each of the MLCs is greater in footprint area as compared to the first electrode in each of the SLCs.

Abstract: A method for forming a target substrate is provided. The method includes providing a mask substrate. The method also includes providing a second base with a material layer. The method further includes arranging the mask substrate and the second base correspondingly. In addition, the method includes performing exposure and development processes on the material layer to form the target substrate and removing the mask substrate.

Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.

Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.

Abstract: In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.

Abstract: The invention provides a MEMS microphone. The MEMS microphone includes a substrate, having a first opening. A dielectric layer is disposed on the substrate, wherein the dielectric layer has a second opening aligned to the first opening. A diaphragm is disposed within the second opening of the dielectric layer, wherein a peripheral region of the diaphragm is embedded into the dielectric layer at sidewall of the second opening. A backplate layer is disposed on the dielectric layer and covering over the second opening. The backplate layer includes a plurality of acoustic holes arranged into a regular array pattern. The regular array pattern comprises a pattern unit, the pattern unit comprises one of the acoustic holes as a center hole, and peripheral holes of the acoustic holes surrounding the center hole with a same pitch to the center hole.

Abstract: A method for forming a target substrate is provided. The method includes providing a mask substrate. The method also includes providing a second base with a material layer. The method further includes arranging the mask substrate and the second base correspondingly. In addition, the method includes performing exposure and development processes on the material layer to form the target substrate and removing the mask substrate.

Abstract: A negative capacitance device includes a semiconductor layer. An interfacial layer is disposed over the semiconductor layer. An amorphous dielectric layer is disposed over the interfacial layer. A ferroelectric layer is disposed over the amorphous dielectric layer. A metal gate electrode is disposed over the ferroelectric layer. At least one of the following is true: the interfacial layer is doped; the amorphous dielectric layer has a nitridized outer surface; a diffusion-barrier layer is disposed between the amorphous dielectric layer and the ferroelectric layer; or a seed layer is disposed between the amorphous dielectric layer and the ferroelectric layer.

Abstract: A structure of micro-electro-mechanical-system (MEMS) microphone includes a substrate, having a first opening. A dielectric layer is disposed on the substrate, wherein the dielectric layer has a second opening aligned to the first opening. A membrane is disposed within the second opening of the dielectric layer. A peripheral region of the membrane is embedded into the dielectric layer at sidewall of the second opening. A backplate layer is disposed on the dielectric layer. The backplate layer includes a protection layer, having a peripheral region disposed on the dielectric layer and a central region with venting holes over the second opening. The central region of the protection layer further has anti-sticky structures at a side of the protection layer toward the membrane. An electrode layer is disposed on the side of the protection layer, surrounding the anti-sticky structures.

Abstract: In an embodiment, the invention provides a structure of MEMS microphone includes a substrate of semiconductor, having a first opening in the substrate. A dielectric layer is disposed on the substrate, having a dielectric opening. A diaphragm is within the dielectric opening and held by the dielectric layer at a peripheral region, wherein the diaphragm has a diaphragm opening. A back-plate is disposed on the dielectric layer, over the diaphragm. A protruding structure is disposed on the back-plate, protruding toward the diaphragm. At least one air valve plate is affixed on an end of the protruding structure within the diaphragm opening of the diaphragm. The air valve plate is activated when suffering an air flow with a pressure.

Abstract: A structure of micro-electro-mechanical-system (MEMS) microphone includes a substrate, having a first opening. A dielectric layer is disposed on the substrate, wherein the dielectric layer has a second opening aligned to the first opening. A membrane is disposed within the second opening of the dielectric layer. A peripheral region of the membrane is embedded into the dielectric layer at sidewall of the second opening. A backplate layer is disposed on the dielectric layer. The backplate layer includes a protection layer, having a peripheral region disposed on the dielectric layer and a central region with venting holes over the second opening. The central region of the protection layer further has anti-sticky structures at a side of the protection layer toward the membrane. An electrode layer is disposed on the side of the protection layer, surrounding the anti-sticky structures.

Abstract: A method for forming a mask substrate is provided. The method includes providing a first base and providing a mask layer on the first base. The method also includes patterning the mask layer to form a pattern, wherein the first base and the pattern form a patterned substrate and providing a first substrate. The method further includes providing an optical layer on the first substrate or on the patterned substrate and assembling the first substrate and the patterned substrate to form the mask substrate.

Abstract: A MEMS microphone includes a substrate. A dielectric layer is disposed on the substrate, having an opening and includes: indent region surrounding the opening; pillars extending from an indent surface at the indent region to the substrate; and an outer part surrounding the indent region and disposed on the substrate. A signal sensing space is created at the indent region between the pillars and between the pillars and the outer part. A first electrode layer is disposed on the indent surface of the dielectric layer. A second electrode layer is disposed on the substrate. A sensing diaphragm is held by the dielectric layer, including two elastic diaphragms supported by the dielectric layer; and a conductive plate between the first elastic diaphragm and the second elastic diaphragm. The conductive plate has a central part embedded in the holding structure and a peripheral part extending into the signal sensing space.

Abstract: A structure of micro-electro-mechanical-system microphone includes a substrate of semiconductor, having a first opening in the substrate. A dielectric layer is disposed on the substrate, the dielectric layer has a second opening, corresponding to the first opening. A diaphragm is located within the second opening, having an embedded part held by the dielectric layer and an exposed part exposed by the second opening. The exposed part has a junction peripheral region, a buffer peripheral region and a central region. The junction region has an elastic structure with slits, the buffer peripheral region includes a plurality of holes and is disposed between the junction peripheral region and the central region. A backplate is disposed on the dielectric layer above the second opening, wherein the backplate includes venting holes distributed at a region corresponding to the central part of the diaphragm.

Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.

Abstract: The invention provides a MEMS microphone. The MEMS microphone includes a substrate, having a first opening. A dielectric layer is disposed on the substrate, wherein the dielectric layer has a second opening aligned to the first opening. A diaphragm is disposed within the second opening of the dielectric layer, wherein a peripheral region of the diaphragm is embedded into the dielectric layer at sidewall of the second opening. A backplate layer is disposed on the dielectric layer and covering over the second opening. The backplate layer includes a plurality of acoustic holes arranged into a regular array pattern. The regular array pattern comprises a pattern unit, the pattern unit comprises one of the acoustic holes as a center hole, and peripheral holes of the acoustic holes surrounding the center hole with a same pitch to the center hole.

Abstract: A semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and at least one of a first switch disposed between the first potential supply line and the functional circuit and a second switch disposed between the second potential supply line and the functional circuit. The first switch and the second switch are negative capacitance FET.