Abstract: A semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and at least one of a first switch disposed between the first potential supply line and the functional circuit and a second switch disposed between the second potential supply line and the functional circuit. The first switch and the second switch are negative capacitance FET.

Abstract: A micro electro mechanical system (MEMS) microphone includes a substrate, having a substrate opening. A supporting dielectric layer is disposed on the substrate surrounding the substrate opening. A diaphragm is supported by the supporting dielectric layer above the substrate opening, wherein the diaphragm has a bowl-like structure being convex toward the substrate opening when the diaphragm is at an operation off state. A backplate is disposed on the supporting dielectric layer over the diaphragm, wherein the backplate includes a plurality of venting holes at a region corresponding to the substrate opening.

Abstract: A negative capacitance device includes a semiconductor layer. An interfacial layer is disposed over the semiconductor layer. An amorphous dielectric layer is disposed over the interfacial layer. A ferroelectric layer is disposed over the amorphous dielectric layer. A metal gate electrode is disposed over the ferroelectric layer. At least one of the following is true: the interfacial layer is doped; the amorphous dielectric layer has a nitridized outer surface; a diffusion-barrier layer is disposed between the amorphous dielectric layer and the ferroelectric layer; or a seed layer is disposed between the amorphous dielectric layer and the ferroelectric layer.

Abstract: A combined solar cell module includes a solar cell module, an end connection device, and an output connection device. The solar cell module includes first and second connection portions on opposite sides of a substrate, and connection lines which connect solar cells to the first and second connection portions. The first connection portion has a first holding space. The second connection portion has a second holding space corresponding to the first holding space in an up-and-down manner. First and second connection parts are within the first and second holding spaces respectively. At least one of the first and second connection parts is a magnetic material, and another one is a magnetic material or a magnetically attractable material. The end connection device and the first connection portion are detachable and connectable. The output connection device and the second connection portion are detachable and connectable, for outputting current generated by solar cells.

Abstract: A negative capacitance device includes a semiconductor layer. An interfacial layer is disposed over the semiconductor layer. An amorphous dielectric layer is disposed over the interfacial layer. A ferroelectric layer is disposed over the amorphous dielectric layer. A metal gate electrode is disposed over the ferroelectric layer. At least one of the following is true: the interfacial layer is doped; the amorphous dielectric layer has a nitridized outer surface; a diffusion-barrier layer is disposed between the amorphous dielectric layer and the ferroelectric layer; or a seed layer is disposed between the amorphous dielectric layer and the ferroelectric layer.

Abstract: In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.

Abstract: In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.

Abstract: A negative capacitance device includes a semiconductor layer. An interfacial layer is disposed over the semiconductor layer. An amorphous dielectric layer is disposed over the interfacial layer. A ferroelectric layer is disposed over the amorphous dielectric layer. A metal gate electrode is disposed over the ferroelectric layer. At least one of the following is true: the interfacial layer is doped; the amorphous dielectric layer has a nitridized outer surface; a diffusion-barrier layer is disposed between the amorphous dielectric layer and the ferroelectric layer; or a seed layer is disposed between the amorphous dielectric layer and the ferroelectric layer.

Abstract: A Micro-Electro-Mechanical Systems (MEMS) device includes a substrate, a dielectric supporting layer, a diaphragm, a backplate. The substrate has a substrate opening corresponding to a diaphragm region. The dielectric supporting layer is disposed on the substrate, having a dielectric opening corresponding to the substrate opening to form the diaphragm region. The diaphragm within the dielectric opening is held by the dielectric supporting layer at a periphery. The backplate is disposed on the dielectric supporting layer, having a plurality of venting holes, connecting to the dielectric opening. The backplate includes a conductive layer and a passivation layer covering over the conductive layer at a first side opposite to the diaphragm, wherein a second side of the conductive layer is facing to the diaphragm and not covered by the passivation layer.

Abstract: A Micro-Electro-Mechanical Systems (MEMS) device includes a substrate, a dielectric supporting layer, a diaphragm, a backplate. The substrate has a substrate opening corresponding to a diaphragm region. The dielectric supporting layer is disposed on the substrate, having a dielectric opening corresponding to the substrate opening to form the diaphragm region. The diaphragm within the dielectric opening is held by the dielectric supporting layer at a periphery. The backplate is disposed on the dielectric supporting layer, having a plurality of venting holes, connecting to the dielectric opening. The backplate includes a conductive layer and a passivation layer covering over the conductive layer at a first side opposite to the diaphragm, wherein a second side of the conductive layer is facing to the diaphragm and not covered by the passivation layer.

Abstract: A semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and at least one of a first switch disposed between the first potential supply line and the functional circuit and a second switch disposed between the second potential supply line and the functional circuit. The first switch and the second switch are negative capacitance FET.

Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.

Abstract: This invention relates to flame-retardant modified maleic anhydride resins. This resin copolymer consists of styrene, maleic anhydride and, along with a halogen-free epoxy resin, interacts with a hydroxyl group to become a flame-retardant maleic anhydride copolymer that can be applied to copper clad laminate and prepreg. This composition comprises: (A) one or more epoxy resin mixtures; (B) modified styrene-maleic anhydride curing agent copolymer; (C) additives; (D) inorganic fillers. When the aggregate amount of components (A), (B) and (C) equals 100%, component (A), epoxy resin mixture, is 60%-80% in total weight, component (B), modified styrene-maleic anhydride curing agent copolymer, equals 10%-40% in total weight. This invention uses the copolymer of Styrene and Maleic anhydride to generate a flame-retardant hydroxyl group, and with the phosphorus additive, the above components eventually interact to form a flame-retardant modified maleic anhydride copolymer curing agent.

Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.

Abstract: A Micro-Electro-Mechanical Systems (MEMS) device includes a substrate, a dielectric supporting layer, a diaphragm, a backplate. The substrate has a substrate opening corresponding to a diaphragm region. The dielectric supporting layer is disposed on the substrate, having a dielectric opening corresponding to the substrate opening to form the diaphragm region. The diaphragm within the dielectric opening is held by the dielectric supporting layer at a periphery. The backplate is disposed on the dielectric supporting layer, having a plurality of venting holes, connecting to the dielectric opening. The backplate includes a conductive layer and a passivation layer covering over the conductive layer at a first side opposite to the diaphragm, wherein a second side of the conductive layer is facing to the diaphragm and not covered by the passivation layer.

Abstract: A micro-electrical-mechanical system (MEMS) microphone includes a MEMS structure, having a substrate, a diaphragm, and a backplate, wherein the substrate has a cavity and the backplate is between the cavity and the diaphragm. The backplate has multiple venting holes, which are connected to the cavity and allows the cavity to extend to the diaphragm. Further, an adhesive layer is disposed on the substrate, surrounding the cavity. A cover plate is adhered on the adhesive layer, wherein the cover plate has an acoustic hole, dislocated from the cavity without direct connection.

Abstract: An antenna device includes a first dielectric substrate, a first radiator disposed on the first dielectric substrate, a second dielectric substrate disposed on the first radiator, a second radiator disposed between the first dielectric substrate and the second dielectric substrate, a main radiator, disposed on the second dielectric substrate, and a modulation structure located between a first radiation portion of the first radiator and a second radiation portion of the second radiator. The first radiation portion, the modulation structure, and the second radiation portion are located in a central area.

Abstract: A display manufacturing method comprises steps of: moving a first substrate and a second substrate by a conveying apparatus; and implementing a first exposure and a second exposure of the first substrate and a first exposure and a second exposure of the second substrate by at least one light emitting element when the conveying apparatus drives the first and second substrates to pass through the light source module. When the first exposures of the first and second substrates are implemented, the moving directions of the first and second substrates are opposite, or when the second exposures of the first and second substrates are implemented, the moving directions of the first and second substrates are opposite. A photo alignment process is also disclosed.

Abstract: A light exposure system executing a light exposure process to a plurality of assembly cells, each of which includes a first substrate, a second substrate and a liquid crystal layer disposed between the first and second substrates, comprises: a transmission device; two moving stages disposed on the transmission device and carrying the assembly cells; and a light source module including at least a light emitting element, wherein the transmission device moves at least one of the moving stages carrying the assembly cell or the light source module, and the light emitting element emits the light to the assembly cell, wherein the assembly cells include a first assembly cell and a second assembly cell, the moving stages carry the first assembly cell and the second assembly cell, respectively, wherein when the light exposure process is executed to the first assembly cell, the second assembly cell receives the work of cell replacement and alignment, electrode contact and application of electric field, wherein when the

Abstract: A display manufacturing method comprises steps of: moving a first substrate and a second substrate by a conveying apparatus; and implementing a first exposure and a second exposure of the first substrate and a first exposure and a second exposure of the second substrate by at least one light emitting element when the conveying apparatus drives the first and second substrates to pass through the light source module. When the first exposures of the first and second substrates are implemented, the moving directions of the first and second substrates are opposite, or when the second exposures of the first and second substrates are implemented, the moving directions of the first and second substrates are opposite. A photo alignment process is also disclosed.