Patents by Inventor Chien-Hsing Lee

Chien-Hsing Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11114540
    Abstract: A semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and at least one of a first switch disposed between the first potential supply line and the functional circuit and a second switch disposed between the second potential supply line and the functional circuit. The first switch and the second switch are negative capacitance FET.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: September 7, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Hsing Lee, Chih-Sheng Chang, Wilman Tsai, Chia-Wen Chang, Ling-Yen Yeh, Carlos H. Diaz
  • Publication number: 20210195340
    Abstract: In an embodiment, the invention provides a structure of MEMS microphone includes a substrate of semiconductor, having a first opening in the substrate. A dielectric layer is disposed on the substrate, having a dielectric opening. A diaphragm is within the dielectric opening and held by the dielectric layer at a peripheral region, wherein the diaphragm has a diaphragm opening. A back-plate is disposed on the dielectric layer, over the diaphragm. A protruding structure is disposed on the back-plate, protruding toward the diaphragm. At least one air valve plate is affixed on an end of the protruding structure within the diaphragm opening of the diaphragm. The air valve plate is activated when suffering an air flow with a pressure.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 24, 2021
    Applicant: Solid State System Co., Ltd.
    Inventors: Tsung-Min Hsieh, Cheng-Wei Tsai, Chien-Hsing Lee
  • Patent number: 11043489
    Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: June 22, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wen Chang, Hong-Nien Lin, Chien-Hsing Lee, Chih-Sheng Chang, Ling-Yen Yeh, Wilman Tsai, Yee-Chia Yeo
  • Publication number: 20210175342
    Abstract: In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.
    Type: Application
    Filed: February 19, 2021
    Publication date: June 10, 2021
    Inventors: Chun-Chieh LU, Cheng-Yi PENG, Chien-Hsing LEE, Ling-Yen YEH, Chih-Sheng CHANG, Carlos H. DIAZ
  • Publication number: 20210144485
    Abstract: A MEMS microphone includes a substrate. A dielectric layer is disposed on the substrate, having an opening and includes: indent region surrounding the opening; pillars extending from an indent surface at the indent region to the substrate; and an outer part surrounding the indent region and disposed on the substrate. A signal sensing space is created at the indent region between the pillars and between the pillars and the outer part. A first electrode layer is disposed on the indent surface of the dielectric layer. A second electrode layer is disposed on the substrate. A sensing diaphragm is held by the dielectric layer, including two elastic diaphragms supported by the dielectric layer; and a conductive plate between the first elastic diaphragm and the second elastic diaphragm. The conductive plate has a central part embedded in the holding structure and a peripheral part extending into the signal sensing space.
    Type: Application
    Filed: November 7, 2019
    Publication date: May 13, 2021
    Applicant: Solid State System Co., Ltd.
    Inventors: Tsung-Min Hsieh, Li-Chi Tsao, Chien-Hsing Lee
  • Publication number: 20210136483
    Abstract: A structure of micro-electro-mechanical-system microphone includes a substrate of semiconductor, having a first opening in the substrate. A dielectric layer is disposed on the substrate, the dielectric layer has a second opening, corresponding to the first opening. A diaphragm is located within the second opening, having an embedded part held by the dielectric layer and an exposed part exposed by the second opening. The exposed part has a junction peripheral region, a buffer peripheral region and a central region. The junction region has an elastic structure with slits, the buffer peripheral region includes a plurality of holes and is disposed between the junction peripheral region and the central region. A backplate is disposed on the dielectric layer above the second opening, wherein the backplate includes venting holes distributed at a region corresponding to the central part of the diaphragm.
    Type: Application
    Filed: November 5, 2019
    Publication date: May 6, 2021
    Applicant: Solid State System Co., Ltd.
    Inventors: Tsung-Min Hsieh, Cheng-Wei Tsai, Chien-Hsing Lee
  • Publication number: 20210124257
    Abstract: A method for forming a mask substrate is provided. The method includes providing a first base and providing a mask layer on the first base. The method also includes patterning the mask layer to form a pattern, wherein the first base and the pattern form a patterned substrate and providing a first substrate. The method further includes providing an optical layer on the first substrate or on the patterned substrate and assembling the first substrate and the patterned substrate to form the mask substrate.
    Type: Application
    Filed: December 16, 2019
    Publication date: April 29, 2021
    Inventors: Chien-Hsing LEE, Chin-Lung TING, Jung-Chuan WANG, Hong-Sheng HSIEH
  • Patent number: 10937783
    Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: March 2, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wen Chang, Hong-Nien Lin, Chien-Hsing Lee, Chih-Sheng Chang, Ling-Yen Yeh, Wilman Tsai, Yee-Chia Yeo
  • Patent number: 10930769
    Abstract: In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: February 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chieh Lu, Cheng-Yi Peng, Chien-Hsing Lee, Ling-Yen Yeh, Chih-Sheng Chang, Carlos H. Diaz
  • Patent number: 10868132
    Abstract: A semiconductor device includes a first potential supply line for supplying a first potential, a second potential supply line for supplying a second potential lower than the first potential, a functional circuit, and at least one of a first switch disposed between the first potential supply line and the functional circuit and a second switch disposed between the second potential supply line and the functional circuit. The first switch and the second switch are negative capacitance FET.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Hsing Lee, Chih-Sheng Chang, Wilman Tsai, Chia-Wen Chang, Ling-Yen Yeh, Carlos H. Diaz
  • Publication number: 20200385263
    Abstract: A package structure of micro-electro-mechanical-system microphone includes a ceramic packaging substrate, embedded with a first circuit route, wherein the first circuit route includes a first metal sealing ring on a surface of the ceramic packaging substrate. An integrated circuit is disposed on the surface of the ceramic packaging substrate. A MEMS microphone die is disposed on the surface of the ceramic packaging substrate, wherein the MEMS microphone die is electrically connected to the integrated circuit. A cap structure is disposed on the first metal sealing ring of the ceramic packaging substrate, wherein the cap structure has a second metal sealing ring on a surface of the cap structure, wherein the second metal sealing ring is disposed on the first metal sealing ring, so that the cap structure covers on the ceramic packaging substrate.
    Type: Application
    Filed: June 6, 2019
    Publication date: December 10, 2020
    Applicant: Solid State System Co., Ltd.
    Inventors: Chien-Hsing Lee, Tsung-Min Hsieh
  • Publication number: 20200365682
    Abstract: A negative capacitance device includes a semiconductor layer. An interfacial layer is disposed over the semiconductor layer. An amorphous dielectric layer is disposed over the interfacial layer. A ferroelectric layer is disposed over the amorphous dielectric layer. A metal gate electrode is disposed over the ferroelectric layer. At least one of the following is true: the interfacial layer is doped; the amorphous dielectric layer has a nitridized outer surface; a diffusion-barrier layer is disposed between the amorphous dielectric layer and the ferroelectric layer; or a seed layer is disposed between the amorphous dielectric layer and the ferroelectric layer.
    Type: Application
    Filed: August 3, 2020
    Publication date: November 19, 2020
    Inventors: Chun-Chieh Lu, Cheng-Yi Peng, Chien-Hsing Lee, Ling-Yen Yeh, Chih-Sheng Chang, Carlos H. Diaz
  • Patent number: 10841710
    Abstract: A package structure of MEMS microphone is provided. The MEMS microphone includes a MEMS microphone chip disposed on a circuit board. The MEMS microphone chip comprises a first bonding pad, including a metal pad on a top of the MEMS microphone chip; and a protection layer fully enclosing a sidewall of the metal pad and also partially disposed on a top of the metal pad. A circuit chip is disposed on the circuit board, wherein the circuit chip comprises a second bonding pad. A bonding wire is connected between the first bonding pad and the second bonding pad.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: November 17, 2020
    Assignee: Solid State System Co., Ltd.
    Inventors: Chien-Hsing Lee, Tsung-Min Hsieh, Cheng-Wei Tsai
  • Patent number: 10815372
    Abstract: This invention relates to flame-retardant modified maleic anhydride resins. This resin copolymer consists of styrene, maleic anhydride and, along with a halogen-free epoxy resin, interacts with a hydroxyl group to become a flame-retardant maleic anhydride copolymer that can be applied to copper clad laminate and prepreg. This composition comprises: (A) one or more epoxy resin mixtures; (B) modified styrene-maleic anhydride curing agent copolymer; (C) additives; (D) inorganic fillers. When the aggregate amount of components (A), (B) and (C) equals 100%, component (A), epoxy resin mixture, is 60%-80% in total weight, component (B), modified styrene-maleic anhydride curing agent copolymer, equals 10%-40% in total weight. This invention uses the copolymer of Styrene and Maleic anhydride to generate a flame-retardant hydroxyl group, and with the phosphorus additive, the above components eventually interact to form a flame-retardant modified maleic anhydride copolymer curing agent.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: October 27, 2020
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Cheng-Chung Lee, Jung-Hai Huang, Chien-Hsing Lee, Chun-Hsiung Yang
  • Patent number: 10798493
    Abstract: A Micro-Electro-Mechanical Systems (MEMS) device includes a substrate, a dielectric supporting layer, a diaphragm, a backplate. The substrate has a substrate opening corresponding to a diaphragm region. The dielectric supporting layer is disposed on the substrate, having a dielectric opening corresponding to the substrate opening to form the diaphragm region. The diaphragm within the dielectric opening is held by the dielectric supporting layer at a periphery. The backplate is disposed on the dielectric supporting layer, having a plurality of venting holes, connecting to the dielectric opening. The backplate includes a conductive layer and a passivation layer covering over the conductive layer at a first side opposite to the diaphragm, wherein a second side of the conductive layer is facing to the diaphragm and not covered by the passivation layer.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: October 6, 2020
    Assignee: Solid State System Co., Ltd.
    Inventors: Tsung-Min Hsieh, Chien-Hsing Lee, Cheng-Wei Tsai
  • Patent number: 10741678
    Abstract: In a method of manufacturing a negative capacitance structure, a dielectric layer is formed over a substrate. A first metallic layer is formed over the dielectric layer. After the first metallic layer is formed, an annealing operation is performed, followed by a cooling operation. A second metallic layer is formed. After the cooling operation, the dielectric layer becomes a ferroelectric dielectric layer including an orthorhombic crystal phase.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: August 11, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chieh Lu, Carlos H. Diaz, Chih-Sheng Chang, Cheng-Yi Peng, Ling-Yen Yeh, Chien-Hsing Lee
  • Patent number: 10734472
    Abstract: A negative capacitance device includes a semiconductor layer. An interfacial layer is disposed over the semiconductor layer. An amorphous dielectric layer is disposed over the interfacial layer. A ferroelectric layer is disposed over the amorphous dielectric layer. A metal gate electrode is disposed over the ferroelectric layer. At least one of the following is true: the interfacial layer is doped; the amorphous dielectric layer has a nitridized outer surface; a diffusion-barrier layer is disposed between the amorphous dielectric layer and the ferroelectric layer; or a seed layer is disposed between the amorphous dielectric layer and the ferroelectric layer.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: August 4, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chieh Lu, Cheng-Yi Peng, Chien-Hsing Lee, Ling-Yen Yeh, Chih-Sheng Chang, Carlos H. Diaz
  • Patent number: 10728674
    Abstract: A structure of micro-electro-mechanical-system (MEMS) microphone package includes a packaging substrate and an integrated circuit disposed on the packaging substrate. In addition, a MEMS microphone is disposed on the packaging substrate, wherein the MEMS microphone is electrically connected to the integrated circuit. A conductive adhesion layer is disposed on the packaging substrate, surrounding the integrated circuit and the MEMS microphone. A cap structure has a bottom part being adhered to the conductive adhesion layer. An underfill layer is disposed on the packaging substrate, covering an outer side of the conductive adhesion layer.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: July 28, 2020
    Assignee: Solid State System Co., Ltd.
    Inventors: Tsung-Min Hsieh, Li-Chi Tsao, Chien-Hsing Lee, Jhyy-Cheng Liou
  • Patent number: 10720708
    Abstract: An antenna device includes a first dielectric substrate, a first radiator disposed on the first dielectric substrate, a second dielectric substrate disposed on the first radiator, a second radiator disposed between the first dielectric substrate and the second dielectric substrate, a main radiator, disposed on the second dielectric substrate, and a modulation structure located between a first radiation portion of the first radiator and a second radiation portion of the second radiator. The first radiation portion, the modulation structure, and the second radiation portion are located in a central area.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: July 21, 2020
    Assignee: INNOLUX CORPORATION
    Inventors: Huei-Ying Chen, I-Yin Li, Chia-Chi Ho, Hsu-Kuan Hsu, Ker-Yih Kao, Chung-Kuang Wei, Chin-Lung Ting, Cheng-Chi Wang, Chien-Hsing Lee
  • Publication number: 20200068317
    Abstract: A structure of micro-electro-mechanical-system (MEMS) microphone package includes a packaging substrate and an integrated circuit disposed on the packaging substrate. In addition, a MEMS microphone is disposed on the packaging substrate, wherein the MEMS microphone is electrically connected to the integrated circuit. A conductive adhesion layer is disposed on the packaging substrate, surrounding the integrated circuit and the MEMS microphone. A cap structure has a bottom part being adhered to the conductive adhesion layer. An underfill layer is disposed on the packaging substrate, covering an outer side of the conductive adhesion layer.
    Type: Application
    Filed: August 27, 2018
    Publication date: February 27, 2020
    Applicant: Solid State System Co., Ltd.
    Inventors: Tsung-Min Hsieh, Li-Chi Tsao, Chien-Hsing Lee, Jhyy-Cheng Liou