Abstract: A liquid crystal display panel comprise a first substrate, a second substrate and a electrode structure. The electrode structure is disposed on the first substrate. The electrode structure further comprises a first sub-electrode having a first stem electrode with a first end edge and a first branch electrode nearest the first end edge, and a second sub-electrode having a second stem electrode with a second end edge and a second branch electrode nearest the second end edge. The first sub-electrode and the second sub-electrode are adjacent to each other, and the first end edge are adjacent to the second end edge. A first distance between the first end edge and the first branch electrode is different from a second distance between the second end edge and the second branch electrode.

Abstract: A liquid crystal display (LCD) panel comprising a signal line, a first dielectric layer, a liquid crystal layer, a pixel electrode, and a thin film transistor (TFT) is provided. The first dielectric layer with a first permittivity ?1 is formed on the signal line and the TFT. An average permittivity of the liquid crystal layer is a second permittivity ?2 greater than the first permittivity ?1. The pixel electrode neighbors with the signal line. The distance between the signal line and a side of the first dielectric layer is a first distance d1, and the distance between a side of the first dielectric layer and a side of the pixel electrode is a second distance d2, wherein the second permittivity ?2, the first permittivity ?1, the first distance d1 and the second distance d2 are conformed to the following equation: ( 1 ? ? ? 1 ? ? ? 2 × ? 2 ? 1 + 1 ) × ? ? ? 2 < V ? ? th V ? ? d .

Abstract: A liquid crystal display (LCD) panel is provided. The LCD panel includes: a liquid crystal layer, a first data line, a scan line, a pixel electrode, and a first thin film transistor (TFT). The liquid crystal layer includes a high-dielectric-constant liquid crystal material, and the pixel electrode drives the liquid crystal layer. The first TFT includes a first electrode and a second electrode. The first electrode, electrically connected to the pixel electrode, has at least two first branch electrodes. The second electrode, electrically connected to the first data line, has at least one second branch electrode. A first overlapped area of the first electrode and the scan line is greater than a second overlapped area of the second electrode and the scan line, and the second branch electrode is disposed between two of the first branch electrodes.

Abstract: A method for manufacturing a non-volatile memory structure includes providing a substrate having a memory region and a logic region defined thereon, masking the logic region while forming at least a first gate in the memory region, forming an oxide-nitride-oxide (ONO) structure under the first gate, forming an oxide structure covering the ONO structure on the substrate, masking the memory region while forming a second gate in the logic region, and forming a first spacer on sidewalls of the first gate and a second spacer on sidewalls of the second gate simultaneously.

Abstract: A manipulating method of a nonvolatile memory is provided and comprises following steps. The nonvolatile memory having a plurality of memory cell is provided. Two adjacent memory cells correspond to one bit and comprise a substrate, a first and another first doping regions, a second doping region, a charge trapping layer, a control gate, a first bit line, a source line and a second bit line different from the first bit line. A first and a second channel are formed. The charge trapping layer is disposed on the first and the second channels. The two adjacent memory cells are programmed by following steps. A first positive and negative voltages are applied to the control gate between the first and the second doping regions and the control gate between the second and the another first doping regions, respectively. A first voltage is applied to the source line.

Abstract: A display system includes a stylus pen and a touch screen module. The touch screen module includes a touch screen. A control method of the display system includes activating a command input mode of the display system by the stylus pen. An input command from the stylus pen to the touch screen is received by the touch screen after the command input mode is activated. Performer a corresponding operation corresponding to the input command on the touch screen according to which command among a plurality of predetermined commands of the display system to which the input command corresponds.

Abstract: A liquid crystal display panel including a first substrate, a second substrate, a liquid crystal layer and an electrode structure is provided. The liquid crystal layer is located between the first substrate and the second substrate. The electrode structure is disposed on the first substrate and comprises a first and a second sub-electrodes. The first and the second sub-electrodes are separated from each other and respectively comprises first and second branch portions. The first branch portion comprises a plurality of first branch electrodes. Two adjacent first branch electrodes are substantially parallel to each other and separated from each other by a first interval. The second branch portion comprises a plurality of second branch electrodes. Two adjacent second branch electrodes are substantially parallel to each other and separated from each other by a second interval.

Abstract: A method for manufacturing a non-volatile memory structure includes providing a substrate having a gate structure, performing a first oxidation process to form a first SiO layer at least covering a bottom corner of the conductive layer, performing a first etching process to remove the first SiO layer and a portion of the dielectric layer to form a cavity, performing a second oxidation process to form a second SiO layer covering sidewalls of the cavity and a third SiO layer covering a surface of the substrate, forming a first SiN layer filling in the cavity and covering the gate structure on the substrate, and removing a portion of the first SiN layer to form a SiN structure including a foot portion filling in the cavity and an erection portion upwardly extended from the foot portion, and the erection portion covering sidewalls of the gate structure.

Abstract: A signal coupling circuit for generating an output signal according to an input signal is provided. The signal coupling circuit includes: a coupling capacitor, configured to generate a coupling signal according to the input signal; a clock generating circuit, configured to generate a clock and determine a duty cycle of the clock by the coupling capacitor; a discharge circuit, configured to intermittently discharge the coupling capacitor according to the duty cycle of the clock; and an output circuit, coupled to the coupling capacitor, for generating the output signal according to the coupling signal.

Abstract: An electronic module includes a first circuit board having a first surface, a second circuit board having a second surface, first electronic components on the first surface, second electronic components on the second surface, a first conductive fence, and a second conductive fence. The first conductive fence encloses the first electronic components and has a first opening exposing the first electronic components. The second conductive fence encloses the second electronic components and has a second opening exposing the second electronic components. The first opening of the first conductive fence joints the second opening of the second conductive fence, such that the first electronic components and the second electronic components are surrounded by the first circuit board, the second circuit board, the first conductive fence, and the second conductive fence. At least one of the first electronic components is higher than the first conductive fence.

Abstract: A non-volatile memory includes a substrate, a gate dielectric layer, a gate conductive layer, a nitride layer, a spacer, a first oxide layer, and a second oxide layer. The gate conductive layer, substrate and gate dielectric layer cooperatively constitute a symmetrical opening thereamong. The nitride layer has an L-shape and formed with a vertical part extending along a sidewall of the gate conductive layer and a horizontal part extending into the opening, wherein the vertical part and the horizontal part are formed as an integral structure and a height of the vertical part is below a top surface of the gate conductive layer. The spacer is disposed on the substrate and the nitride layer. The first oxide layer is disposed among the gate conductive layer, the nitride layer and the gate dielectric layer. The second oxide layer is disposed among the gate dielectric layer, the nitride layer and the substrate.

Abstract: An audio jack for receiving an audio plug includes a connection hole with a position detection portion and a first audio channel contact portion therein. When the audio plug is inserted into the connection hole to the linking position, a first audio channel connection portion of the audio plug contacts the position detection portion and the first audio channel contact portion. The position detection portion and the first audio channel contact portion respectively have a first distance and a second distance to an opening of the connection hole, wherein the second distance is smaller than the first distance.

Abstract: A driving device and a driving method for a liquid crystal display are provided. The driving device includes a memory unit, a comparator, a compensation unit, and a selector. The memory unit provides a storage image and a previous comparison result. The comparator compares a present image with the storage image and outputs a present comparison result. The compensation unit processes the present image according to the storage image to generate a plurality of processed present images. The selector selects and outputs one of the present image and the processed present images according to the previous comparison result and the present comparison result. Thereby, the space required in the memory unit is reduced and the image display quality is improved.

Abstract: A method for programming a non-volatile memory cell is described. The memory cell includes a substrate, a gate over the substrate, a charge-trapping structure at least between the substrate and the gate, and first and second S/D regions in the substrate beside the gate. The method includes performing a channel-initiated secondary electron (CHISEL) injection process to inject electrons to the charge-trapping structure.

Abstract: A movable fixing structure is used for causing the first casing to be combined with or detached from the second casing along a first axial direction. The movable fixing structure includes a blocking component, a locating element and a limiting element. The blocking component is movably disposed on the first casing along a second axial direction. The blocking component is used for moving between a first position and a second position. The locating element has a first locating portion and a second locating portion. The locating element is disposed on the first casing and is used for moving between a third and a fourth position along a third axial direction. The limiting element is disposed on the second casing and is used for interfering with the second locating portion on the first axial direction.

Abstract: A connector component that is used for connecting a first electronic device and a second electronic device via the connector component is provided. The connector component includes a first connection component, a second connection component and fixing element. The first connection component electronically extends from the first electronic device and has a fastening portion. The second connection component is disposed in the second electronic device. The fixing element is disposed in the second electronic device and is located next to the second connection component. When the first connection component is coupled to the second connection component, the fixing element is fastened with the fixing portion, so as to fix the first connection component to the second connection component.

Abstract: A liquid crystal display panel is disclosed, which comprises: a first substrate; a second substrate opposite to the first substrate; an optically isotropic liquid crystal layer disposed between the first substrate and the second substrate; and a protruding electrode layer composed of a polymer conductive material and disposed on the first substrate. Besides, when a protruding part is composed of a non-conductive organic material, the liquid crystal display panel further comprises: an electrode layer disposed on the protruding electrode layer; and a submicron structure layer, a multilayer film, or a micro-reflection layer is disposed between the protruding electrode layer and the first substrate.

Abstract: A blue phase liquid crystal (BPLC) display panel includes a first substrate, a second substrate, a protrusion, a BPLC, and a driving electrode. The protrusion is disposed on the first substrate. The BPLC is disposed between the first and second substrates. The driving electrode covers the protrusion. A vertical distance from the protrusion's bottom to one end portion of the driving electrode is larger than zero and less than or equal to four fifths of a height of the protrusion. Thereby, the production yield of the BPLC display panel can be increased.

Abstract: In response to a first level of the clock signal, an inverting output of a flip-flop circuit is connected, via a non-inverting input thereof, to a first intermediate node of the flip-flop circuit and a non-inverting output of the flip-flop circuit is connected, via an inverting input thereof, to a second intermediate node of the flip-flop circuit. In response to a second level of the clock signal, the first intermediate node is connected, via a third intermediate node of the flip-flop circuit, to the non-inverting output and the second intermediate node is connected, via a fourth intermediate node of the flip-flop circuit, to the inverting output. A first cross-coupled gates arrangement of the flip-flop circuit is coupled between the first and second intermediate nodes. A second cross-coupled gates arrangement of the flip-flop circuit is coupled between the third and fourth intermediate nodes.

Abstract: This disclosure provides a LC panel and the UV curing method therein for the LC curing treatment. The LC panel includes: a first substrate with a plurality of protrusion electrodes formed thereon; a second substrate disposed on the first substrate; a LC layer interposed between the first and second substrates; and a deflecting structure disposed between the first and second substrates and configured for changing optical paths of UV light; wherein the UV light passes through the areas between the neighboring protrusion electrodes, and the deflecting structure is located in the optical paths of the UV light.