Abstract: A method of manufacturing a metallized ceramic substrate includes forming a metal layer on a ceramic substrate, and forming on the metal layer a resist having a first patterned resist opening and a second patterned resist opening for the metal layer to be exposed therefrom. A first width of the first patterned resist opening is greater than the thickness of the metal layer, and a second width of the second patterned resist opening is less than the thickness of the metal layer. A wet-etching process is conducted, to form in the first patterned resist opening a patterned metal layer opening and form in the second patterned resist opening a patterned metal layer dent. Therefore, an internal stress between the metal layer and the ceramic substrate is reduced, and the yield rate and reliability of the metallized ceramic substrate is increased.

Abstract: A method of selective metallization on a ceramic substrate includes selectively forming an active brazing material on a predetermined area of a surface of a ceramic substrate, attaching the metal layer to the ceramic substrate with the active brazing material, performing a brazing process on the active brazing material, forming an etching stop layer on the metal layer and performing an etching process, and removing the etching stop layer. The method can be applied to a severe environment, and the conchoidal fracture between the ceramic substrate and the metal layer can also be avoided. The present invention not only simplifies the process but also improves the product yield.

Abstract: A method of fabricating a substrate having a plurality of conductive through holes is disclosed. Release films are formed on opposite sides of a substrate, and a plurality of through holes penetrating the release films and the substrate are formed. A first metal layer is formed on the release films and the sidewall of each of the through holes prior to removing the release films and the first metal layer thereon. A second metal layer is formed on the first metal layer on the sidewalls of the through holes by electroless plating. Compared to the prior art, the method is simpler and cheaper to carry out while the conductive through holes and a surface circuit layer thereof are fabricated separately, thereby avoiding disadvantage of forming a circuit layer on the surface of the substrate too thick.

Abstract: A method of fabricating alight emitting diode packaging structure provides a metallized ceramic heat dissipation substrate and a reflector layer, and the metallized ceramic heat dissipation substrate is bonded with the reflector layer through an adhesive. The reflector layer has an opening for a surface of the metallized ceramic heat dissipation substrate to be exposed therefrom. The reflector layer may be formed with ceramic or polymer plastic material, to enhance the refractory property and the reliability of the package structure. In addition, the packaging structure of the present invention may make use of existing packaging machine for subsequent electronic component packaging, without increasing the fabrication cost.

Abstract: A method of manufacturing a metallized ceramic substrate includes forming a metal layer on a ceramic substrate, and forming on the metal layer a resist having a first patterned resist opening and a second patterned resist opening for the metal layer to be exposed therefrom. A first width of the first patterned resist opening is greater than the thickness of the metal layer, and a second width of the second patterned resist opening is less than the thickness of the metal layer. A wet-etching process is conducted, to form in the first patterned resist opening a patterned metal layer opening and form in the second patterned resist opening a patterned metal layer dent. Therefore, an internal stress between the metal layer and the ceramic substrate is reduced, and the yield rate and reliability of the metallized ceramic substrate is increased.

Abstract: A method of making a package substrate includes steps of forming a plurality of trenches on a first surface of a metal plate, placing insulation material in the trenches, removing metal plate material under the second surface of the metal plate, and exposing the insulation material in the trenches from substrate. The resulting substrate body includes a conductive portion made of the metal plate, and an insulation portion made of the insulation material. The bonding layers on the opposite sides of the substrate are conducted by the conductive portion for heat dissipation, and are separated from one another by the insulation portion.

Abstract: A package substrate is disclosed. The package substrate includes a substrate body having a conductive portion, a plurality of insulation portions and two surfaces opposing to each other; and a plurality of bonding layers for heat dissipation formed on the two surfaces of the substrate body, conducted via the conductive portion and separated from one another by the insulation portions. A method for forming the package substrate is also disclosed.

Abstract: The steps of the present invention are as follows: (a) a detachable film is formed on both sides of a substrate, respectively; (b) a number of vias running through both sides of the detachable films are formed in the substrate; (c) the vias are filled with a conductive paste; (d) the detachable films are peeled off; (e) a metallic conductive layer is deposited on both sides of the substrate, respectively; (f) a specific mold pattern is formed on the metallic conductive layers, respectively, by a photolithographic process; (g) a metallic circuit layout layer is formed on the patterns, respectively, by an electrochemical process; and (h) the mold patterns and the metallic conductive layers are removed. As such, the substrate is not contaminated by the conductive paste. Further, by using deposition, metallic conductive layers are directly adhered to the substrate and, by using photolithography, layouts with small linewidth could be formed.

Abstract: A light-emitting diode (LED) packaging structure and a substrate for the packaging structure are provided. The light-emitting diode packaging structure includes a metal substrate having a first surface and a second surface opposite to the first surface, and the first surface has a concave portion with a sidewall and a bottom, allowing an anode film to be formed on the metal substrate; a plurality of electrically conductive pads formed on the bottom of the concave portion; an optical treatment layer formed on the sidewall of the concave portion; and an LED die mounted on the bottom of the concave portion and electrically connected to the electrically conductive pads. Desired electrical insulating property between any two adjacent electrically conductive pads can be obtained by the anode film formed on the metal substrate, while a good thermal conductivity of the metal substrate is maintained.

Abstract: An alloy resistor and a fabrication method thereof are provided. A fabrication method of an alloy resistor includes: providing an alloy sheet having a plurality of openings spacing apart from each other and going through the alloy sheet and a plurality of alloy resistor units located between any two adjacent openings, wherein each of the alloy resistor units has an insulating cover area and a plurality of electrode ends on both sides of the insulating cover area; forming an insulating layer on a surface of the insulating cover area of the alloy resistor units by an electrodeposition coating process; cutting the alloy along a connecting portion, so as to obtain separated alloy resistor units; and forming a conductive adhesion material on the electrode ends of the alloy resistor units. An alloy resistor having an insulating layer with a smooth surface can be obtained by performing an electrodeposition coating process.

Abstract: A trimming apparatus including a switch transistor and a one-time programming (OTP) memory component is provided. The switch transistor has a first source/drain terminal connected to a first bias voltage, a gate terminal used for receiving a switch signal, and a second source/drain terminal connected to a first source/drain terminal of the OTP memory component. When the trimming apparatus provided by the present invention intends to perform trimming for an integrated circuit, the switch transistor is conducted to program the OTP memory component.

Abstract: The present invention provides a composite plate device for a thermal transpiration micropump apparatus. The provided composite plate device includes a substrate having a plurality of flow channels and a plurality of templates with closed sidewalls, wherein the plurality of flow channels allow fluid to flow therethrough and have a feature length larger than or equal to the mean free path length of the fluid. The provided composite plate device further includes a porous material that is filled in the plurality of templates of the substrate, wherein the porous material allows the fluid to flow therethrough and has an equivalent pore diameter smaller than or equal to the mean free path length of the fluid.

Abstract: A memory unit with sensing current stabilization includes: a memory cell; a reference cell for providing a reference current; a current mirror coupled to the memory cell and the reference cell for generating a differential current according to the reference current and a cell current of the memory cell; and a sense amplifier coupled to the current mirror for generating an output voltage according to the differential current.

Abstract: A memory unit with sensing current stabilization includes: a memory cell; a reference cell for providing a reference current; a current mirror coupled to the memory cell and the reference cell for generating a differential current according to the reference current and a cell current of the memory cell; and a sense amplifier coupled to the current mirror for generating an output voltage according to the differential current.

Abstract: Voltage generating apparatus includes a positive temperature coefficient current generating module, a negative temperature coefficient current generating module, a fine-tune current module and a voltage output module. The function of the positive temperature coefficient current generating module and the negative temperature coefficient current generating module, which take advantage of characteristics of MOS devices operated in the sub-threshold region, is to generate a stable current of positive temperature coefficient and a stable current of negative temperature coefficient, respectively. The current fine-tune module increases or decreases output current of the negative temperature coefficient current generating module. The voltage output module sums two output currents of the positive temperature coefficient current generating module and the negative temperature coefficient current generating module and transforms the total current into output voltage that is stable under temperature and process variation.

Abstract: Voltage generating apparatus includes a positive temperature coefficient current generating module, a negative temperature coefficient current generating module, a fine-tune current module and a voltage output module. The function of the positive temperature coefficient current generating module and the negative temperature coefficient current generating module, which take advantage of characteristics of MOS devices operated in the sub-threshold region, is to generate a stable current of positive temperature coefficient and a stable current of negative temperature coefficient, respectively. The current fine-tune module increases or decreases output current of the negative temperature coefficient current generating module. The voltage output module sums two output currents of the positive temperature coefficient current generating module and the negative temperature coefficient current generating module and transforms the total current into output voltage that is stable under temperature and process variation.

Abstract: A four-phase dual pumping circuit has a number of stages according to the required output voltage based on an input voltage. Each stage has a first pumping unit and a second pumping unit that are mirror and identical to each other and electrically coupled to each other. The dual pumping circuit is controlled by four-phase clocks which are made from one pair of out of phase clocks. The transistors of the dual pumping circuit have special substrate connection to minimize body effects. The four-phase dual pumping circuit uses NMOSFETS for negative pumping and PMOSFETS for positive pumping.

Abstract: A four-phase dual pumping circuit has a number of stages according to the required output voltage based on an input voltage. Each stage has a first pumping unit and a second pumping unit that are mirror and identical to each other and electrically coupled to each other. The dual pumping circuit is controlled by four-phase clocks which are made from one pair of out of phase clocks. The transistors of the dual pumping circuit have special substrate connection to minimize body effects. The four-phase dual pumping circuit uses NMOSFETS for negative pumping and PMOSFETS for positive pumping.

Abstract: A charge pump circuit has input and output nodes, a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. A drain of the first transistor and a drain of the second transistor are connected to the input node. A source of the second transistor and a drain of the third transistor are connected to the output node. The first capacitor is connected to a gate of the second transistor. The third transistor is connected to a substrate and a source of the second transistor. When the first transistor is turned on, a voltage at the input node will charge the first capacitor. When the second transistor is turned on, the third transistor is turned on simultaneously so that the substrate and the source of the second transistor will reach the same voltage level. Then, voltage at the input node will charge the second capacitor.

Abstract: A power supply used for providing a flash memory with an operating voltage has a plurality of memory blocks and a plurality of decoders corresponding to the memory blocks. Each memory block has a plurality of memory cells for storing binary data. Each decoder is used for selecting memory cells in the corresponding memory block. The power supply has at least three power sources for generating different voltages, and controls the power sources for making a voltage difference between a high voltage level and a low voltage level of the unselected decoder less than a voltage difference between a high voltage level and a low voltage level of the selected decoder.