Abstract: A display device includes first and second display modules and first and second turning pieces that include a first coupling piece, a first turning piece, a second turning piece, and a third turning piece, a second coupling piece and a guiding device. When the first and second display modules are switched between folding and unfolding, the first turning piece pivots relative to the first coupling piece and the second turning piece, and the third turning piece pivots relative to the second coupling piece and the second turning piece. When the display module is switched from folded to unfolded, the other side of the first display module relative to the side is pulled, the side of the first display module is guided by one end of the guiding device and slides to the other end, the first and second display modules are symmetrically unfolded with the side edge as the center.

Abstract: A method for forming a semiconductor device structure includes forming a fin structure, and the fin structure has multiple sacrificial layers and multiple semiconductor layers laid out alternately. The method also includes forming a gate stack wrapped around the fin structure and forming a spacer layer extending along sidewalls of the fin structure and the gate stack. The method further includes partially removing the fin structure and the spacer layer to form a recess exposing side surfaces of the semiconductor layers and the sacrificial layers. A remaining portion of the spacer layer forms a gate spacer. In addition, the method includes forming an inner spacer layer along a sidewall and a bottom of the recess and partially removing the inner spacer layer using an isotropic etching process. Remaining portions of the inner spacer layers form multiple inner spacers. The method includes forming an epitaxial structure in the recess.

Abstract: A device includes a substrate, a first nanostructure channel above the substrate and a second nanostructure channel between the first nanostructure channel and the substrate. An inner spacer is between the first nanostructure channel and the second nanostructure channel. A gate structure abuts the first nanostructure channel, the second nanostructure channel and the inner spacer. A liner layer is between the inner spacer and the gate structure.

Abstract: A semiconductor structure including a semiconductor substrate and at least one patterned dielectric layer is provided. The semiconductor substrate includes a semiconductor portion, at least one first device, at least one second device and at least one first dummy ring. The at least one first device is disposed on a first region surrounded by the semiconductor portion. The at least one second device and the at least one first dummy ring are disposed on a second region, and the second region surrounds the first region. The at least one patterned dielectric layer covers the semiconductor substrate.

Abstract: A semiconductor device includes a semiconductor layer, a drift region, a source area, a well region, a drain area, and a dielectric film. The drift region and the source area are formed in the semiconductor layer. The well region is formed in the semiconductor layer and between the drift region and the source area. The drain area is formed in the drift region. The dielectric film is formed in the drift region and is located between the source area and the drain area. The dielectric film includes a proximate end portion and a distal end portion which are proximate to and distal from the source area, respectively, and which are asymmetrical to each other.

Abstract: A method of preventing drippage in a liquid dispensing system includes generating at least a first proxy signal representing at least a first indirect measure of a position of a first automatic control valve (ACV), wherein the first ACV has positions ranging from fully closed to fully open. The method further includes recognizing, based on at least the first proxy signal, whether a failure state exists in which the first ACV has failed to close. The method further includes causing a second ACV to close when the failure state exists, wherein the second ACV is fluidically connected to the first ACV, and the second ACV has positions ranging from fully closed to fully open.

Abstract: An information handling system may include a backplane configured to couple at a first side thereof to a plurality of physical storage resources, an air mover configured to provide cooling to the information handling system, and a shelf coupled to the backplane at a second, opposite side thereof, wherein the shelf is disposed between the first side of the backplane and the air mover. The shelf may include an acoustically absorbent material.

Abstract: A semiconductor device includes a circuit substrate, at least one semiconductor die, a first frame, and a second frame. The at least one semiconductor die is connected to the circuit substrate. The first frame is disposed on the circuit substrate and encircles the at least one semiconductor die. The second frame is stacked on the first frame. The first frame includes a base portion and an overhang portion. The base portion has a first width. The overhang portion is disposed on the base portion and has a second width greater than the first width. The overhang portion laterally protrudes towards the at least one semiconductor die with respect to the base portion. The first width and the second width are measured in a protruding direction of the overhang portion.

Abstract: An optical device includes an electronic component, a light-permeable layer, and a ring-shaped adhesive layer that is sandwiched between the electronic component and the light-permeable layer. The ring-shaped adhesive layer surrounds an optical region of the electronic component and includes a plurality of light-weakening slots that are formed on an inner side surface thereof. The light-weakening slots are in a ring-shaped arrangement and surround the optical region. Each of the light-weakening slots has a slot opening having a slot width and a slot bottom spaced apart from the slot opening by a slot depth. A width of each of the light-weakening slots gradually decreases along a direction from the slot opening to the slot bottom, and a ratio of the slot width to the slot depth is within a range from 1:0.86 to 1:11.4, such that each of the light-weakening slots is configured to weaken light irradiated thereon.

Abstract: An artificial leather and a method for manufacturing the artificial leather are provided. The artificial leather includes a fabric layer, a thermoplastic polyolefin layer, a modified thermoplastic polyolefin layer, and a polyurethane surface layer. The thermoplastic polyolefin layer is disposed on the fabric layer. The modified thermoplastic polyolefin layer is disposed on the thermoplastic polyolefin layer. The polyurethane surface layer is attached to the modified thermoplastic polyolefin layer through an adhesive.

Abstract: A semiconductor device according to the present disclosure includes a stack of first channel members, a stack of second channel members disposed directly over the stack of first channel members, a bottom source/drain feature in contact with the stack of the first channel members, a separation layer disposed over the bottom source/drain feature, a top source/drain feature in contact with the stack of second channel members and disposed over the separation layer, and a frontside contact that extends through the top source/drain feature and the separation layer to be electrically coupled to the bottom source/drain feature.

Abstract: The present disclosure provides a method for semiconductor fabrication. The method includes depositing a first metal layer by a first deposition over a source/drain (S/D) feature and over side portions of a trench exposing the S/D feature. The first metal layer is thicker over the S/D feature than over side portions of the trench. The method includes growing a metal on the first metal layer by a second deposition to form a second metal layer filling up the trench. The second deposition is different from the first deposition and the growing of the metal in a vertical direction is grown at a faster rate than the growing of the metal in a horizontal direction. After growing the metal to form the second metal layer, the method includes planarizing the first and second metal layers to form an S/D contact. The method forms an S/D via on the second metal layer.

Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The method includes forming a polysilicon structure on a substrate, depositing a first spacer layer on the polysilicon structure, depositing a second spacer layer on the first spacer layer, forming a S/D region on the substrate, removing the second spacer layer, depositing a third spacer layer on the first spacer layer and on the S/D region, depositing an ESL on the third spacer layer, depositing an ILD layer on the etch stop layer, and replacing the polysilicon structure with a gate structure surrounding the nanostructured layer.

Abstract: An embodiment of the invention provides an electrocardiography (ECG) signal processing device. The ECG signal processing device includes a first part, a second part and a flexible printed circuit board. The first part may comprise a first electrode and a processing circuit. The second part includes a second electrode. The flexible printed circuit board is coupled to the first part and the second part to fold the first part and the second part. When a closed loop is formed between the first electrode and the second electrode, the processing circuit obtains an ECG signal from the user.

Abstract: A method for generating a three-dimensional (3D) global pose includes: receiving an image and performing a detection operation to detect a human body in the image; obtaining a two-dimensional (2D) heatmap that is related to a skeleton structure of the human body and that includes a plurality of human keypoints, and obtaining a plurality of 2D coordinate sets each indicating a position of a corresponding one of the human keypoints; performing a 3D human pose estimation operation on the plurality of 2D coordinate sets to obtain a 3D human pose that is related to the skeleton structure in a local coordinate system, and that includes a plurality of 3D keypoints corresponding to the plurality of human keypoints, respectively; and based on the 3D human pose, using a numerical optimization solver to generate a 3D global pose in a world coordinate system.

Abstract: A package structure is provided. The package structure includes a substrate and a chip-containing structure bonded to the substrate. The package structure also includes a warpage-control element attached to the substrate. The warpage-control element has a protruding portion extending into the substrate.

Abstract: A sensor package structure includes a substrate, a sensor chip disposed on and electrically coupled to the substrate, a plurality of adhesive rings disposed on the sensor chip, a plurality of filtering lenses respectively adhered to the adhesive rings, and an encapsulant that surrounds the above components. A sensing region of the sensor chip has a layout boundary and a plurality of sub-regions that are defined by the layout boundary and that are separate from each other. The adhesive rings are disposed on the sensing region, and each of the adhesive rings surrounds one of the sub-regions. Each of the filtering lenses, a corresponding one of the adhesive rings, and a corresponding one of the sub-regions jointly define a buffering space. The encapsulant is formed on the substrate and covers the layout boundary of the sensor chip.

Abstract: A method for forming a semiconductor structure is provided. The method includes forming a fin structure over a substrate. The fin structure includes a protection layer and alternating first and second semiconductor layers over the protection layer. The method also includes etching the fin structure to form a source/drain recess, forming a sacrificial contact in the source/drain recess, forming a source/drain feature over the sacrificial contact in the source/drain recess, removing the first semiconductor layers of the fin structure, thereby forming a plurality of nanostructures, forming a gate stack wrapping around the nanostructures, removing the substrate thereby exposing the protection layer and the sacrificial contact and replacing the sacrificial contact with a contact plug.

Abstract: Integrated semiconductor devices and method of making the integrated semiconductor are disclosed. The integrated semiconductor device may include a first transistor comprising a first gate and at least one first active region, a second transistor comprising a second gate and at least one second active region, wherein the second transistor is spaced a first distance from the first transistor, a dielectric sidewall spacer formed on a gate sidewall of the first transistor and a gate sidewall of the second transistor, a first dielectric layer formed over the first transistor and the second transistor, wherein a thickness of the first dielectric layer is greater than half the first distance, and a patterned metal layer formed on the first dielectric layer and partially covering the second gate.

Abstract: A laser device includes a substrate, a first waveguiding layer, an active layer, a second waveguiding layer, a contact layer, an insulating layer, a light-transmissive conducting layer, a first electrode, and a second electrode. The first waveguiding layer, the active layer, the second waveguiding layer, and the contact layer form an epitaxy structure having a first platform and a second platform. The first platform has multiple holes to form a photonic crystal structure. The insulating layer is over an upper surface and a sidewall surface of the first platform, and over an upper surface of the second platform. The sidewall surface passes through the contact layer, the second waveguiding layer, and the active layer. The light-transmissive conducting layer connects to the photonic crystal structure through an aperture of the insulating layer. The first electrode has an opening corresponding to the aperture. The second electrode is under the substrate.