Abstract: A charge pump system includes a charge pump, a ring oscillator, a comparing circuit and a discharge circuit. When an output voltage of the charge pump is relatively low, the comparing circuit turns on the ring oscillator to make the ring oscillator provide an oscillation output to the charge pump to raise the output voltage of the charge pump. When the output voltage of the charge pump is relatively high, the comparing circuit turns off the ring oscillator to stop the ring oscillator from providing the oscillation output to the charge pump, the comparing circuit also makes the discharge circuit provide a discharge path to the charge pump to quickly reduce the output voltage of the charge pump.

Abstract: A regulating circuit is used with a buffer circuit. The buffer circuit at least includes a metal-oxide-semiconductor transistor and a voltage output terminal. The voltage output terminal is connected to a drain terminal of the metal-oxide-semiconductor transistor of the buffer circuit. The regulating circuit includes a first metal-oxide-semiconductor transistor and a second metal-oxide-semiconductor transistor. The first metal-oxide-semiconductor transistor has a source terminal and a drain terminal connected to a voltage source and a connecting node, respectively. The connecting node is electrically connected to a substrate of the metal-oxide-semiconductor transistor of the buffer circuit. The second metal-oxide-semiconductor transistor has a drain terminal and a source terminal connected to the connecting node and the voltage output terminal, respectively. A substrate of the second metal-oxide-semiconductor transistor is electrically connected to the connecting node.

Abstract: A power saving circuit for an electronic device is disclosed. The power saving circuit includes a direct-current (DC) power supply, a sensing unit, and a control unit. The DC power supply is used for providing a DC current. The sensing unit, coupled to the DC power supply, is used for detecting the DC current and operating to generate a voltage signal according to the DC current. The control unit, coupled to the sensing unit, is used for determining whether a system circuit of the electronic device has a light load or a heavy load and generating an enable signal.

Abstract: The present invention provides a data communication managing system. The system includes a first network segment client, a second network segment client, and a center unit. The center unit includes a manage unit and transmit data with the first network segment client and the second network segment client, respectively. The manage unit includes a transmission management part which is used to disallow the data transmission between the first network segment client and the second network segment client.

Abstract: A power management method for a multi-microprocessor system is provided. The multi-microprocessor system comprises a first microprocessor and a second microprocessor. The power management method comprises steps of receiving a power down instruction; transmitting a power down notice signal to the first microprocessor from the second microprocessor, transmitting a reply signal from the first microprocessor to the second microprocessor in response to the power down notice signal, and turning off power of the first microprocessor by the second microprocessor.

Abstract: A charging device including a charging circuit, a voltage detection circuit, and a keyboard controller is provided. The charging circuit receives a charging power source, and produces a battery-charging power source at a first node by the charging power source to charge a battery. The voltage detection circuit detects a voltage at the first node, and produces a voltage detection result. The keyboard controller determines whether the voltage at the first node is less than a predetermined voltage according to the voltage detection result, and determines whether a predetermined condition has been satisfied, wherein the predetermined condition includes the voltage at the first node being less than the predetermined voltage, and the keyboard controller is arranged to force the charging circuit to stop producing the battery-charging power source at the first node when the predetermined condition has been satisfied.

Abstract: A flat panel display, a shift register with image retention release and method for releasing image retention are provided. An output end of the shift register couples to a gate line of a display panel. A first end of a first transistor couples to the output end of the shift register. A second end of the first transistor couples to a system voltage VDD or a reference voltage VSS. A first end of a capacitor couples to a control end of the first transistor. A second end of the capacitor couples to the reference voltage VSS. During a power-off period, the reference voltage VSS is pulled high for turning on the first transistor, therefore the voltage of the gate line is pulled high.

Abstract: The present invention relates to a power supply circuit for driving at least one light emitting diode (LED). The power supply circuit comprises: an input unit, an active power factor corrector, a converter, an output unit and a feedback unit. The input unit is utilized to receive power signal from a power source, and the output unit is utilized to receive power transferred from the converter for driving at least one LED. The feedback unit couples to a node between the converter and the output unit, and delivers the power signal, from the converter to the output unit, back to the active power factor corrector. The active power factor corrector monitors the power signal based on the power signal from the feedback unit for stabilizing the outputting power from the output unit and thereby driving the LED.

Abstract: A power signal detecting system and method thereof are disclosed. The power signal detecting system comprises a power supply and a portable electronic device. The portable electronic device is electrically connected with the power supply to receive a power signal. The portable electronic device comprises a sensing element, a detecting module and a power management module. The sensing element is used to connect the power signal. The detecting module is electrically connected to the sensing element and is used for detecting the power signal. The power management module electrically connects to the detecting module and is used for executing a power management for the portable electronic device by identifying the power signal.

Abstract: The present invention provides a phase and/or frequency detector, a PLL and an operation method for the PLL. The phase and/or frequency detector comprises two flip-flops, a logic gate, a control circuit and a delay circuit. The clock-input terminals of the two flip-flops receive a reference signal and a frequency-divided signal respectively. The logic gate receives signals outputted from the data-output terminals of the two flip-flops. The control circuit is configured for generating a corresponding delay control signal according to an oscillating frequency of an oscillating signal outputted from the PLL. The delay circuit is configured for altering a prolonged period according to the delay control signal to output a reset signal to the reset terminals of the two flip-flops.

Abstract: The present disclosure provides a semiconductor device that includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer.

Abstract: A charge pump circuit includes a first comparator, a PMOS tuner, a first current mirror, a first NMOS transistor, a first PMOS switch, an NMOS tuner, a second current mirror, a first PMOS transistor and a first NMOS switch. The first PMOS switch is coupled between the PMOS tuner and a first output PMOS transistor of the first current mirror, thus the parasitic capacitor formed between the gate and the drain of the first PMOS switch, the parasitic capacitor formed between the gate and the source of the first output PMOS transistor, and the parasitic capacitor formed between the gate and the drain of the first output PMOS transistor are equivalently coupled in series, lowering the capacitance between the PMOS tuner and the charge pump output, and reducing the clock feed through and the charge injection effect in the charge pump circuit.

Abstract: A charge pump includes a first current source unit and a second current source unit. The first current source unit is connected between a first voltage terminal and the control node. The second current source unit is connected between the control node and a second voltage terminal. According to a phase comparing signal, the first current source unit provides a first switching current to the control node. The second current source unit includes a first sub-switching current generator, a second sub-switching current generator and a select circuit. According to a voltage level of the phase comparing signal, the first sub-switching current generator generates a first sub-switching current. According to the voltage level of the phase comparing signal, the second sub-switching current generator generates a second sub-switching current. By the select circuit, the first sub-switching current or the second sub-switching current is provided to the control node.

Abstract: A misalignment detection device comprising a substrate, at least one integrated circuit (IC), and at least one detection unit is disclosed. The substrate comprises a first positioning pad and a second positioning pad adjacent to the first positioning pad. The integrated circuit is disposed on the substrate and comprises a first positioning bump and a second positioning bump adjacent to the first positioning bump. The first and second positioning bumps substantially correspond to the first and second positioning pads, respectively. The at least one detection unit is electrically coupled to the substrate, wherein the detection unit outputs a fault signal in response to a positioning shift occurring between the first and second positioning pads and the first and second positioning bumps.

Abstract: A touch panel display including a first substrate, a second substrate, a display medium and a touch device is provided. The first substrate has a display area and a peripheral area. The first substrate has a pixel array in the display area and at least one integrated driving circuit in the peripheral area. The integrated driving circuit is electrically connected to the pixel array. The second substrate is disposed above the first substrate to cover the integrated driving circuit and the pixel array. The display medium is disposed on the pixel array and located between the first substrate and the second substrate. The touch device is disposed on the second substrate, and has a sensor element and a wiring element connected to the sensor element. The sensor element is located above the pixel array and the wiring element is located above at least a portion of the integrated driving circuit.

Abstract: A charge pump circuit includes a first comparator, a PMOS tuner, a first current mirror, a first NMOS transistor, a first PMOS switch, an NMOS tuner, a second current mirror, a first PMOS transistor and a first NMOS switch. The first PMOS switch is coupled between the PMOS tuner and a first output PMOS transistor of the first current mirror, thus the parasitic capacitor formed between the gate and the drain of the first PMOS switch, the parasitic capacitor formed between the gate and the source of the first output PMOS transistor, and the parasitic capacitor formed between the gate and the drain of the first output PMOS transistor are equivalently coupled in series, lowering the capacitance between the PMOS tuner and the charge pump output, and reducing the clock feed through and the charge injection effect in the charge pump circuit.

Abstract: A charge pump system includes a charge pump, a ring oscillator, a comparing circuit and a discharge circuit. When an output voltage of the charge pump is relatively low, the comparing circuit turns on the ring oscillator to make the ring oscillator provide an oscillation output to the charge pump to raise the output voltage of the charge pump. When the output voltage of the charge pump is relatively high, the comparing circuit turns off the ring oscillator to stop the ring oscillator from providing the oscillation output to the charge pump, the comparing circuit also makes the discharge circuit provide a discharge path to the charge pump to quickly reduce the output voltage of the charge pump.

Abstract: A flexible printed circuit and a display module comprising the flexible printed circuit are disclosed. The display module comprises a display panel, a printed circuit board, and a flexible printed circuit. The flexible printed circuit electrically connects the display panel and the printed circuit board, and further comprises a flexible substrate and a cover lay. The flexible substrate has an upper surface and two opposite end portions. The cover lay is disposed on the upper surface of the flexible substrate and extends along a lengthwise direction of the flexible substrate. The cover lay further has two opposite sides each also extending along the lengthwise direction of the flexible substrate. Each of the sides has at least a partially continuous contour which is formed with a discontinuous status on at least one of the end portions.

Abstract: A ring oscillator includes a plurality of inverting delay units serially connected in a form of a ring. Each of the inverting delay units receives an input signal and generates an output signal, and each of the inverting delay units includes a buffer and a delay circuit. The buffer has an input terminal and an output terminal. The input terminal receives the input signal, and the output terminal generates a buffered input signal. The delay circuit serves to provide a first time delay and a second time delay. Besides, according to a voltage level of the buffered input signal, the delay circuit provides a first reference voltage to generate the output signal after the first time delay or provides a second reference voltage to generate the output signal after the second time delay.

Abstract: A charge pump exhibiting a voltage compensation function is provided. The charge pump includes: a first current generator, a first semiconductor device, a second current generator, a second semiconductor device, and a voltage regulator. The voltage regulator dynamically adjusts a voltage level at the gate of the first or second semiconductor device so as to adjust a first current or a second current outputted to a current output node. In addition, the voltage regulator provides a bias voltage at the current output node when both the first and second semiconductor devices are turned off.