Patents by Inventor Chien-Ping Huang

Chien-Ping Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250026440
    Abstract: A power module of an electric assisted bicycle is disclosed and includes a pedal shaft, a housing, a motor, a reducer and a gear-plate output shaft and a sensing component. The housing includes a partition portion extended along a radial direction to divide an inner space of the housing into a motor accommodation portion and a reducer accommodation portion for accommodating the motor and the reducer, respectively. A stator of the motor and a fixed gear are respectively fixed to a first side and a second side, which are two opposite sides of the partition portion. A reducer input shaft includes two ends connected to the motor and the reducer, respectively, and an input-shaft main part disposed therebetween is connected to a third side of the partition portion. With the connection configuration of the three sides of the partition portion, the space utilization of the entire power module is optimized.
    Type: Application
    Filed: February 5, 2024
    Publication date: January 23, 2025
    Inventors: Chi-Wen Chung, Ming-Li Tsao, Chien-Ping Huang, Chun-Lin Chen
  • Patent number: 11987134
    Abstract: A speed-command generating unit incorporated with an electric vehicle having a throttle module, a mechanical brake and a motor is disclosed and includes: a computation module for generating a computation value of a speed-command according to a throttle operating signal from the throttle module, a sensing module for detecting an activated status of the mechanical brake, a selecting module for providing a braking approach selecting signal, a trimming module for setting a trimming flag according to the activated status of the mechanical brake of last cycle, and a switching module connected therewith. The switching module generates different output values of the speed-command for the motor according to different foundations depending on the content of the trimming flag when the mechanical brake is inactivated in this cycle, and generates the output value according to the content of the braking approach selecting signal when the mechanical brake is activated in this cycle.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: May 21, 2024
    Assignee: Delta Electronics, Inc.
    Inventors: Chun-Chia Tsao, Chien-Ping Huang
  • Publication number: 20230099907
    Abstract: A power module of an electric assisted bicycle is disclosed and includes a pedal shaft, a gear-plate-output shaft, a reducer-output shaft and a motor-output shaft. The pedal shaft is arranged along an axial direction. The gear-plate-output shaft includes a first section and a second section arranged in the axial direction. The first section is concentrically sleeved on the pedal shaft through a first one-way bearing along a radial direction. When the pedal shaft is forced to rotate, the gear-plate-output shaft is driven through the first one-way bearing. The reducer-output shaft is concentrically sleeved on an outer surface of the second section through a second one-way bearing along the radial direction. The motor-output shaft is concentrically sleeved on the reducer-output shaft along the radial direction. When the motor-output shaft drives the reducer-output shaft to rotate, the gear-plate-output shaft is driven by the reducer-output shaft through the second one-way bearing.
    Type: Application
    Filed: May 9, 2022
    Publication date: March 30, 2023
    Inventors: Chi-Wen Chung, Hung-Wei Lin, Chien-Ping Huang
  • Patent number: 11479126
    Abstract: A system for compensating acceleration of electrical motorbike includes a throttle unit and an electro-mechanic assembly. After the electrical motorbike starts, the throttle unit receives external operation from a rider for generating a series of original throttle signal. An acceleration compensating module calculates a throttle variation rate based on the original throttle signal and variation of a throttle operation magnitude, and calculates a throttle compensating value based on the throttle variation rate when the throttle variation rate is larger than or equal to a correction threshold. A throttle compensating module receives and sums the original throttle signal and the throttle compensating value up for generating a new throttle signal. A torque controller generates a corresponding torque command based on the new throttle signal, and outputs the torque command to the electro-mechanic assembly for operation.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: October 25, 2022
    Assignees: DELTA ELECTRONICS, INC., KWANG YANG MOTOR CO., LTD.
    Inventors: Chien-Ping Huang, Chung-An Hsieh, Hsiang-Hsi Huang, Cheng-Hsien Huang
  • Publication number: 20220281326
    Abstract: A speed-command generating unit incorporated with an electric vehicle having a throttle module, a mechanical brake and a motor is disclosed and includes: a computation module for generating a computation value of a speed-command according to a throttle operating signal from the throttle module, a sensing module for detecting an activated status of the mechanical brake, a selecting module for providing a braking approach selecting signal, a trimming module for setting a trimming flag according to the activated status of the mechanical brake of last cycle, and a switching module connected therewith. The switching module generates different output values of the speed-command for the motor according to different foundations depending on the content of the trimming flag when the mechanical brake is inactivated in this cycle, and generates the output value according to the content of the braking approach selecting signal when the mechanical brake is activated in this cycle.
    Type: Application
    Filed: July 28, 2021
    Publication date: September 8, 2022
    Inventors: Chun-Chia TSAO, Chien-Ping HUANG
  • Patent number: 11289409
    Abstract: A method for fabricating a carrier-free semiconductor package includes: half-etching a metal carrier to form a plurality of recess grooves and a plurality of metal studs each serving in position as a solder pad or a die pad; filing each of the recess grooves with a first encapsulant; forming on the metal studs an antioxidant layer such as a silver plating layer or an organic solderable protection layer; and performing die-bonding, wire-bonding and molding processes respectively to form a second encapsulant encapsulating the chip. The recess grooves are filled with the first encapsulant to enhance the adhesion between the first encapsulant and the metal carrier, thereby solving the conventional problem of having a weak and pliable copper plate and avoiding transportation difficulty. The invention eliminates the use of costly metals as an etching resist layer to reduce fabrication cost, and further allows conductive traces to be flexibly disposed on the metal carrier to enhance electrical connection quality.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: March 29, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Yueh-Ying Tsai, Fu-Di Tang, Chien-Ping Huang, Chun-Chi Ke
  • Patent number: 11228268
    Abstract: An electric motor controlling system used for vibration suppression of an electric vehicle is disclosed. The controlling system includes a PID-controller and a vibration suppression compensator. The PID-controller generates a basic torque command through performing a calculation based on input speed-error signal of the electric vehicle, the vibration suppression compensator generates a compensated torque command through performing a compensation gain procedure on the input speed-error signal. The vibration suppression compensator further receives a motor speed of the electric vehicle, sets its output as the compensated torque command when the motor speed is smaller than a preset active speed level, otherwise sets the output as 0. The controlling system generates an output torque command via adding up the basic torque command and the output of the vibration suppression compensator, and operates electric motor components of the electric vehicle according to the output torque command.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: January 18, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chun-Chia Tsao, Chien-Ping Huang
  • Publication number: 20210265935
    Abstract: An electric motor controlling system used for vibration suppression of an electric vehicle is disclosed. The controlling system includes a PID-controller and a vibration suppression compensator. The PID-controller generates a basic torque command through performing a calculation based on input speed-error signal of the electric vehicle, the vibration suppression compensator generates a compensated torque command through performing a compensation gain procedure on the input speed-error signal. The vibration suppression compensator further receives a motor speed of the electric vehicle, sets its output as the compensated torque command when the motor speed is smaller than a preset active speed level, otherwise sets the output as 0. The controlling system generates an output torque command via adding up the basic torque command and the output of the vibration suppression compensator, and operates electric motor components of the electric vehicle according to the output torque command.
    Type: Application
    Filed: June 5, 2020
    Publication date: August 26, 2021
    Inventors: Chun-Chia TSAO, Chien-Ping HUANG
  • Publication number: 20200307388
    Abstract: A system for compensating acceleration of electrical motorbike includes a throttle unit and an electro-mechanic assembly. After the electrical motorbike starts, the throttle unit receives external operation from a rider for generating a series of original throttle signal. An acceleration compensating module calculates a throttle variation rate based on the original throttle signal and variation of a throttle operation magnitude, and calculates a throttle compensating value based on the throttle variation rate when the throttle variation rate is larger than or equal to a correction threshold. A throttle compensating module receives and sums the original throttle signal and the throttle compensating value up for generating a new throttle signal. A torque controller generates a corresponding torque command based on the new throttle signal, and outputs the torque command to the electro-mechanic assembly for operation.
    Type: Application
    Filed: July 26, 2019
    Publication date: October 1, 2020
    Inventors: Chien-Ping HUANG, Chung-An HSIEH, Hsiang-Hsi HUANG, Cheng-Hsien HUANG
  • Publication number: 20200144167
    Abstract: A method for fabricating a carrier-free semiconductor package includes: half-etching a metal carrier to form a plurality of recess grooves and a plurality of metal studs each serving in position as a solder pad or a die pad; filing each of the recess grooves with a first encapsulant; forming on the metal studs an antioxidant layer such as a silver plating layer or an organic solderable protection layer; and performing die-bonding, wire-bonding and molding processes respectively to form a second encapsulant encapsulating the chip. The recess grooves are filled with the first encapsulant to enhance the adhesion between the first encapsulant and the metal carrier, thereby solving the conventional problem of having a weak and pliable copper plate and avoiding transportation difficulty. The invention eliminates the use of costly metals as an etching resist layer to reduce fabrication cost, and further allows conductive traces to be flexibly disposed on the metal carrier to enhance electrical connection quality.
    Type: Application
    Filed: January 6, 2020
    Publication date: May 7, 2020
    Inventors: Yueh-Ying Tsai, Fu-Di Tang, Chien-Ping Huang, Chun-Chi Ke
  • Patent number: 10566271
    Abstract: A method for fabricating a carrier-free semiconductor package includes: half-etching a metal carrier to form a plurality of recess grooves and a plurality of metal studs each serving in position as a solder pad or a die pad; filing each of the recess grooves with a first encapsulant; forming on the metal studs an antioxidant layer such as a silver plating layer or an organic solderable protection layer; and performing die-bonding, wire-bonding and molding processes respectively to form a second encapsulant encapsulating the chip. The recess grooves are filled with the first encapsulant to enhance the adhesion between the first encapsulant and the metal carrier, thereby solving the conventional problem of having a weak and pliable copper plate and avoiding transportation difficulty. The invention eliminates the use of costly metals as an etching resist layer to reduce fabrication cost, and further allows conductive traces to be flexibly disposed on the metal carrier to enhance electrical connection quality.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: February 18, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Yueh-Ying Tsai, Fu-Di Tang, Chien-Ping Huang, Chun-Chi Ke
  • Publication number: 20170200671
    Abstract: A method for fabricating a carrier-free semiconductor package includes: half-etching a metal carrier to form a plurality of recess grooves and a plurality of metal studs each serving in position as a solder pad or a die pad; filing each of the recess grooves with a first encapsulant; forming on the metal studs an antioxidant layer such as a silver plating layer or an organic solderable protection layer; and performing die-bonding, wire-bonding and molding processes respectively to form a second encapsulant encapsulating the chip. The recess grooves are filled with the first encapsulant to enhance the adhesion between the first encapsulant and the metal carrier, thereby solving the conventional problem of having a weak and pliable copper plate and avoiding transportation difficulty. The invention eliminates the use of costly metals as an etching resist layer to reduce fabrication cost, and further allows conductive traces to be flexibly disposed on the metal carrier to enhance electrical connection quality.
    Type: Application
    Filed: March 23, 2017
    Publication date: July 13, 2017
    Inventors: Yueh-Ying Tsai, Fu-Di Tang, Chien-Ping Huang, Chun-Chi Ke
  • Patent number: 9679826
    Abstract: A semiconductor package is provided, including a substrate having a top surface, a bottom surface opposing the top surface, a via communicating the top surface with the bottom surface, and a stator set formed by circuits; an axial tube axially installed in the via of the substrate; a plurality of electronic components mounted on the top surface of the substrate and electrically connected to the substrate; an encapsulant formed on the top surface of the substrate for encapsulating the electronic components and the axial tube; and an impeller axially coupled to the axial tube via the bottom surface of the substrate. In the semiconductor package, the stator set is formed in the substrate by a patterning process. Therefore, the thickness of the semiconductor package is reduced significantly.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: June 13, 2017
    Assignee: Amtek Semiconductors Co., Ltd.
    Inventor: Chien-Ping Huang
  • Publication number: 20160284625
    Abstract: A semiconductor package is provided, including a substrate having a top surface, a bottom surface opposing the top surface, a via communicating the top surface with the bottom surface, and a stator set formed by circuits; an axial tube axially installed in the via of the substrate; a plurality of electronic components mounted on the top surface of the substrate and electrically connected to the substrate; an encapsulant formed on the top surface of the substrate for encapsulating the electronic components and the axial tube; and an impeller axially coupled to the axial tube via the bottom surface of the substrate. In the semiconductor package, the stator set is formed in the substrate by a patterning process. Therefore, the thickness of the semiconductor package is reduced significantly.
    Type: Application
    Filed: June 10, 2016
    Publication date: September 29, 2016
    Inventor: Chien-Ping Huang
  • Patent number: 9425152
    Abstract: An EMI shielding package structure includes a substrate unit having a first surface with a die mounting area and a second surfaces opposite to the first surface, metallic pillars formed on the first surface, a chip mounted on and electrically connected to the die-mounting area, an encapsulant covering the chip and the first surface while exposing a portion of each of the metallic pillars from the encapsulant, and a shielding film enclosing the encapsulant and electrically connecting to the metallic pillars. A fabrication method of the above structure by two cutting processes is further provided. The first cutting process forms grooves by cutting the encapsulant. After a shielding film is formed in the grooves and electrically connected to the metallic pillars, the complete package structure is formed by the second cutting process, thereby simplifying the fabrication process while overcoming inferior grounding of the shielding film as encountered in prior techniques.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: August 23, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chin-Tsai Yao, Chien-Ping Huang, Chun-Chi Ke
  • Publication number: 20160233115
    Abstract: A cleaning apparatus for a semiconductor equipment is provided. The cleaning apparatus comprising a cleaning pad with a plurality of brushes thereon is located on a rotor of the semiconductor equipment to remove residues within the semiconductor equipment by using the brushes against the residues via moving and rotating the rotor and the cleaning apparatus.
    Type: Application
    Filed: April 20, 2016
    Publication date: August 11, 2016
    Inventors: Chien-Ping HUANG, Tsan-Hua Huang, Tsung-Hsun HAN, Kian-Poh WONG
  • Patent number: 9390959
    Abstract: A semiconductor package is provided, including a substrate having a top surface, a bottom surface opposing the top surface, a via communicating the top surface with the bottom surface, and a stator set formed by circuits; an axial tube axially installed in the via of the substrate; a plurality of electronic components mounted on the top surface of the substrate and electrically connected to the substrate; an encapsulant formed on the top surface of the substrate for encapsulating the electronic components and the axial tube; and an impeller axially coupled to the axial tube via the bottom surface of the substrate. In the semiconductor package, the stator set is formed in the substrate by a patterning process. Therefore, the thickness of the semiconductor package is reduced significantly.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: July 12, 2016
    Assignee: Amtek Semiconductors Co., Ltd.
    Inventor: Chien-Ping Huang
  • Patent number: 9252074
    Abstract: A heat dissipating device includes a semiconductor packaging structure having a stator set and a semiconductor element provided therein, a fan wheel set pivotally connected to the semiconductor packaging structure, and a guiding structure having a guiding channel. The guiding structure receives the semiconductor packaging structure and the fan wheel set. The fan wheel set includes a plurality of blades located above the surface of the semiconductor packaging structure. The stator set and the semiconductor element controls the first blades. The blades extend beyond side surfaces the semiconductor packaging structure and have their sizes increased, such that the airflow volume can be increased without changing the size of the semiconductor packaging structure.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: February 2, 2016
    Assignee: Amtek Semiconductors Co., Ltd.
    Inventor: Chien-Ping Huang
  • Patent number: 9190387
    Abstract: A quad flat non-leaded (QFN) package structure with an electromagnetic interference (EMI) shielding function is proposed, including: a lead frame having a die pad, a plurality of supporting portions connecting to the die pad and a plurality of leads disposed around the periphery of the die pad without connecting to the die pad; a chip mounted on the die pad; bonding wires electrically connecting the chip and the leads; an encapsulant for encapsulating the chip, the bonding wires and the lead frame and exposing the side and bottom surfaces of the leads and the bottom surface of the die pad; and a shielding film disposed on the top and side surfaces of the encapsulant and electrically connecting to the supporting portions for shielding from EMI. A method of fabricating the package structure as described above is further proposed.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: November 17, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chin-Tsai Yao, Chien-Ping Huang, Chun-Chi Ke
  • Patent number: 9190296
    Abstract: A semiconductor package without a chip carrier formed thereon and a fabrication method thereof. A metallic carrier is half-etched to form a plurality of grooves and metal studs corresponding to the grooves. The grooves are filled with a first encapsulant and a plurality of bonding pads are formed on the metal studs. The first encapsulant is bonded with the metal studs directly. Each of the bonding pads and one of the metal studs corresponding to the bonding pad form a T-shaped structure. Therefore, bonding force between the metal studs and the first encapsulant is enhanced such that delamination is avoided. Die mounting, wire-bonding and molding processes are performed subsequently. Since the half-etched grooves are filled with the first encapsulant, the drawback of having pliable metallic carrier that makes transportation difficult to carry out as encountered in prior techniques is overcome, and the manufacturing cost is educed by not requiring the use of costly metals as an etching resist layer.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: November 17, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Yueh-Ying Tsai, Fu-Di Tang, Chien-Ping Huang, Chun-Chi Ke