Abstract: A feed forward echo cancellation device includes a first impedance circuit, a second impedance circuit, and an echo cancellation current generator circuit. The first impedance circuit is configured to output a first current to a node in response to a transmission current. The second impedance circuit is configured to output a second current to a node in response to the transmission current. The echo cancellation current generator circuit is configured to drain an echo cancellation current from the node. The node is connected to an input terminal of a programmable gain amplifier circuit via a gain control circuit, and the gain control circuit is configured to set a gain of the programmable gain amplifier circuit.

Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.

Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.

Abstract: Disclosed herein is a diclofenac prodrug represented by formula (I), wherein each of the substituents is given the definition as set forth in the Specification and Claims. Also disclosed is a method for alleviating arthritis, which includes administering to a subject in need thereof the aforesaid diclofenac prodrug.

Abstract: A charging method and a battery pack are provided. The charging method for charging multiple cells of the battery pack include steps of: charging the cells of the battery pack using a charging voltage, and detecting a voltage difference ?VTDV between the cells, wherein a value of the charging voltage is a rated charging voltage value; and obtaining a new charging voltage value smaller than the rated charging voltage value according to the voltage difference ?VTDV between the cells, and decreasing the charging voltage to the new charging voltage value for charging the cells.

Abstract: A method for outputting a current includes performing a sorting operation on a plurality of current sources according to intensities of currents generated by the current sources, dividing the plurality of current sources into N current source sets according to a result of the sorting operation and a predetermined selection order, and enabling at least one current source set of the N current source sets to output the current according a target output value. The plurality of current sources have a same target current value. Each of the N current source sets includes at least one current source. In the N current source sets, a total quantity of current sources of the nth current source set is twice a total quantity of current sources of the (n?1)th current source set.

Abstract: A program gain amplifier includes an operational amplifier and a capacitor array. The capacitor array includes a first, second, and third capacitors selectively coupled to the operational amplifier or ground according to a first, second, and third switches, respectively. The first, second, and third capacitors have a first, second, and third capacitance, respectively. The third capacitance equals a sum of the first and second capacitance. In a first configuration, the first and second switches are operated at a first conductive state, and the third switch is operated at a second conductive state. When converting to a second configuration from the first configuration, the third switch is operated at the first conductive state, and the first and second switches are operated at the second conductive state. The gain being provided to an input signal in the first and second configurations are the same.

Abstract: A feedforward echo cancellation device includes: a first impedance circuit for responding to a transmission current to output a first current to a node; an echo cancellation current generating circuit for drawing an echo cancellation current from the node; a circuit module that is coupled to the echo cancellation current generating circuit and the node has a first impedance value adjusted based on a system convergence index of a communication device, where the first impedance value is used to determine a gain of a programmable gain amplifier in the communication device; and a second impedance circuit for responding to the transmission current to output a second current to the node, where a second impedance value of the second impedance circuit is adjusted based on the first impedance value of the circuit module accordingly. Specifically, the node is coupled to an input terminal of the programmable gain amplifier.

Abstract: A transceiver includes a first digital-to-analog converter (DAC), a second DAC, and a timing control module. In a calibration mode, the first DAC transmits a transmitting signal; the second DAC transmits an echo cancellation signal; and the timing control module, according to an echo signal of the transmitting signal and the echo cancellation signal, obtains a timing offset therebetween, and generates a first timing control signal and a second timing control signal to the first DAC and the second DAC according to the timing offset, respectively. The first DAC adjusts a transmission delay of transmitting the transmitting signal according to the first timing control signal, and/or the second DAC modifies a transmission delay of transmitting the echo cancellation signal according to the second timing control signal.

Abstract: A feedforward echo cancellation device includes: a first impedance circuit for responding to a transmission current to output a first current to a node; an echo cancellation current generating circuit for drawing an echo cancellation current from the node; a circuit module that is coupled to the echo cancellation current generating circuit and the node has a first impedance value adjusted based on a system convergence index of a communication device, where the first impedance value is used to determine a gain of a programmable gain amplifier in the communication device; and a second impedance circuit for responding to the transmission current to output a second current to the node, where a second impedance value of the second impedance circuit is adjusted based on the first impedance value of the circuit module accordingly. Specifically, the node is coupled to an input terminal of the programmable gain amplifier.

Abstract: A feed forward echo cancellation device includes a first impedance circuit, a second impedance circuit, and an echo cancellation current generator circuit. The first impedance circuit is configured to output a first current to a node in response to a transmission current. The second impedance circuit is configured to output a second current to a node in response to the transmission current. The echo cancellation current generator circuit is configured to drain an echo cancellation current from the node. The node is connected to an input terminal of a programmable gain amplifier circuit via a gain control circuit, and the gain control circuit is configured to set a gain of the programmable gain amplifier circuit.

Abstract: A transceiver includes a first digital-to-analog converter (DAC), a second DAC, and a timing control module. In a calibration mode, the first DAC transmits a transmitting signal; the second DAC transmits an echo cancellation signal; and the timing control module, according to an echo signal of the transmitting signal and the echo cancellation signal, obtains a timing offset therebetween, and generates a first timing control signal and a second timing control signal to the first DAC and the second. DAC according to the timing offset, respectively. The first DAC adjusts a transmission delay of transmitting the transmitting signal according to the first timing control signal, and/or the second DAC modifies a transmission delay of transmitting the echo cancellation signal according to the second timing control signal.

Abstract: A charging method and a battery pack are provided. The charging method for charging multiple cells of the battery pack include steps of: charging the cells of the battery pack using a charging voltage, and detecting a voltage difference ?VTDV between the cells, wherein a value of the charging voltage is a rated charging voltage value; and obtaining a new charging voltage value smaller than the rated charging voltage value according to the voltage difference ?VTDV between the cells, and decreasing the charging voltage to the new charging voltage value for charging the cells.

Abstract: A method is provided for preparing an ECM material, including an ECM gel, from regenerative or regenerating tissue. ECM material prepared from regenerative or regenerating materials also is provided.

Abstract: A method for outputting a current includes performing a sorting operation on a plurality of current sources according to intensities of currents generated by the current sources, dividing the plurality of current sources into N current source sets according to a result of the sorting operation and a predetermined selection order, and enabling at least one current source set of the N current source sets to output the current according a target output value. The plurality of current sources have a same target current value. Each of the N current source sets includes at least one current source. In the N current source sets, a total quantity of current sources of the nth current source set is twice a total quantity of current sources of the (n?1)th current source set.

Abstract: A method is provided for preparing an ECM material, including an ECM gel, from regenerative or regenerating tissue. ECM material prepared from regenerative or regenerating materials also is provided.

Abstract: A touch display device includes a printed circuit board and a cover. The printed circuit board has a top surface, a bottom surface and soldering points. The printed circuit board includes a first printed circuit, a light element and a second printed circuit. A part of the first printed circuit is on the top surface or the bottom surface and connected with the corresponding soldering point. The light emitting element is on the top surface and electrically connected to the first printed circuit. On the top surface, the second printed circuit does not overlap with the first printed circuit. The cover covers the printed circuit board. The cover has light transmission areas which are aligned with the light elements. The second printed circuit is configured to provide a capacitance value coupled to a capacitive sensing element coupled between the second printed circuit and the cover.

Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.

Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.

Abstract: A measuring device including a light source emitting a light beam, a first beam splitter disposed on a light path of the light beam, an optical grating, a reflector, and a sensor is provided. The light beam is divided into first and second light beams by the first beam splitter. The optical grating is disposed on light paths of the first and second light beams. The first beam splitter enables the first light beam to be delivered to the optical grating. The reflector is disposed on the light path of the second light beam. The first beam splitter enables the second light beam to be delivered to the reflector and reflected to the optical grating. The first and second light beams are diffracted by the optical grating to generate multiple first and second diffraction light beams at different angles respectively, which are received by the sensor after interference.