Abstract: A data merge method for a rewritable non-volatile memory module including a plurality of physical units is provided according to an exemplary embodiment of the disclosure. The method includes: obtaining a first logical distance value between a first physical unit and a second physical unit among the physical units, and the first logical distance value reflects a logical dispersion degree between at least one first logical unit mapped by the first physical unit and at least one second logical unit mapped by the second physical unit; and performing a data merge operation according to the first logical distance value, so as to copy valid from a source node to a recycling node.

Abstract: A processing device for position sensing includes a plurality of light sensors, a signal processing unit, a current mirror unit and a transforming unit. The light sensors are spaced apart from each other and sense a light field to generate a plurality of position sensing current signals. The signal processing unit receives the position sensing current signals and provides a load isolation, so as to generate a first current signal and a second current signal. The second current signal is transmitted to a node. The first and second current signals respectively correspond to a first group and a second group of light sensors. The current mirror unit mirrors the first current signal to a third current signal. The third current is transmitted to the node. The transforming unit transforms a differential current signal formed by the second and third current signals on the node to a voltage signal.

Abstract: A back cover includes a metal body having a first side, a second side, and a groove that is formed at the first side. The metal body further has a first radiator, a second radiator, and a ground radiator. The first radiator is disposed in the groove, and has a main portion and a support portion that cooperatively form a T-shape. The main portion includes a feeding end adjacent to a closed end of the groove. The second radiator is adjacently connected to the groove and is defined by the first and second sides, and an edge of the groove. The ground radiator is formed by a portion of the metal body excluding the first and second radiators. The second radiator and the support portion are connected to the ground radiator. The first and second radiators, and the ground radiator are serve as an antenna structure.

Abstract: A processing device for position sensing includes a plurality of light sensors, a signal processing unit, a current mirror unit and a transforming unit. The light sensors are spaced apart from each other and sense a light field to generate a plurality of position sensing current signals. The signal processing unit receives the position sensing current signals and provides a load isolation, so as to generate a first current signal and a second current signal. The second current signal is transmitted to a node. The first and second current signals respectively correspond to a first group and a second group of light sensors. The current mirror unit mirrors the first current signal to a third current signal. The third current is transmitted to the node. The transforming unit transforms a differential current signal formed by the second and third current signals on the node to a voltage signal.

Abstract: Clock adjustment circuits and clock adjustment methods are provided. The clock adjustment circuit is configured to generate an output clock and includes a phase interpolator, a logic circuit, and an integrator. The phase interpolator is configured to generate by interpolation an intermediate clock according to a first reference clock, a second reference clock, and a control signal. The frequencies of the first reference clock, the second reference clock and the intermediate clock are substantially the same. The logic circuit is coupled to the phase interpolator and configured to generate the output clock according to the intermediate clock and one of the first reference clock and the second reference clock. The integrator is coupled to the phase interpolator and the logic circuit and configured to generate the control signal according to the output clock. The control signal varies with an average based on a duty cycle of the output clock.

Abstract: Clock adjustment circuits and clock adjustment methods are provided. The clock adjustment circuit is configured to generate an output clock and includes a phase interpolator, a logic circuit, and an integrator. The phase interpolator is configured to generate by interpolation an intermediate clock according to a first reference clock, a second reference clock, and a control signal. The frequencies of the first reference clock, the second reference clock and the intermediate clock are substantially the same. The logic circuit is coupled to the phase interpolator and configured to generate the output clock according to the intermediate clock and one of the first reference clock and the second reference clock. The integrator is coupled to the phase interpolator and the logic circuit and configured to generate the control signal according to the output clock. The control signal varies with an average based on a duty cycle of the output clock.

Abstract: The present invention discloses a circuit capable of protecting low-voltage devices. The circuit includes: a pin configured to receive a signal of an external device; a control voltage generating circuit configured to generate a first control voltage according to a supply voltage to turn on a protected device when the supply voltage is at a high level, and generate a second control voltage according to a voltage of the pin to turn on the protected device when the supply voltage is at a low level; and the protected device configured to be turned on according to one of the first and the second control voltages and thereby electrically couple the pin with an internal circuit, in which the difference between the voltage of the pin and each of the first and the second control voltages is within a maximum withstanding voltage of the protected device.

Abstract: A data merge method for a rewritable non-volatile memory module including a plurality of physical units is provided according to an exemplary embodiment of the disclosure. The method includes: obtaining a first logical distance value between a first physical unit and a second physical unit among the physical units, and the first logical distance value reflects a logical dispersion degree between at least one first logical unit mapped by the first physical unit and at least one second logical unit mapped by the second physical unit; and performing a data merge operation according to the first logical distance value, so as to copy valid from a source node to a recycling node.

Abstract: A back cover includes a metal body having a first side, a second side, and a groove that is formed at the first side. The metal body further has a first radiator, a second radiator, and a ground radiator. The first radiator is disposed in the groove, and has a main portion and a support portion that cooperatively form a T-shape. The main portion includes a feeding end adjacent to a closed end of the groove. The second radiator is adjacently connected to the groove and is defined by the first and second sides, and an edge of the groove. The ground radiator is formed by a portion of the metal body excluding the first and second radiators. The second radiator and the support portion are connected to the ground radiator. The first and second radiators, and the ground radiator are serve as an antenna structure.

Abstract: Clock adjustment circuits and clock adjustment methods are provided. The clock adjustment circuit is configured to adjust an input clock to generate an output clock and includes a low-pass filter, a direct current (DC) control circuit, a DC offset amplifier, an amplifier, and an integrator. The low-pass filter filters the input clock to generate a filtered signal. The DC control circuit adjusts a DC voltage based on a control signal. The DC offset amplifier generates an intermediate clock based on the filtered signal and the DC voltage. The amplifier generates the output clock based on the intermediate clock. The integrator generates the control signal based on the output clock. The control signal varies with an average based on the duty cycle of the output clock.

Abstract: A mobile device includes a metal mechanism element, a ground plane, a feeding element, a parasitic element, and a dielectric substrate. The metal mechanism element has a slot. The ground plane is coupled to the metal mechanism element. The feeding element is coupled to a signal source. The feeding element extends across the slot. The parasitic element is coupled to the ground plane. The parasitic element extends across the slot. The ground plane, the feeding element, and the parasitic element are disposed on the dielectric substrate. An antenna structure is formed by the feeding element, the parasitic element, and the slot of the metal mechanism element.

Abstract: The present invention discloses a circuit capable of protecting low-voltage devices. The circuit includes: a pin configured to receive a signal of an external device; a control voltage generating circuit configured to generate a first control voltage according to a supply voltage to turn on a protected device when the supply voltage is at a high level, and generate a second control voltage according to a voltage of the pin to turn on the protected device when the supply voltage is at a low level; and the protected device configured to be turned on according to one of the first and the second control voltages and thereby electrically couple the pin with an internal circuit, in which the difference between the voltage of the pin and each of the first and the second control voltages is within a maximum withstanding voltage of the protected device.

Abstract: A measuring apparatus for measuring surface topography of the slides to be measured of a guide rail is provided. The measuring apparatus includes a plurality of detecting probe and at least one moving device. The detecting probes are mounted on a probe support according to the surface topography of the slides to be measured. The moving device shifts the probe support or the slides to be measured on the cross section of the guide rail so that the detecting probe has a displacement relative to the slides to be measured. Each of the detecting probes has a corresponding coordinate system, and the corresponding coordinate system is different from each other. A standard part is utilized to correct deviations among the corresponding coordinate systems to the same coordinate system, and then the same coordinate system as a benchmark to measure the surface topography of the slides to be measured.

Abstract: A measuring apparatus for measuring surface topography of the slides to be measured of a guide rail is provided. The measuring apparatus includes a plurality of detecting probe and at least one moving device. The detecting probes are mounted on a probe support according to the surface topography of the slides to be measured. The moving device shifts the probe support or the slides to be measured on the cross section of the guide rail so that the detecting probe has a displacement relative to the slides to be measured. Each of the detecting probes has a corresponding coordinate system, and the corresponding coordinate system is different from each other. A standard part is utilized to correct deviations among the corresponding coordinate systems to the same coordinate system, and then the same coordinate system as a benchmark to measure the surface topography of the slides to be measured.

Abstract: A memory management method is provided according to an exemplary embodiment of the disclosure. The method includes: obtaining a valid data parameter based on a valid data amount of valid data stored in a plurality of physical erasing units, and obtaining a first threshold value based on the valid data parameter. The method also includes: obtaining a first determination parameter based on a number of a plurality of first physical erasing units, and the first physical erasing units are physical erasing units being programmed for storing data by using a single-page programming mode. The method further includes: performing a garbage collection operation if the first determination parameter is greater than the first threshold value.

Abstract: A method is provided for preparing an ECM material, including an ECM gel, from regenerative or regenerating tissue. ECM material prepared from regenerative or regenerating materials also is provided.

Abstract: A combo chip is provided. The combo chip is applicable to an USB connector, and includes an USB type-C circuit, an USB non-type-C circuit, a switch unit, and a mode control unit. The switch unit is connected to the USB type-C circuit and the USB non-type-C circuit, and the mode control unit is connected to a control terminal of the switch unit. After performing one or more mode determination procedures, the mode control unit controls the switch unit to connect the USB type-C circuit to a first pin and a second pin while disconnecting the USB non-type-C circuit from the first pin and the second pin, or otherwise controls the switch unit to connect the USB non-type-C circuit to the first pin and the second pin while disconnecting the USB type-C circuit from the first pin and the second pin.

Abstract: A positioning measurement device is provided. The device includes a light source, a grating, and plural light sensors. A periodic light field is generated by light emitted by the light source and passes through the grating to. The plural light sensors are periodically spaced. The light sensors are used to sense the periodic light field for generating a plurality of positioning measurement signals.

Abstract: A control method, which is adapted to a phase interpolator configured to generate an output signal based on a current distribution ratio, includes following operations: selecting a first input pair and a second input pair from the phase interpolator; sequentially switching currents associated with the current distribution ratio from the first input pair to flowing through the second input pair, in order to adjust a phase of the output signal to correspond to a first phase interval; and after all of the currents flow through to the second input pair, selecting the second input pair and a third input pair from the phase interpolator, and adjusting the current distribution ratio to correspond the phase of the output signal to a second phase interval, in which the first phase interval and the second phase interval are continuous.

Abstract: A memory management method is provided according to an exemplary embodiment of the disclosure. The method includes: obtaining a valid data parameter based on a valid data amount of valid data stored in a plurality of physical erasing units, and obtaining a first threshold value based on the valid data parameter. The method also includes: obtaining a first determination parameter based on a number of a plurality of first physical erasing units, and the first physical erasing units are physical erasing units being programmed for storing data by using a single-page programming mode. The method further includes: performing a garbage collection operation if the first determination parameter is greater than the first threshold value.