Patents by Inventor Chien-Yu Chen

Chien-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230028904
    Abstract: A method includes depositing an inter-metal dielectric (IMD) layer over a conductive line. A via opening is formed in the IMD layer and directly over the conductive line. A width of the conductive line is greater than a width of the via opening. An overlay measurement is performed. The overlay measurement includes obtaining a backscattered electron image of the via opening and the conductive line and determining an overlay between the via opening and the conductive line according to the backscattered electron image.
    Type: Application
    Filed: January 31, 2022
    Publication date: January 26, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yu CHANG, Chien-Han CHEN, Chien-Chih CHIU, Chi-Che TSENG
  • Publication number: 20230025296
    Abstract: Methods for preparing a void-free protective coating are disclosed herein. The void-free protective coating is used on a dielectric window having a central hole, which is used in a plasma treatment tool. A first protective coating layer is applied to the window, leaving an uncoated annular retreat area around the central hole. The first protective coating layer is polished to produce a flat surface and fill in any voids on the window. A second protective coating layer is then applied upon the flat surface of the first protective coating layer to obtain the void-free coating. This increases process uptime and service lifetime of the dielectric window and the plasma treatment tool.
    Type: Application
    Filed: February 8, 2022
    Publication date: January 26, 2023
    Inventors: Shih-Tsung Chen, Tsung-Cheng Ho, Chien-Yu Wang, Yen-Shih Wang, Jiun-Rong Pai, Yeh-Chieh Wang
  • Publication number: 20220415968
    Abstract: An ovonic threshold switch (OTS) selector and a memory device including the OTS selector is provided. The OTS selector includes a switching layer formed of a GeCTe compound further doped with one or both of nitrogen and silicon, and exhibits improved thermal stability and electrical performance.
    Type: Application
    Filed: February 10, 2022
    Publication date: December 29, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Min Lee, Cheng-Hsien Wu, Cheng-Chun Chang, Elia Ambrosi, Hengyuan Lee, Ying-Yu Chen, Xinyu BAO, Tung-Ying Lee
  • Patent number: 11538805
    Abstract: A structure includes a semiconductor substrate including a first semiconductor region and a second semiconductor region, a first transistor in the first semiconductor region, and a second transistor in the second semiconductor region. The first transistor includes a first gate dielectric over the first semiconductor region, a first work function layer over and contacting the first gate dielectric, and a first conductive region over the first work function layer. The second transistor includes a second gate dielectric over the second semiconductor region, a second work function layer over and contacting the second gate dielectric, wherein the first work function layer and the second work function layer have different work functions, and a second conductive region over the second work function layer.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: December 27, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Chang Chiu, Chia-Ching Lee, Chien-Hao Chen, Hung-Chin Chung, Hsien-Ming Lee, Chi On Chui, Hsuan-Yu Tung, Chung-Chiang Wu
  • Patent number: 11538761
    Abstract: A semiconductor package includes a first semiconductor die, a molded die, a third encapsulant, and a redistribution structure. The molded die includes a chip, a first encapsulant, and a second encapsulant. The first encapsulant laterally wraps the chip. The second encapsulant laterally wraps the first encapsulant. The third encapsulant laterally wraps the first semiconductor die and the molded die. The redistribution structure extends on the second encapsulant, the third encapsulant, and the first semiconductor die. The redistribution structure is electrically connected to the first semiconductor die and the molded die. The second encapsulant separates the first encapsulant from the third encapsulant.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: December 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Cheng Hou, Wei-Yu Chen, Jung-Wei Cheng, Tsung-Ding Wang, Chien-Hsun Lee, Chung-Shi Liu
  • Patent number: 11527442
    Abstract: In an embodiment, a method of forming a semiconductor device includes forming a fin protruding above a substrate; forming a gate structure over the fin; forming a recess in the fin and adjacent to the gate structure; performing a wet etch process to clean the recess; treating the recess with a plasma process; and performing a dry etch process to clean the recess after the plasma process and the wet etch process.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: December 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Che-Yu Lin, Chien-Wei Lee, Chien-Hung Chen, Wen-Chu Hsiao, Yee-Chia Yeo
  • Patent number: 11527516
    Abstract: A micro light-emitting diode (micro LED) display and a package method thereof are described. The micro LED display includes a substrate, various micro LED chips, and an encapsulation film. The substrate includes a wire. The micro LED chips are disposed on a surface of the substrate and are electrically connected to the wire. A light-emitting surface of each of the micro LED chips is set with at least one micro structure, and each micro structure has a top end. The encapsulation film encapsulates the micro LED chips, and covers the surface of the substrate. The top ends of the micro structures are located in a light-emitting surface of the encapsulation film.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: December 13, 2022
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: Chia-Ming Fan, Po-Lun Chen, Chun-Ta Chen, Po-Ching Lin, Ya-Chu Hsu, Chien-Yu Huang, Ping-Hsiang Kao
  • Publication number: 20220392832
    Abstract: A method of forming a semiconductor structure includes the following operations. A first conductive structure is formed on a first side of a first glass carrier. A second glass carrier is bonded to the first conductive structure. Conductive vias are formed to penetrate through the first glass carrier, and the conductive vias are electrically connected to the first conductive structure. A second conductive structure is formed on a second side of the first glass carrier opposite to the first side, and the second conductive structure is electrically connected to the conductive vias.
    Type: Application
    Filed: June 6, 2021
    Publication date: December 8, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, Yu-Min Liang, Tsung-Ding Wang, Jiun-Yi Wu, Chien-Hsun Lee
  • Patent number: 11523537
    Abstract: A liquid-cooling heat dissipation device includes a water-cooling module, a water-tank module, a power module, a first and a second water-cooling radiators. The water-cooling module includes a base, a plate, an isolating structure and a heat-conducting unit. The isolating structure connects between the base and the plate. The plate, the isolating structure and the base define a first chamber. The isolating structure and the plate define a second and a third chambers. The first, the second and the third chambers are isolated from each other. The heat-conducting unit is partially located within the first chamber and partially exposed from the base. The first and the second water-cooling radiators connect to the plate and communicate between the water-cooling module and the water-tank module. The power module drives a medium to flow between the water-cooling module and the water-tank module through the first and the second water-cooling radiators.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: December 6, 2022
    Assignee: AURAS TECHNOLOGY CO., LTD.
    Inventors: Chien-Yu Chen, Tian-Li Ye, Jen-Hao Lin, Chien-An Chen
  • Patent number: 11515459
    Abstract: The present invention relates to a micro light-emitting diode display panel and a method for producing the same. A backplane and a light-emitting diode display layer are subjected to a bonding process to form eutectic structures between the backplane and light-emitting diodes of the light-emitting diode display layer. Then, an adhesive bonding layer including a resin material and conducting materials is formed on a surface of the backplane, and a heating process is performed, thereby causing the conducting materials to form a plurality of metallic bridge connection structures. Therefore, a bonding between the light-emitting diode and the backplane is reinforced, and tensile strength of the micro light-emitting diode display panel is enhanced.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: November 29, 2022
    Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: Ping-Hsiang Kao, Po-Lun Chen, Chun-Ta Chen, Po-Ching Lin, Ya-Chu Hsu, Chia-Ming Fan, Chien-Yu Huang
  • Publication number: 20220375822
    Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.
    Type: Application
    Filed: July 19, 2021
    Publication date: November 24, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Siang-Yu Lin, Wen-Jung Tsai, Chia-Yang Chen, Chien-Cheng Lin
  • Publication number: 20220370824
    Abstract: A light supply method and a light supply system for phototherapy are provided. The light supply method includes the following. A plurality of light emitting modules of a light source device are driven so that a light source device outputs a first light. The first light is sensed by a light sensing module. A light parameter corresponding to best physiology of a user is received. A light output ratio of the light emitting modules is adjusted based on the light parameter, thereby adjusting the first light to a second light. The light emitting modules respectively have different central wavelengths. A half-height width of a plurality of spectra of the light emitting modules is less than 30 nanometers.
    Type: Application
    Filed: November 11, 2021
    Publication date: November 24, 2022
    Applicant: National Taiwan University of Science and Technology
    Inventors: Chien-Yu Chen, Hung-Wei Chen
  • Publication number: 20220376125
    Abstract: An optical sensing apparatus is provided. The optical sensing apparatus includes a substrate, one or more pixels supported by the substrate, where each of the one or more pixels includes an absorption region, a field control region, a first contact region, a second contact region and a carrier confining region. The field control region and the first contact region are doped with a dopant of a first conductivity type. The second contact region is doped with a dopant of a second conductivity type. The carrier confining region includes a first barrier region and a channel region, where the first barrier region is doped with a dopant of the second conductivity type and has a first peak doping concentration, and where the channel region is intrinsic or doped with a dopant of the second conductivity type and has a second peak doping concentration lower than the first peak doping concentration.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 24, 2022
    Inventors: Yun-Chung Na, Chien-Yu Chen, Yen-Ju Lin
  • Publication number: 20220375729
    Abstract: An edge ring, for a plasma etcher, may include a circular bottom portion with an opening sized to receive an electrostatic chuck supporting a semiconductor device, and a circular top portion integrally connected to a first top part of the circular bottom portion. The edge ring may include a circular chamfer portion integrally connected to a second top part of the circular bottom portion and integrally connected to a side of the circular top portion. The circular chamfer portion may include an inner surface that is angled radially outward from the opening at less than ninety degrees.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 24, 2022
    Inventors: Chien-Yu WANG, Hung-Bin LIN, Shih-Ping HONG, Shih-Hao CHEN, Chen-Hsiang LU, Ping-Chung LEE
  • Publication number: 20220364303
    Abstract: A thermoplastic artificial leather is provided, which includes a first structure layer, a second structure layer, a plurality of recycled particles, and a third structure layer, in which the second structure layer is disposed on the first structure layer, the plurality of recycled particles disposed on the second structure layer, and the third structure layer is disposed to cover the plurality of recycled particles. According to above stacked structure, the thermoplastic artificial leather with environment friendly is formed, and the plurality of recycled particles is processed in a physical manner, which can solve the problem, the environmental protection issue, caused by the use of solvent to process the recycled particle in the prior art. Use of the material characteristics of each structure layer to reprocess the recycled particles, so the reprocess procedure without using any solvent, so the environmental pollution and the production cost are greatly reduced.
    Type: Application
    Filed: March 8, 2022
    Publication date: November 17, 2022
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chien-Chia Huang, Tsung-Yu Tsai, Chieh Lee, Wei-Ling Chen
  • Publication number: 20220367226
    Abstract: Semiconductor devices, methods of manufacturing the semiconductor device and tools are disclosed herein. Some methods include providing an electrostatic chuck and placing an edge ring adjacent to the electrostatic chuck. The electrostatic chuck includes a first electrode to generate a sheath at a first distance over the electrostatic chuck. The edge ring includes a coil and a second electrode to generate an electric field control to maintain a portion of the sheath over the edge ring in a coplanar orientation with the portion of the sheath over the electrostatic chuck.
    Type: Application
    Filed: November 5, 2021
    Publication date: November 17, 2022
    Inventors: Shih-Yu Chang, Chien-Han Chen, Chien-Chih Chiu, Chi-Che Tseng
  • Publication number: 20220367563
    Abstract: A method for manufacturing a light-emitting device, includes: forming a semiconductor stack on a substrate, wherein the semiconductor stack includes a first semiconductor layer, a second semiconductor layer and an active region formed therebetween; removing portions of the semiconductor stack to form a plurality of mesas and exposing a part of the first semiconductor layer, wherein the part of the first semiconductor layer includes a first portion and a second portion; forming a plurality of trenches by removing the first portion of the part of the first semiconductor to exposing a top surface of the substrate and a side wall of the first semiconductor, wherein the plurality of trenches defining a plurality of light-emitting units in the semiconductor stack; wherein in a top view, the plurality of trenches includes a first trench extending along a first direction and a second trench extending along a second direction not parallel with the first trench; and wherein the second trench includes an end; forming co
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Inventors: Cheng-Yu CHEN, Hui-Chun YEH, Chien-Fu SHEN
  • Patent number: 11500261
    Abstract: An electrophoretic display and a driving method thereof are provided. The electrophoretic display includes a display panel and a driving circuit. The display panel includes an electrophoretic unit and a driving substrate. The electrophoretic unit includes a plurality of electrophoretic particles. The driving substrate is disposed below the electrophoretic unit. The driving circuit is coupled to the driving substrate. The driving circuit sequentially provides a first reset signal and a second reset signal to the driving substrate during a reset period to reset the plurality of electrophoretic particles. The first reset signal sequentially includes a first sub-balanced signal and a first sub-mixed signal. The second reset signal sequentially includes a second sub-balanced signal and a second sub-mixed signal.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: November 15, 2022
    Assignee: E Ink Holdings Inc.
    Inventors: Hsin-I Wu, Chien-Hung Chen, Chen-Kai Chiu, Chih-Yu Cheng
  • Publication number: 20220361293
    Abstract: A method includes placing a first package component over a vacuum boat, wherein the vacuum boat comprises a hole, and wherein the first package component covers the hole. A second package component is placed over the first package component, wherein solder regions are disposed between the first and the second package components. The hole is vacuumed, wherein the first package component is pressed by a pressure against the vacuum boat, and wherein the pressure is generated by a vacuum in the hole. When the vacuum in the hole is maintained, the solder regions are reflowed to bond the second package component to the first package component.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 10, 2022
    Inventors: Ming-Da Cheng, Hsiu-Jen Lin, Cheng-Ting Chen, Wei-Yu Chen, Chien-Wei Lee, Chung-Shi Liu
  • Publication number: 20220359164
    Abstract: A cantilever for gas flow direction control configured to support an electrode housing bowl in an associated etch process chamber. The cantilever may have a cross-section that is circular, elliptical, or airfoil shaped. The shape of the cantilever induces the flow of gas and etch products within the chamber around the cantilever, reducing turbulence around the edge of a wafer.
    Type: Application
    Filed: August 18, 2021
    Publication date: November 10, 2022
    Inventors: Chien-Liang Chen, Chien-Yu Wang, Wei-Da Chen, Yu-Ning Cheng, Shih-tsung Chen, Yung-Yao Lee