Patents by Inventor Chien-Yu Huang

Chien-Yu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150063039
    Abstract: A circuit includes stacked memory arrays and a control circuit. The stacked memory arrays includes a first layer and a second layer. The control circuit is configured to receive a first address in the first layer; cause the second layer to be enabled for accessing; and provide a second row address for accessing the second layer.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 5, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: CHIEN-YUAN CHEN, CHIEN-YU HUANG, YI-TZU CHEN, HAU-TAI SHIEH
  • Publication number: 20150055402
    Abstract: Disclosed is a novel static random access memory (SRAM) device. The SRAM device comprises a plurality of memory array layers vertically disposed one above another, a layer decoder circuit disposed on each memory array layer, a word line driver circuit disposed on each memory array layer, and a plurality of complementary bit line pairs wherein each complementary bit line pair extends vertically to couple a memory cell in each memory array layer. Each memory array layer comprises a plurality of memory cells and a word line disposed thereon. Each word line is connected to the plurality of memory cells disposed on its memory array layer. The number of memory cells in a layer corresponds to a predetermined memory page size. Each layer decoder circuit is configured to decode a portion of an SRAM address to select its memory array layer if the SRAM address corresponds to memory cells on its memory array layer. Each word line driver circuit is configured to drive the word line disposed on its memory array layer.
    Type: Application
    Filed: August 22, 2013
    Publication date: February 26, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: CHIEN-YUAN CHEN, CHIEN-YU HUANG, HAU-TAI SHIEH
  • Patent number: 8964454
    Abstract: Systems and methods are provided for fabricating a static random access memory (SRAM) cell in a multi-layer semiconductor device structure. The SRAM cell includes two pull-up transistors, two pull-down transistors, a plurality of operation-assistance transistors, and two pass-gate transistors. The first pull-up transistor and the second pull-up transistor are formed in a first device layer of the multi-layer semiconductor device structure. The first pull-down transistor and the second pull-down transistor are formed in a second device layer of the multi-layer semiconductor device structure. The plurality of operation-assistance transistors are formed in the first device layer and configured to provide local supply voltages to the first pull-up transistor and the second pull-up transistor respectively. The first pass-gate transistor and the second pass-gate transistor are formed in the second device layer and configured to provide access to the data bit.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: February 24, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chien-Yu Huang, Chien-Yuan Chen, Hau-Tai Shieh
  • Publication number: 20140072145
    Abstract: The present invention discloses an audio playing system for protecting a storage medium of an electrical device. The audio playing system includes a detecting unit, a processing unit, an adjusting module and a playing module. The detecting unit detects vibration of the electrical device to generate a detection signal corresponding to the vibration. The processing unit compares the detection signal with the tolerable vibration value of the storage medium to generate a comparison result, and generates an adjustment signal according to the comparison result. The adjusting module adjusts an audio file according to the adjustment signal to generate an adjusted audio file. The playing module plays the adjusted audio file. The present invention also discloses an audio playing method for protecting a storage medium of an electrical device.
    Type: Application
    Filed: June 14, 2013
    Publication date: March 13, 2014
    Inventors: Chien-Yu HUANG, Po-Jung CHEN, Shih-Hsuan HUANG
  • Patent number: 8242381
    Abstract: A through-hole structure for a wafer level packaging includes a wafer, a RF passage penetrating through the wafer, and a through-hole structure disposed around the RF passage. The through-hole structure has three types of structure. The through hole structure includes a plurality of holes filled with metal material thereinside. On the other hand, the through hole structure can be a plurality of holes coated with a metal layer on the internal surface thereof. Alternatively, the through hole structure has both of the two above hole structure. Depending on the structure, the through hole structure performs an electric reference for preventing the RF signal from decay or interference.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: August 14, 2012
    Assignee: Azurewave Technologies, Inc.
    Inventors: Chung-Er Huang, Chien-Yu Huang
  • Patent number: 8059425
    Abstract: An integrated circuit module with temperature compensation crystal oscillator (TCXO) applying to an electronic device comprises: one substrate having one top surface; one temperature compensation crystal oscillator (TCXO) disposed on the top surface; at least one chip disposed on the top surface; one encapsulating piece formed on the top surface for covering the TCXO and the chip. As above-described structure, TCXO is prevented from exchanging heat due to the temperature difference so that the stability of the TCXO is improved.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: November 15, 2011
    Assignee: Azurewave Technologies, Inc.
    Inventors: Chung-Er Huang, Chien-Yu Huang
  • Patent number: 7946058
    Abstract: An article of footwear may have an upper and a sole structure secured to the upper. The sole structure includes a midsole and an outsole. The midsole has an upper surface and an opposite lower surface. The upper surface defines a plurality of depressions, and the lower surface defines a plurality of indentations extending toward the depressions. The outsole forms projections that extend into the indentations of the midsole, and the outsole has grooves located opposite the projections.
    Type: Grant
    Filed: January 16, 2008
    Date of Patent: May 24, 2011
    Assignee: NIKE, Inc.
    Inventors: Daniel A. Johnson, Chien-Yu Huang
  • Publication number: 20110119579
    Abstract: The invention provides a method of turning over a three-dimensional graphic object by use of a touch sensitive input device. In particular, the method according to the invention provides a user with intuitive operation on a touch sensitive surface of the touch sensitive input device to turn over whole or a portion (e.g., a page sub-object) of the three-dimensional graphic object.
    Type: Application
    Filed: July 7, 2010
    Publication date: May 19, 2011
    Applicant: QUANTA COMPUTER, INC.
    Inventors: Chien-Yu Huang, Chin-Chin Chen, Chih-Chieh Hsiao
  • Patent number: 7841108
    Abstract: An article of footwear with a sole system including a transparent heel portion is disclosed. The transparent heel portion includes a cavity configured to receive a support member comprising a plurality of support columns and an indicia member associated with the support member. The indicia and the support member are both visible along a bottom surface of the heel portion.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: November 30, 2010
    Assignee: Nike, Inc.
    Inventors: Daniel A. Johnson, Chien-Yu Huang, Hui-Chin Chen
  • Publication number: 20090296361
    Abstract: An integrated circuit module with temperature compensation crystal oscillator (TCXO) applying to an electronic device comprises: one substrate having one top surface; one temperature compensation crystal oscillator (TCXO) disposed on the top surface; at least one chip disposed on the top surface; one encapsulating piece formed on the top surface for covering the TCXO and the chip. As above-described structure, TCXO is prevented from exchanging heat due to the temperature difference so that the stability of the TCXO is improved.
    Type: Application
    Filed: May 28, 2008
    Publication date: December 3, 2009
    Inventors: Chung-Er Huang, Chien-Yu Huang
  • Publication number: 20090091907
    Abstract: A shielding structure for electronic components includes a circuit board, at least one electronic module disposed on the circuit board and electrically connected thereto, at least one first covering layer, at least one shielding layer, and one second covering layer. Each first covering layer covers one electronic module and each first covering layer is covered by the shielding layer. The second covering layer covers the shielding layers. In the above-mentioned structure, the shielding layer is formed by coating or printing on the first covering layer in order to shield the electromagnetic radiation emitted by the function module. The time and the costs required for the manufacture of the above invention are reduced compared to the prior art.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 9, 2009
    Inventors: Chung-Er Huang, Chien-Yu Huang
  • Publication number: 20090021329
    Abstract: A through-hole structure for a wafer level packaging includes a wafer, a RF passage penetrating through the wafer, and a through-hole structure disposed around the RF passage. The through-hole structure has three types of structure. The through hole structure includes a plurality of holes filled with metal material thereinside. On the other hand, the through hole structure can be a plurality of holes coated with a metal layer on the internal surface thereof. Alternatively, the through hole structure has both of the two above hole structure. Depending on the structure, the through hole structure performs an electric reference for preventing the RF signal from decay or interference.
    Type: Application
    Filed: September 17, 2007
    Publication date: January 22, 2009
    Applicant: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: CHUNG-ER HUANG, CHIEN-YU HUANG
  • Publication number: 20080295361
    Abstract: An article of footwear with a sole system including a transparent heel portion is disclosed. The transparent heel portion includes a cavity configured to receive a support member comprising a plurality of support columns and an indicia member associated with the support member. The indicia and the support member are both visible along a bottom surface of the heel portion.
    Type: Application
    Filed: May 29, 2007
    Publication date: December 4, 2008
    Applicant: Nike, Inc.
    Inventors: Daniel A. Johnson, Chien-Yu Huang, Hui-Chin Chen
  • Publication number: 20080229617
    Abstract: An article of footwear may have an upper and a sole structure secured to the upper. The sole structure includes a midsole and an outsole. The midsole has an upper surface and an opposite lower surface. The upper surface defines a plurality of depressions, and the lower surface defines a plurality of indentations extending toward the depressions. The outsole forms projections that extend into the indentations of the midsole, and the outsole has grooves located opposite the projections.
    Type: Application
    Filed: January 16, 2008
    Publication date: September 25, 2008
    Applicant: NIKE, INC.
    Inventors: Daniel A. Johnson, Chien-Yu Huang
  • Patent number: 7216138
    Abstract: A method and apparatus are described for converting a number from a floating point format to an integer format or from an integer format to a floating point format responsive to a control signal of a control signal format. Numbers are stored in the floating point format in a register of a first set of architectural registers in a packed format. One or more numbers in the floating point format are converted to the integer format and placed in a register of a second set of architectural registers in a packed format. Conversion from integer format to floating point format is performed in a similar manner. A floating point arithmetic apparatus is described that provides for converting a plurality of numbers between integer formats and a floating point formats, further providing for conversion operations that require a greater data path width than floating-point arithmetic operations.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: May 8, 2007
    Assignee: Intel Corporation
    Inventors: Mohammad Abdallah, Prasad Modali, Chien-Yu Huang, legal representative, Thomas R. Huff, Vladimir Pentkovski, Patrice Roussel, Shreekant S. Thakkar, Hsien-Cheng E. Hsieh, deceased
  • Patent number: 7093241
    Abstract: A method and machine-readable medium provide flags to commonly derived objects so that redundant method calls are avoided.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: August 15, 2006
    Assignee: Intel Corporation
    Inventors: Chien-Yu Huang, legal representative, Hsien-Cheng E. Hsieh, deceased
  • Publication number: 20040268094
    Abstract: A method and apparatus are described for converting a number from a floating point format to an integer format or from an integer format to a floating point format responsive to a control signal of a control signal format.
    Type: Application
    Filed: February 14, 2001
    Publication date: December 30, 2004
    Inventors: Mohammad Abdallah, Prasad Modali, Chien-Yu Huang, Hsien-Cheng E. Hsieh, Thomas R. Huff, Vladimir Pentkovski, Patrice Roussel, Shreekant S. Thakkar
  • Publication number: 20030229887
    Abstract: A method and machine-readable medium provide flags to commonly derived objects so that redundant method calls are avoided.
    Type: Application
    Filed: June 7, 2002
    Publication date: December 11, 2003
    Inventors: Hsien-Cheng E. Hsieh, Chien-Yu Huang
  • Patent number: D647070
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: October 18, 2011
    Assignee: Lite-On Technology Corp.
    Inventors: Chien-Yu Huang, Pu-Cheng Yeh, Chen-Chi Tseng, Zhi-Yuan Liang
  • Patent number: D647864
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: November 1, 2011
    Assignee: Lite-On Technology Corp.
    Inventors: Chien-Yu Huang, Pu-Cheng Yeh, Chen-Chi Tseng, Zhi-Yuan Liang