Abstract: A memory device for CIM, applicable to a 3D AND-type flash memory, includes a memory array, input word line pairs, and a signal processing circuit. The memory array includes first and second pairs of memory cells. Each first pair of memory cells includes a first memory cell set coupled to a first GBL and a second memory cell set coupled to a second GBL. Each second pair of memory cells includes a third memory cell set coupled to the first GBL and a fourth memory cell set coupled to the second GBL. Each input word line pair includes a first input word line coupled to the first and the second memory cell sets, and a second input word line coupled to the third and the fourth memory cell sets s. The signal processing circuit is coupled to the first and second global bit lines.

Abstract: A memory device, such as a 3D AND type flash memory, and a compensation method of data retention thereof are provided. The compensation method includes the following. A reading operation is performed on each of a plurality of programmed memory cells of the memory device. Whether a charge loss phenomenon occurs in the programmed memory cells is determined through the reading operation to set the programmed memory cells to be charge loss memory cells. A refill program operation is performed on the charge loss memory cells.

Abstract: A memory device and a data approximation search method thereof are proposed. The memory device includes a plurality of selection switch pairs, a plurality of memory cell string pairs, a sense amplifier, and a page buffer. The selection switch pairs receive multiple search data pairs, respectively. The memory cell string pairs are respectively coupled to a global bit line through the selection switch pairs. Each of the memory cell string pairs determines whether to provide current on the global bit line according to stored data of a selected memory cell pair and each of the search data pairs. The sense amplifier obtains multiple search results according to the current on the global bit line and at least one reference currents respectively corresponding to at least one similarity. The page buffer records the search results and generates similarity information by accumulating the search results.

Abstract: A memory device, such as a 3D AND type flash memory, and a compensation method of data retention thereof are provided. The compensation method includes the following. A reading operation is performed on each of a plurality of programmed memory cells of the memory device. Whether a charge loss phenomenon occurs in the programmed memory cells is determined through the reading operation to set the programmed memory cells to be charge loss memory cells. A refill program operation is performed on the charge loss memory cells.

Abstract: A ternary content addressable memory, disposed in a stacked memory device, includes a first memory cell string and a second memory cell string. The first memory cell string is coupled between a matching line and a first source line and receives multiple first word line signals. The first memory cell string has a first memory cell string selection switch controlled by a first search signal. The second memory cell string is coupled between the matching line and a second source line and receives multiple second word line signals. The second memory cell string has a second memory cell string selection switch controlled by a second search signal.

Abstract: A memory device for CIM, applicable to a 3D AND-type flash memory, includes a memory array, input word line pairs, and a signal processing circuit. The memory array includes first and second pairs of memory cells. Each first pair of memory cells includes a first memory cell set coupled to a first GBL and a second memory cell set coupled to a second GBL. Each second pair of memory cells includes a third memory cell set coupled to the first GBL and a fourth memory cell set coupled to the second GBL. Each input word line pair includes a first input word line coupled to the first and the second memory cell sets, and a second input word line coupled to the third and the fourth memory cell sets s. The signal processing circuit is coupled to the first and second global bit lines.

Abstract: A memory device and a data approximation search method thereof are proposed. The memory device includes a plurality of selection switch pairs, a plurality of memory cell string pairs, a sense amplifier, and a page buffer. The selection switch pairs receive multiple search data pairs, respectively. The memory cell string pairs are respectively coupled to a global bit line through the selection switch pairs. Each of the memory cell string pairs determines whether to provide current on the global bit line according to stored data of a selected memory cell pair and each of the search data pairs. The sense amplifier obtains multiple search results according to the current on the global bit line and at least one reference currents respectively corresponding to at least one similarity. The page buffer records the search results and generates similarity information by accumulating the search results.

Abstract: A ternary content addressable memory, disposed in a stacked memory device, includes a first memory cell string and a second memory cell string. The first memory cell string is coupled between a matching line and a first source line and receives multiple first word line signals. The first memory cell string has a first memory cell string selection switch controlled by a first search signal. The second memory cell string is coupled between the matching line and a second source line and receives multiple second word line signals. The second memory cell string has a second memory cell string selection switch controlled by a second search signal.

Abstract: A wireless access point device includes a main frame, an antenna module, a signal transceiving element, an unlocking assembly and a fastener. The main frame includes a casing and a first connection portion formed with a fastening recess, connected to the casing and communicates with the internal space. The signal transceiving element is located in the casing. The antenna module includes a waveguide and a second connection portion disposed on one end of the waveguide. The second connection portion is detachably connected to the first connection portion to couple to the signal transceiving element. The unlocking assembly is movably located in the fastening recess. The fastener includes a buckle, and an elastic member that is connected to the second connection portion and the buckle. The antenna module is fixed on the main frame when the buckle is inserted into the fastening recess.

Abstract: A wireless access point device includes a main frame, a transmission assembly, an antenna module and a fixing assembly. The main frame includes a casing and a first connection portion connected to the casing. The transmission assembly is disposed in an internal space of the casing and provided with a signal transceiving element. The antenna module includes a waveguide, a second connection portion and a positioning recess. The second connection portion is disposed on the waveguide and detachably connected to the first connection portion to be coupled to the signal transceiving element. The positioning recess is formed on the second connection portion. The fixing assembly is movably disposed on the first connection portion. The antenna module is thereby fixed on the casing, when the second connection portion and the first connection portion are fixed through the fixing assembly removably inserting into the positioning recess.

Abstract: A wireless access point device includes a main frame, a transmission assembly, an antenna module and a fixing assembly. The main frame includes a casing and a first connection portion connected to the casing. The transmission assembly is disposed in an internal space of the casing and provided with a signal transceiving element. The antenna module includes a waveguide, a second connection portion and a positioning recess. The second connection portion is disposed on the waveguide and detachably connected to the first connection portion to be coupled to the signal transceiving element. The positioning recess is formed on the second connection portion. The fixing assembly is movably disposed on the first connection portion. The antenna module is thereby fixed on the casing, when the second connection portion and the first connection portion are fixed through the fixing assembly removably inserting into the positioning recess.

Abstract: A wireless access point device includes a main frame, an antenna module, a signal transceiving element, an unlocking assembly and a fastener. The main frame includes a casing and a first connection portion formed with a fastening recess, connected to the casing and communicates with the internal space. The signal transceiving element is located in the casing. The antenna module includes a waveguide and a second connection portion disposed on one end of the waveguide. The second connection portion is detachably connected to the first connection portion to couple to the signal transceiving element. The unlocking assembly is movably located in the fastening recess. The fastener includes a buckle, and an elastic member that is connected to the second connection portion and the buckle. The antenna module is fixed on the main frame when the buckle is inserted into the fastening recess.

Abstract: A waterproof assembly includes a casing, a gasket, and a cap. The casing has an opening. The gasket includes a main body and a protruding portion. The main body has a first circular raised structure configured to abut against an inner surface of the casing. The protruding portion is connected to the main body and is configured to at least partially protrude out of the casing through the opening. The cap is configured to abut against a side of the main body away from the opening. The cap has a through hole configured to be aligned with the protruding portion. The casing further has a plurality of fixing members configured to abut against a side of the cap away from the gasket.

Abstract: In programming a memory device, a target memory cell is programed by a programming voltage and a programming code. First and second verification voltages are applied on the target memory cell to obtain first and second read data. Whether the target memory cell passes an actual programming verification and/or a pseudo programming verification is determined based on the programming code, the first and the second read data.

Abstract: A waterproof assembly includes a casing, a gasket, and a cap. The casing has an opening. The gasket includes a main body and a protruding portion. The main body has a first circular raised structure configured to abut against an inner surface of the casing. The protruding portion is connected to the main body and is configured to at least partially protrude out of the casing through the opening. The cap is configured to abut against a side of the main body away from the opening. The cap has a through hole configured to be aligned with the protruding portion. The casing further has a plurality of fixing members configured to abut against a side of the cap away from the gasket.

Abstract: In programming a memory device, a target memory cell is programmed by a programming voltage and a programming code. First and second verification voltages are applied on the target memory cell to obtain first and second read data. Whether the target memory cell passes an actual programming verification and/or a pseudo programming verification is determined based on the programming code, the first and the second read data.

Abstract: A two-sided, staged programming operation is applied to a memory having first and second stacks of memory cells C1(i) and C2(i), i being the physical level of a cell. The staged programming operation includes applying a preliminary program stage S1, an intermediate program stage S2, and a final program stage S3 to memory cells in the first and second stacks. In a programming order the final program stage S3 is applied to memory cells in the first and second stacks at each level (i) for which the intermediate program stage S2 has already been applied to the memory cells in any neighboring levels (levels i+1 and i?1). The intermediate program stage S2 is applied only to memory cells for which the preliminary program stage S1 has already been applied to the cells in any neighboring levels (levels i+1 and i?1).

Abstract: A two-sided, staged programming operation is applied to a memory having first and second stacks of memory cells C1(i) and C2(i), i being the physical level of a cell. The staged programming operation includes applying a preliminary program stage S1, an intermediate program stage S2, and a final program stage S3 to memory cells in the first and second stacks. In a programming order the final program stage S3 is applied to memory cells in the first and second stacks at each level (i) for which the intermediate program stage S2 has already been applied to the memory cells in any neighboring levels (levels i+1 and i?1). The intermediate program stage S2 is applied only to memory cells for which the preliminary program stage S1 has already been applied to the cells in any neighboring levels (levels i+1 and i?1).

Abstract: The present disclosure discloses a multi-eye analog smart timekeeping apparatus, comprising: a dial, comprising a dial substrate comprising a plurality of view regions; an arm positioned above the dial; a display panel positioned below the dial and comprising a plurality of display regions, each of the display regions corresponding to one of at least two of the view regions; and a shaft connected to the arm and being through the dial and the display panel. The present disclosure also discloses a method of making a display panel that may be used with the timekeeping apparatus, comprising: providing a first substrate comprising a first area; forming a display layer on the first substrate outside the first area; applying encapsulation material on the first area and around the display layer; sealing the display layer between the first substrate and a second substrate; and drilling a hole in the first area, wherein a size of the hole is smaller than a size of the first area.

Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.