Patents by Inventor Chih Chung Chang
Chih Chung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230008005Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.Type: ApplicationFiled: July 28, 2022Publication date: January 12, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hung-Ju Chou, Chih-Chung Chang, Jiun-Ming Kuo, Che-Yuan Hsu, Pei-Ling Gao, Chen-Hsuan Liao
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Publication number: 20220416058Abstract: Semiconductor structures and methods of forming the same are provided. A method according to the present disclosure includes forming a stack of epitaxial layers over a substrate, forming a first fin-like structure and a second fin-like structure from the stack, forming an isolation feature between the first fin-like structure and the second fin-like structure, forming a cladding layer over the first fin-like structure and the second fin-like structure, conformally depositing a first dielectric layer over the cladding layer, depositing a second dielectric layer over the first dielectric layer, planarizing the first dielectric layer and the second dielectric layer until the cladding layer are exposed, performing an etch process to etch the second dielectric layer to form a helmet recess, performing a trimming process to trim the first dielectric layer to widen the helmet recess, and depositing a helmet feature in the widened helmet recess.Type: ApplicationFiled: June 25, 2021Publication date: December 29, 2022Inventors: Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Chia-Cheng Chao, Chung-Ting Ko
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Patent number: 11532733Abstract: Semiconductor structures and methods of forming the same are provided. A method according to the present disclosure includes forming a stack of epitaxial layers over a substrate, forming a first fin-like structure and a second fin-like structure from the stack, forming an isolation feature between the first fin-like structure and the second fin-like structure, forming a cladding layer over the first fin-like structure and the second fin-like structure, conformally depositing a first dielectric layer over the cladding layer, depositing a second dielectric layer over the first dielectric layer, planarizing the first dielectric layer and the second dielectric layer until the cladding layer are exposed, performing an etch process to etch the second dielectric layer to form a helmet recess, performing a trimming process to trim the first dielectric layer to widen the helmet recess, and depositing a helmet feature in the widened helmet recess.Type: GrantFiled: June 25, 2021Date of Patent: December 20, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Chia-Cheng Chao, Chung-Ting Ko
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Patent number: 11532718Abstract: A semiconductor device includes a substrate, a plurality of insulators, a liner structure and a gate stack. The substrate has fins and trenches in between the fins. The insulators are disposed within the trenches of the substrate. The liner structure is disposed on the plurality of insulators and across the fins, wherein the liner structure comprises sidewall portions and a cap portion, the sidewall portions is covering sidewalls of the fins, the cap portion is covering a top surface of the fins and joined with the sidewall portions, and a maximum thickness T1 of the cap portion is greater than a thickness T2 of the sidewall portions. The gate stack is disposed on the liner structure and across the fins.Type: GrantFiled: July 30, 2020Date of Patent: December 20, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hsuan Liao, Chih-Chung Chang, Chun-Heng Chen, Jiun-Ming Kuo
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Publication number: 20220381058Abstract: Provided is an electronic lock featuring foolproofness and repositionability, including: a lock body, which is formed with teeth and a receiving cavity; a repositionable plate, which is formed with an elongated hole, a perforated portion, and a projecting spot, and is formed, on an underside thereof, with teeth, such that the teeth of the underside of the repositionable plate and the teeth of the lock body are mutually engageable with each other and the elongated hole of the repositionable plate is fixable to the receiving cavity of the lock body by a fastening element, and an escutcheon, which is formed with a fixing hole and a foolproof hole, such that the escutcheon is fit, by means of the foolproof hole, to the projecting spot of the repositionable plate and the escutcheon is fixed to the perforated portion of the repositionable plate by a fastening element.Type: ApplicationFiled: May 31, 2021Publication date: December 1, 2022Inventor: CHIH CHUNG CHANG
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Publication number: 20220328627Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.Type: ApplicationFiled: August 16, 2021Publication date: October 13, 2022Inventors: Jen-Hong Chang, Yi-Hsiu Liu, You-Ting Lin, Chih-Chung Chang, Kuo-Yi Chao, Jiun-Ming Kuo, Yuan-Ching Peng, Sung-En Lin, Chia-Cheng Chao, Chung-Ting Ko
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Publication number: 20220098899Abstract: A door lock facility includes a tongue pivotally attached to a housing with a pivot pin, an elbow is rotatably attached to the housing and includes a limb engageable with and detachable from an inner end portion of the tongue, an anchor is rotatably attached to the housing and includes one end portion located close to the tongue for anchoring a free end portion of the limb between the anchor and the tongue, a follower is slidably engaged in an actuator and movable into and out of the actuator for moving the anchor toward and away from the limb, and the actuator includes a rod slidably engaged in the actuator and moveable out of the actuator in order to rotate the elbow relative to the housing and to move the limb of the elbow from the tongue.Type: ApplicationFiled: September 28, 2020Publication date: March 31, 2022Inventor: Chih Chung Chang
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Publication number: 20220098900Abstract: A door lock device includes a tongue pivotally attached to a housing with a pivot pin, an elbow is rotatably attached to the housing and includes a limb engageable with and detachable from an inner end portion of the tongue, an anchor is rotatably attached to the housing and includes one end portion located close to the tongue for anchoring a free end portion of the limb between the anchor and the tongue, a follower is slidably engaged in an actuator and movable into and out of the actuator for moving the anchor toward and away from the limb, and the actuator includes a rod slidably engaged in the actuator and moveable out of the actuator in order to rotate the elbow relative to the housing and to move the limb of the elbow from the tongue.Type: ApplicationFiled: September 28, 2020Publication date: March 31, 2022Inventor: Chih Chung CHANG
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Publication number: 20220037487Abstract: A semiconductor device includes a substrate, a plurality of insulators, a liner structure and a gate stack. The substrate has fins and trenches in between the fins. The insulators are disposed within the trenches of the substrate. The liner structure is disposed on the plurality of insulators and across the fins, wherein the liner structure comprises sidewall portions and a cap portion, the sidewall portions is covering sidewalls of the fins, the cap portion is covering a top surface of the fins and joined with the sidewall portions, and a maximum thickness T1 of the cap portion is greater than a thickness T2 of the sidewall portions. The gate stack is disposed on the liner structure and across the fins.Type: ApplicationFiled: July 30, 2020Publication date: February 3, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chen-Hsuan Liao, Chih-Chung Chang, Chun-Heng Chen, Jiun-Ming Kuo
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Patent number: 11180931Abstract: A door lock device is worked in cooperate with a latch bolt, and includes a solenoid device engaged in a housing, a catch member pivotally attached to the housing with a spindle, two arms connected between the catch member and the spindle, and the solenoid device includes a shaft slidably engaged in a receptacle, and the shaft includes an upper end portion extendible upwardly beyond the receptacle and a lower end portion extendible downwardly beyond the receptacle, and the solenoid device includes two anchors on the upper end portion for selectively engaging with the upper arm, and two stops on the lower end portion for selectively engaging with the lower arm of the latch device, and for allowing the catch member to be evenly engaged with the latch bolt.Type: GrantFiled: August 29, 2018Date of Patent: November 23, 2021Assignee: GIANNI INDUSTRIES INC.Inventor: Chih Chung Chang
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Publication number: 20210257462Abstract: A semiconductor structure includes a SiGe fin protruding from a substrate, where the SiGe fin includes a top portion having a first sidewall and a second sidewall and a bottom portion having a third sidewall and a fourth sidewall, and where a first transition region connecting the first sidewall to the third sidewall and a second transition region connecting the second sidewall to the fourth sidewall each have a tapered profile extending away from the first sidewall and the second sidewall, respectively, and a Si-containing layer disposed on the top portion of the SiGe fin, where a portion of the Si-containing layer on the first transition region extends away from the first sidewall by a first lateral distance and a portion of the Si-containing layer on the second transition region extends away from the second sidewall by a second lateral distance that is different from the first lateral distance.Type: ApplicationFiled: December 18, 2020Publication date: August 19, 2021Inventors: Yu-Shan Lu, Hung-Ju Chou, Pei-Ling Gao, Chen-Hsuan Liao, Chih-Chung Chang, Jiun-Ming Kuo, Che-Yuan Hsu
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Publication number: 20210257360Abstract: Semiconductor devices and methods of forming the same are provided. In an embodiment, a semiconductor device includes a first fin extending along a first direction, a second fin extending parallel to the first fin, and a gate structure over and wrapping around the first fin and the second fin, the gate structure extending along a second direction perpendicular to the first direction. The first fin bents away from the second fin along the second direction and the second fin bents away from the first fin along the second direction.Type: ApplicationFiled: September 15, 2020Publication date: August 19, 2021Inventors: Jiun-Ming Kuo, Pei-Ling Gao, Chen-Hsuan Liao, Hung-Ju Chou, Chih-Chung Chang, Che-Yuan Hsu
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Publication number: 20210249312Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.Type: ApplicationFiled: February 11, 2020Publication date: August 12, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hung-Ju CHOU, Chih-Chung CHANG, Jiun-Ming KUO, Che-Yuan HSU, Pei-Ling GAO, Chen-Hsuan LIAO
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Publication number: 20200240177Abstract: A door lock device is worked in cooperate with a latch bolt, a press bar is attached to a door element and engaged with a locking pin and the latch bolt, a housing is attached to a door member, and a block device includes a board engaged into the chamber of the housing and secured to the housing, and the board includes a lever extended from the board for aligning with the locking pin and for selectively engaging with the locking pin and for preventing the locking pin from engaging into the chamber of the housing. The housing includes an opening formed in one side and communicating with the chamber of the housing for allowing the latch bolt to be engaged into the chamber of the housing. The lever of the board is engaged in the opening of the housing.Type: ApplicationFiled: January 25, 2019Publication date: July 30, 2020Inventor: Chih Chung CHANG
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Patent number: 10667207Abstract: In embodiments of access point assisted roaming, a mobile device, such as a mobile phone, tablet computer, or other portable device is implemented for wireless connection with access points, such as Wi-Fi access points. An access point controller can receive a request for a neighbor report from the mobile device, and also obtain a travel direction of the mobile device. The access point controller is implemented to determine access points that are each configured for a wireless connection with a communication system of the mobile device, where a wireless connection with an access point is based in part on a detected signal strength of an access point. The access point controller can then generate the neighbor report that lists one or more of the access points in order of connection likelihood and based on the travel direction of the mobile device.Type: GrantFiled: October 21, 2014Date of Patent: May 26, 2020Assignee: Microsoft Technology Licensing, LLCInventors: Chih-Chung Chang, Yatharth Gupta
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Publication number: 20200071959Abstract: A door lock device is worked in cooperate with a latch bolt, and includes a solenoid device engaged in a housing, a catch member pivotally attached to the housing with a spindle, two arms connected between the catch member and the spindle, and the solenoid device includes a shaft slidably engaged in a receptacle, and the shaft includes an upper end portion extendible upwardly beyond the receptacle and a lower end portion extendible downwardly beyond the receptacle, and the solenoid device includes two anchors on the upper end portion for selectively engaging with the upper arm, and two stops on the lower end portion for selectively engaging with the lower arm of the latch device, and for allowing the catch member to be evenly engaged with the latch bolt.Type: ApplicationFiled: August 29, 2018Publication date: March 5, 2020Inventor: Chih Chung CHANG
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Patent number: 10387329Abstract: Profiling cache replacement is a technique for managing data migration between a main memory and a cache memory to improve overall system performance. A profiler maintains counters that count memory requests for access to the pages maintained in both the cache memory and the main memory. Based on this access-request count information, a mover moves pages between the main and cache memories. For example, the mover can swap little-requested pages of the cache memory with highly-requested pages of the main memory. The mover can do so, for instance, when the counters indicate that the number of page access requests for highly-requested pages of the main memory is greater than the number of page access requests for little-requested pages of the cache memory. To avoid impeding the operations of memory users, the mover can perform page swapping in the background at predetermined time intervals, such as once every microsecond (?s).Type: GrantFiled: April 12, 2016Date of Patent: August 20, 2019Assignee: Google LLCInventor: Chih-Chung Chang
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Publication number: 20190203503Abstract: A door lock device includes a tongue pivotally engaged in a housing, a latch slidably received in the housing for latching the tongue to the housing, a sliding member located above the latch for forcing the latch to engage with the tongue, a follower slidably engaged in the sliding member and having a projection for moving the sliding member away from the tongue, a lever arm is pivotally attached to the housing and includes an end portion engaged with the follower for moving the follower up and down relative to the sliding member and the housing, a rotary member is attached to the housing and includes a stud engaged with the lever arm for rotating the lever arm relative to the housing, and a link is slidably engaged in the housing and connected to the rotary member.Type: ApplicationFiled: December 28, 2017Publication date: July 4, 2019Inventor: Chih Chung CHANG
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Patent number: 10234497Abstract: Techniques are disclosed for increasing a quantity of candidate electronic-component states determinable from one or more input pins. The techniques may use an internal pull resistor to test a strength of an external resistor to gain two extra candidate pin states. Additional candidate electronic-component states are then gained based on the extra candidate pin states, combinations of pin states of two or more input pins, and/or detecting a short between two or more input pins.Type: GrantFiled: August 7, 2017Date of Patent: March 19, 2019Assignee: Google LLCInventors: Chiu-Mao Chang, Chih-Chung Chang
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Publication number: 20190041452Abstract: Techniques are disclosed for increasing a quantity of candidate electronic-component states determinable from one or more input pins. The techniques may use an internal pull resistor to test a strength of an external resistor to gain two extra candidate pin states. Additional candidate electronic-component states are then gained based on the extra candidate pin states, combinations of pin states of two or more input pins, and/or detecting a short between two or more input pins.Type: ApplicationFiled: August 7, 2017Publication date: February 7, 2019Applicant: Google LLCInventors: Chiu-Mao Chang, Chih-Chung Chang