Patents by Inventor Chih Chung Chang
Chih Chung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10089239Abstract: Provided are methods, systems, and apparatus for managing and controlling memory caches, in particular, system level caches outside of those closest to the CPU. The processes and representative hardware structures that implement the processes are designed to allow for detailed control over the behavior of such system level caches. Caching policies are developed based on policy identifiers, where a policy identifier corresponds to a collection of parameters that control the behavior of a set of cache management structures. For a given cache, one policy identifier is stored in each line of the cache.Type: GrantFiled: May 26, 2016Date of Patent: October 2, 2018Assignee: Google LLCInventors: Allan D. Knies, Shinye Shiu, Chih-Chung Chang, Vyacheslav Vladimirovich Malyugin, Santhosh Rao
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Patent number: 9847296Abstract: A method for forming a multilayer barrier comprises forming a conductive line over a substrate, depositing a dielectric layer over the conductive line, forming a plug opening in the dielectric layer, forming a multilayer barrier through a plurality of deposition processes and corresponding plasma treatment processes.Type: GrantFiled: February 14, 2014Date of Patent: December 19, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chung Chang, Jung-Chih Tsao, Chun Che Lin, Yu-Ming Huang, Tain-Shang Chang, Jian-Shin Tsai
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Publication number: 20170341201Abstract: An embodiment retainer ring includes an outer ring encircling an opening and an inner ring attached to the outer ring. The inner ring is disposed between the opening and the outer ring. The inner ring includes a softer material than the outer ring and a plurality of voids within the softer material.Type: ApplicationFiled: May 26, 2016Publication date: November 30, 2017Inventors: Chun-Wei Hsu, Chi-Jen Liu, Liang-Guang Chen, Chih-Chung Chang, Cheng-Chun Chang, Hsin-Kai Chen, Yi-Sheng Lin, Shi-Ya Hsu, Tsung-Ju Lin, Yi-Sheng Ma
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Publication number: 20170228322Abstract: This document describes profiling cache replacement. Profiling cache replacement is a technique for managing data migration between a main memory and a cache memory to improve overall system performance. Unlike conventional cache replacement techniques, profiling cache replacement employs a profiler to maintain counters that count memory requests for access to not only the pages maintained in the cache memory, but also the pages maintained in the main memory. Based on the information collected by the profiler (e.g., about memory access requests), a mover moves pages between the main and cache memories. By way of example, the mover can swap highly-requested pages of the main memory, such as a most-requested page of the main memory, with little-requested pages of the cache memory, such as a least-requested page of the cache memory.Type: ApplicationFiled: April 12, 2016Publication date: August 10, 2017Inventor: Chih-Chung Chang
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Patent number: 9591554Abstract: This document describes management capabilities for a wireless docking experience. A wireless dock is configured to connect to multiple peripheral devices, such as a monitor, a keyboard, and a mouse. Mobile devices can connect to the wireless dock, via a short-range wireless connection, to utilize the multiple peripheral devices. When deployed with other wireless docks, the wireless dock can be configured to provide management information with a broadcast signal that is usable by the mobile devices to manage the wireless connection to, and experience with, the wireless dock. The management information can include one or more of a do-not-automatically-connect indicator, an in-use indicator, an Internet-available indicator, or a group identifier.Type: GrantFiled: September 10, 2014Date of Patent: March 7, 2017Assignee: Microsoft Technology Licensing, LLCInventors: Andrew Thomas Baron, Chih-Chung Chang, Eliot John Flannery, Gianluigi Nusca, Vineet Venugopal
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Publication number: 20170051536Abstract: A fire escape door lock device includes a lock mechanism attached to a door panel and having a dead bolt for selectively locking the door panel to a door frame, a control device is disposed in the door panel and electrically connected to the lock mechanism, a switch is electrically connected to the control device, and a press bar device is attached to the door panel and coupled to the switch for selectively actuating the switch when the press bar device is depressed toward the door panel, and for selectively releasing the lock mechanism with the control device, and arranged for allowing the emergency fire escape door lock device to be selectively actuated or operated either inside or outside the fire escape door.Type: ApplicationFiled: August 18, 2015Publication date: February 23, 2017Inventor: Chih Chung CHANG
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Publication number: 20170009487Abstract: A door lock device includes a receiver mechanism includes a housing having a chamber for engaging with a casing which has a compartment for engaging with a deadbolt of a lock mechanism, a fastener secures the casing to the housing at a selected position after the casing has been adjusted relative to the housing, a block is engaged in the housing, and a fastener is engaged with the block for securing the block to the housing at a selected position after the block has been adjusted relative to the housing, such that the casing and the block are adjustable relative to the housing to any selected position for fitting and engaging with various kinds of door lock devices.Type: ApplicationFiled: July 7, 2015Publication date: January 12, 2017Inventor: Chih Chung CHANG
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Publication number: 20160350232Abstract: Provided are methods, systems, and apparatus for managing and controlling memory caches, in particular, system level caches outside of those closest to the CPU. The processes and representative hardware structures that implement the processes are designed to allow for detailed control over the behavior of such system level caches. Caching policies are developed based on policy identifiers, where a policy identifier corresponds to a collection of parameters that control the behavior of a set of cache management structures. For a given cache, one policy identifier is stored in each line of the cache.Type: ApplicationFiled: May 26, 2016Publication date: December 1, 2016Applicant: GOOGLE INC.Inventors: Allan D. KNIES, Shinye SHIU, Chih-Chung CHANG, Vyacheslav Vladimirovich MALYUGIN, Santhosh RAO
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Patent number: 9337421Abstract: The present invention relates to a phase-change memory device structure and the materials used. The structure comprises a substrate, a single or multiple sandwich-memory-unit(s), a first electrode, and a second electrode. The sandwich-memory-unit contains an upper barrier layer, a lower barrier layer, and a memory layer therebetween. The thickness of the memory-layer is less than 30 nm. The present invention provides a phase-change memory device with a high Tc and a low volume changing rate during phase-change.Type: GrantFiled: April 30, 2013Date of Patent: May 10, 2016Assignee: FENG CHIA UNIVERSITYInventors: Tsung-Shune Chin, Chih-Chung Chang, Yung-Ching Chu
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Publication number: 20160112942Abstract: In embodiments of access point assisted roaming, a mobile device, such as a mobile phone, tablet computer, or other portable device is implemented for wireless connection with access points, such as Wi-Fi access points. An access point controller can receive a request for a neighbor report from the mobile device, and also obtain a travel direction of the mobile device. The access point controller is implemented to determine access points that are each configured for a wireless connection with a communication system of the mobile device, where a wireless connection with an access point is based in part on a detected signal strength of an access point. The access point controller can then generate the neighbor report that lists one or more of the access points in order of connection likelihood and based on the travel direction of the mobile device.Type: ApplicationFiled: October 21, 2014Publication date: April 21, 2016Inventors: Chih-Chung Chang, Yatharth Gupta
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Publication number: 20160073435Abstract: This document describes management capabilities for a wireless docking experience. A wireless dock is configured to connect to multiple peripheral devices, such as a monitor, a keyboard, and a mouse. Mobile devices can connect to the wireless dock, via a short-range wireless connection, to utilize the multiple peripheral devices. When deployed with other wireless docks, the wireless dock can be configured to provide management information with a broadcast signal that is usable by the mobile devices to manage the wireless connection to, and experience with, the wireless dock. The management information can include one or more of a do-not-automatically-connect indicator, an in-use indicator, an Internet-available indicator, or a group identifier.Type: ApplicationFiled: September 10, 2014Publication date: March 10, 2016Inventors: Andrew Thomas Baron, Chih-Chung Chang, Eliot John Flannery, Gianluigi Nusca, Vineet Venugopal
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Patent number: 9224691Abstract: Semiconductor contact structures extend through a dielectric material and provide contact to multiple different subjacent materials including a silicide material and a non-silicide material such as doped silicon. The contact structures includes a lower composite layer formed using a multi-step ionized metal plasma (IMP) deposition operation. A lower IMP film is formed at a high AC bias power followed by the formation of an upper IMP film at a lower AC bias power. The composite layer may be formed of titanium. A further layer is formed as a liner over the composite layer and the liner layer may advantageously be formed using CVD and may be TiN. A conductive plug material such as tungsten or copper fills the contact openings.Type: GrantFiled: August 8, 2013Date of Patent: December 29, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Chieh Chang, Chih-Chung Chang, Kei-Wei Chen, Ying-Lang Wang
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Publication number: 20150308167Abstract: An exit lock assembly is provided. The exit lock assembly comprises a base, two doorstops, two first links, two second links, two solenoid valves and a cover. The base and the cover are combined to form a receiving space to receive the two doorstops, the two first links, the two second links and the two solenoid valves. The doorstops are closed in an initial position when the solenoid valves are not energized. When the solenoid valves are energized, two plugs of the two solenoid valves move along the direction opposite a central area and drive two fifth ends of the two second links, two fourth ends of the two second links thus get away from the third ends of the first links, and the second end of the doorstop moves down and makes the doorstops in an open status.Type: ApplicationFiled: April 24, 2014Publication date: October 29, 2015Applicant: GIANNI INDUSTRIES INC.Inventor: Chih-Chung CHANG
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Publication number: 20150235954Abstract: A method for forming a multilayer barrier comprises forming a conductive line over a substrate, depositing a dielectric layer over the conductive line, forming a plug opening in the dielectric layer, forming a multilayer barrier through a plurality of deposition processes and corresponding plasma treatment processes.Type: ApplicationFiled: February 14, 2014Publication date: August 20, 2015Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chung Chang, Jung-Chih Tsao, Chun Che, Yu-Ming Huang, Tain-Shang Chang, Jian-Shin Tsai
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Publication number: 20150087144Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate and forming a structure over the semiconductor substrate. The structure includes a sacrificial dielectric on the semiconductor substrate and a dummy gate over the sacrificial dielectric. The method further includes removing the dummy gate and the sacrificial dielectric from the structure thereby forming a trench. The method further includes filling a metal layer into the trench and covering over a top surface of an inter layer dielectric (ILD). The method also includes performing a chemical mechanical polishing (CMP) to expose the top surface of the ILD and heating the top surface of the ILD. Moreover, the method includes forming an etch stop layer on the top surface of the ILD.Type: ApplicationFiled: September 26, 2013Publication date: March 26, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: CHI-JEN LIU, CHIH-CHUNG CHANG, LI-CHIEH WU, SHICH-CHANG SUEN, LIANG-GUANG CHEN
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Patent number: 8833814Abstract: A lock device includes a tongue engaged in a housing, an anchoring device slidably disposed in the housing and movable with a moving device, the includes two sides each having a latch socket and an anchoring member, when one side of the anchoring device is directed toward the tongue, the lock device is locked when the moving device is turned off, and the lock device is locked when the moving device is turned on and when the other side of the anchoring device is directed toward the tongue, such that the electric lock device is adjustable and operatable when the electromagnetic mechanism of the moving device is either switched on or switched off.Type: GrantFiled: July 7, 2011Date of Patent: September 16, 2014Assignee: Gianni Industries Inc.Inventor: Chih Chung Chang
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Patent number: 8826037Abstract: Methods of preventing private information, which is hidden within data of a private domain reserved by an application program, from being easily accessed by a CPU and other devices, both where the data of the private domain is decrypted and the access to said data are restricted are disclosed, where the mentioned other devices do not include a decryption module utilized in the methods. Therefore, as long as agreements related to encryptions and decryptions are made in advance between the application program and the decryption module, private information can be well protected.Type: GrantFiled: March 13, 2008Date of Patent: September 2, 2014Assignee: CyberLink Corp.Inventor: Chih-Chung Chang
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Patent number: 8759928Abstract: A system and method for reducing cross-talk in complementary metal oxide semiconductor back side illuminated image sensors is provided. An embodiment comprises forming a grid around the pixel regions on an opposite side of the substrate than metallization layers. The grid may be formed of a material such as tungsten with a (110)-rich crystalline orientation. This orientation helps prevents defects that can occur during patterning of the grid.Type: GrantFiled: April 4, 2012Date of Patent: June 24, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Chieh Chang, Jian-Shin Tsai, Chih-Chang Huang, Ing-Ju Lee, Chi-Cheng Hung, Jun-Nan Nian, Chih-Chung Chang
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Publication number: 20130320541Abstract: Semiconductor contact structures extend through a dielectric material and provide contact to multiple different subjacent materials including a silicide material and a non-silicide material such as doped silicon. The contact structures includes a lower composite layer formed using a multi-step ionized metal plasma (IMP) deposition operation. A lower IMP film is formed at a high AC bias power followed by the formation of an upper IMP film at a lower AC bias power. The composite layer may be formed of titanium. A further layer is formed as a liner over the composite layer and the liner layer may advantageously be formed using CVD and may be TiN. A conductive plug material such as tungsten or copper fills the contact openings.Type: ApplicationFiled: August 8, 2013Publication date: December 5, 2013Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Chieh CHANG, Chih-Chung CHANG, Kei-Wei CHEN, Ying-Lang WANG
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Publication number: 20130292631Abstract: The invention discloses a phase-change memory device structure and the materials used. The structure includes a substrate; a single or multiple sandwich-memory-unit(s); a first and a second electrode electrically connecting to the first and the second sides of the sandwich-memory-units and a dielectric layer used as the insulator required by the memory device. The sandwich-memory-unit composes of a memory-layer, thinner than 30 nm, sandwiched between an upper and a lower barrier-layers. The barrier-layer is either an electrical conductor in case of vertical memory-cells or an electrical insulator in case of parallel memory-cells. The sandwich-memory-unit is characteristic of increased crystallization temperature of at least 50° C. as the thickness of the memory-layer is reduced from 15 to 5 nm; and the volume change of the memory-layer is less than 3% during phase change. The thickness and memory-material in each sandwich-memory-unit can be different in the multiple sandwich-memory-units.Type: ApplicationFiled: April 30, 2013Publication date: November 7, 2013Applicant: FENG CHIA UNIVERSITYInventors: Tsung-Shune Chin, Chih-Chung Chang, Yung-Ching Chu