Abstract: A semiconductor light-emitting device and a manufacturing method thereof are provided, wherein the semiconductor light-emitting device includes a first type doped semiconductor structure, a light-emitting layer, a second type doped semiconductor layer, a first conductive layer and a dielectric layer. The first type doped semiconductor structure includes a base and a plurality of columns extending outward from the base. Each of the columns includes a top surface and a plurality of sidewall surfaces. The light-emitting layer is disposed on the sidewall surfaces and the top surface, wherein the surface area of the light-emitting layer gradually changes from one side adjacent to the columns to a side away from the columns. The dielectric layer exposes the first conductive layer locating on the top surface of each of the columns, wherein the dielectric layer includes at least one of a plurality of quantum dots, phosphors, and metal nanoparticles.

Abstract: A fabrication method of nanoparticles is provided. A substrate having a plurality of pillar structures is provided and then a plurality of ring structures is formed to surround the plurality of the pillar structures. The inner wall of each ring structure surrounds the sidewall of each pillar structure. A portion of each pillar structure is removed to reduce the height of each pillar structure and to expose the inner wall of each ring structure. The ring structures are separated from the pillar structures to form a plurality of nanoparticles. Surface modifications are applied to the ring structures before the ring structures are separated from the pillar structures on the substrate.

Abstract: A debugging device for performing a debugging process through an electronic device external connector system is provided. The debugging device performs the debugging process to a target system, and the device comprises a first external connector, a switch, and a debugging module. The first external connector is connected to the external port of the target system. The switch is connected to the first external connector, and the switch chooses to activate the debugging process. The debugging module is connected to the switch, and the debugging module receives a universal asynchronous receiver/transmitter (UART) signal provided by the target system.

Abstract: A semiconductor device and fabrication method thereof are provided, wherein the fabrication method of the semiconductor device includes the following steps. Forming a semiconductor layer on a substrate, wherein the semiconductor layer has a top surface and a bottom surface that is opposite to the top surface. The bottom surface is in contact with the substrate, and the top surface has a plurality of pits, the pits are extended from the top surface toward the bottom surface. Preparing a solution, wherein the solution includes a plurality of nanoparticles. Filling the nanoparticles into the pits. Forming a conducting layer on the semiconductor layer after filling the nanoparticles into the pits.

Abstract: The invention is directed to a method for forming a nitride on a silicon substrate. In the method of the present invention, a silicon substrate is provided and a buffer layer is formed on the silicon substrate. The formation of the buffer layer includes a multi-level temperature modulation process having a plurality temperature levels and a plurality of temperature modulations. For each of the temperature modulations, the temperature is gradually decreased. A nitride is formed on the buffer layer.

Abstract: A mirror image suppression method adapted to an optical coherence tomography (OCT) system is provided. The mirror image suppression method includes the following steps: obtaining a tomography image of an object to be tested by using the OCT system; calculating one real image signal obtained from an nth specific-mode scan for a specific pixel of the tomography image based on image signals obtained from an (n?1)th and the nth specific-mode scans; obtaining one real image signal of each of a plurality of pixels in the tomography image based on the calculation in the step of calculating the one real image signal; and reconstructing the tomography image based on the real image signal of each of the pixels obtained in the step of obtaining the one real image signal to suppress mirror image signals of the tomography image.

Abstract: The invention provides a method for forming a light emitting device. A first substrate is provided. A plurality of patterned masks is formed on the first substrate, or on a semiconductor epitaxial layer grown on the first substrate, or the first substrate is etched to form a plurality of trenches, followed by performing an epitaxial lateral overgrowth process to grow an epitaxy layer over the first substrate. A light emitting structure is formed on the epitaxy layer. A first electrode layer is formed on the light emitting structure. The light emitting structure is wafer bonded to a second substrate. A photoelectrochemical etching process is performed to lift off the first substrate from the epitaxy layer.

Abstract: The invention provides a method for forming a light emitting device. A first substrate is provided. A plurality of patterned masks is formed on the first substrate, or on a semiconductor epitaxial layer grown on the first substrate, or the first substrate is etched to form a plurality of trenches, followed by performing an epitaxial lateral overgrowth process to grow an epitaxy layer over the first substrate. A light emitting structure is formed on the epitaxy layer. A first electrode layer is formed on the light emitting structure. The light emitting structure is wafer bonded to a second substrate. A photoelectrochemical etching process is performed to lift off the first substrate from the epitaxy layer.

Abstract: A lamp position adjustment device includes a bottom frame, a lamp holder, and a lamp mount. The lamp holder is disposed on the bottom frame for supporting the lamp, and the lamp mount is disposed between the lamp holder and the bottom frame. The lamp mount includes a base portion, a first side portion and a second side portion that are respectively connected to two opposite sides of the base portion, a first positioning mechanism, and a second positioning mechanism. The first positioning mechanism is disposed on the base portion to enable the lamp mount to be slidably connected to the bottom frame, and the second positioning mechanism is disposed on the first side portion and the second side portion to enable the lamp mount to be slidably connected to the lamp holder.

Abstract: A method for forming a periodic structure is disclosed. A structural layer and an optical modulation element are provided. A light is emitted to pass through the optical modulation element to irradiate interference strips on the structural layer. A photoelectrochemical etching (PEC) is performed to form the periodic structure according the interference strips irradiated on the structural layer.

Abstract: The present invention relates to a chip resistor and method for making the same. The chip resistor includes a substrate, a pair of bottom electrodes, a resistive film, a pair of main upper electrodes, a first protective coat, a pair of barrier layers, a second protective coat, a pair of side electrodes and at least one plated layer. The first protective coat is disposed over the resistive film, and covers part of the main upper electrodes. The barrier layers are disposed on the main upper electrodes, and cover part of the first protective coat. The second protective coat is disposed on the first protective coat, and covers part of the barrier layers. The plated layers cover the barrier layers, the bottom electrodes and the side electrodes. As a result, the chip resistor features high corrosion resistance.

Abstract: The present invention relates to a chip resistor having low resistance and a method for manufacturing the same. The chip resistor includes a substrate, a resistive layer, a pair of conducting layers and at least one protective layer. The substrate has a first surface. The resistive layer is disposed on the first surface of the substrate. The conducting layers are disposed adjacent to the first surface of the substrate. The at least one protective layer is disposed on the resistive layer or the conducting layers. As a result, the resistive layer has a precise pattern, and the duration of sputtering is reduced, thereby improving yield rate and efficiency while reducing manufacturing cost.

Abstract: A method for analyzing mucosa structure with optical coherence tomography (OCT) is provided, and includes: (a) scanning a mucosa sample with optical coherence tomography; (b) choosing a lateral range from a two- or three-dimensional OCT image and analyzing all the A-scan intensity profiles in the lateral range; (c) calculating three indicators in each A-scan intensity profile, including the standard deviation for a certain depth range below the sample surface, the exponential decay constant of the spatial-frequency spectrum and the epithelium thickness under the condition that the basement membrane is identifiable; and (d) using the three indicators of each A-scan intensity profile within the lateral range to analyze the mucosa structure.

Abstract: A light emitting diode device is provided, which comprises a substrate comprising a first growth surface and a bottom surface opposite to the first growth surface; a dielectric layer with a plurality of openings therein formed on the first growth surface; a plurality of semiconductor nano-scaled structures formed on the substrate protruding through the openings; a layer formed on the plurality of semiconductor nano-scaled structures with a second growth surface substantially parallel with the bottom surface; a light emitting diode structure formed on the second growth surface; wherein the diameters of the openings are smaller than 250 nm, and wherein the diameters of the plurality semiconductor nano-scaled structures are larger than the diameters of the corresponding openings.

Abstract: The present invention relates to a method for manufacturing a chip resistor having a low resistance. The method includes the following steps: (a) providing a substrate having a top surface; (b) sputtering a conducting layer directly on the top surface of the substrate, so that the conducting layer and the substrate contact each other, wherein the material of the conducting layer comprises nickel or copper; and (c) plating at least one metal layer directly on the conducting layer, so that the metal layer and the conducting layer contact each other, wherein the material of the metal layer comprises nickel or copper, and the conducting layer and the metal layer provide a resistive layer. As a result, the resistive layer has a precise pattern, and the duration of sputtering is reduced, so the yield rate and the efficiency are improved and the manufacturing cost is cut down.

Abstract: A method for controlling the color contrast of a multi-wavelength light-emitting diode (LED) made according to the present invention is disclosed. The present invention includes at least the step of increasing the junction temperature of a multi-quantum-well LED, such that holes are distributed in a deeper quantum-well layer of the LED to increase luminous intensity of the deeper quantum-well layer, thereby controlling the relative intensity ratios of the multiple wavelengths emitted by the LED. The step of increasing junction temperature of the multi-quantum-well LED is achieved either by controlling resistance through modulating thickness of a p-type electrode layer of the LED or by modifying the mesa area size to control its relative heat radiation surface area.

Abstract: A method for forming a localized surface plasmon resonance (LSPR) sensor is disclosed, including providing a substrate, forming a metal thin film on the substrate and irradiating the metal thin film with a laser to form a plurality of metal nanoparticles, wherein the metal nanoparticles have a fixed orientation.

Abstract: A light-emitting device is disclosed, including a light-emitting element and a surface plasmon coupling element, having an intermediary layer connected to the light-emitting element and a metal structure on the intermediary layer, wherein the intermediary layer is conductive under low-frequency injection current and has the characteristics as dielectric material in a wavelength range 100 nm˜20000 nm.

Abstract: The present invention relates to a chip resistor and method for making the same. The chip resistor includes a substrate, a pair of bottom electrodes, a resistive film, a pair of main upper electrodes, a first protective coat, a pair of barrier layers, a second protective coat, a pair of side electrodes and at least one plated layer. The first protective coat is disposed over the resistive film, and covers part of the main upper electrodes. The barrier layers are disposed on the main upper electrodes, and cover part of the first protective coat. The second protective coat is disposed on the first protective coat, and covers part of the barrier layers. The plated layers cover the barrier layers, the bottom electrodes and the side electrodes. As a result, the chip resistor features high corrosion resistance.

Abstract: A method for analyzing mucosa structure with optical coherence tomography (OCT) is provided, and includes: (a) scanning a mucosa sample with optical coherence tomography; (b) choosing a lateral range from a two- or three-dimensional OCT image and analyzing all the A-scan intensity profiles in the lateral range; (c) calculating three indicators in each A-scan intensity profile, including the standard deviation for a certain depth range below the sample surface, the exponential decay constant of the spatial-frequency spectrum and the epithelium thickness under the condition that the basement membrane is identifiable; and (d) using the three indicators of each A-scan intensity profile within the lateral range to analyze the mucosa structure.