Abstract: A method for filling recessed features with a low-resistivity metal. The method includes providing a patterned substrate containing a recessed feature formed in a first layer and a second layer that is exposed in the recessed feature, forming a nucleation enhancement layer on a sidewall of the first layer in the recessed feature and depositing a metal layer in the recessed feature by vapor phase deposition, where the metal layer is deposited on the second layer and on the nucleation enhancement layer. An initial metal layer may be selectively formed on the second layer in the recessed feature before forming the nucleation enhancement layer.

Abstract: In some examples, a display device includes a panel, a scaler circuit, and a backlight control circuit. In some examples, the scaler circuit receives a panel identification from the panel and determines a backlight module driving configuration based on the panel identification. In some examples, the backlight control circuit receives the backlight module driving configuration from the scaler circuit and controls a backlight for the panel based on the backlight module driving configuration.

Abstract: Various schemes pertaining to coordinated time-division multiple-access (C-TDMA) protocols, transmission opportunity (TXOP) sharing modes for time allocation, and exchange of parameters in multi-access point (multi-AP) systems are described. An apparatus (e.g., a sharing access point (AP)) acquires a TXOP. The apparatus also triggers one or more shared APs to participate in C-TDMA communications with respectively associated stations (STAs) within the TXOP.

Abstract: A biodegradable marker pen including a barrel, a cap, and an ink reservoir. The barrel has a hollow cylindrical structure, the ink reservoir is placed in the barrel, and the cap is detachably coupled with the barrel hermetically. The barrel, the cap, and the ink reservoir comprise 2 to 10 mass percentage of a biodegradable masterbatch respectively.

Abstract: The present invention disclose a medical image-based system for predicting lesion classification and a method thereof. The system comprises a feature data extracting module for providing a raw feature data based on a medical image, and a predicting module for outputting a predicted class and a risk index according to the raw feature data. The predicting module comprises a classification unit for generating the predicted class and a prediction score corresponding thereto according to the raw feature data, and a risk evaluation unit for generating the risk index according to the prediction score. The system provides medical personnels a reference score and a risk index to determine progression of a certain disease.

Abstract: A method of microfabrication includes forming a sacrificial layer over a film. A resist layer is formed over the sacrificial layer. The resist layer includes an extreme ultraviolet (EUV) resist. A pattern is formed in the resist layer by an EUV exposure and a wet etch followed by rinsing and drying, resulting in uncovered portions of the sacrificial layer. The uncovered portions of the sacrificial layer are treated. The pattern is transferred from the resist layer to the film by performing an etch process.

Abstract: A signal processing method includes the following operations: receiving an input signal and analyzing the input signal to generate a plurality of bit codes by a signal receiving circuit; temporarily storing a first part of the plurality of bit codes according to a time sequence by a shift register and starting a decoder when the shift register is full; and performing a boundary calibration according to the first part of the plurality of bit codes by the decoder when the first part of the plurality of bit codes meets a decoding table rule and a boundary detection rule.

Abstract: The present disclosure relates to methods and structures of increasing stability of soft or organic features. The methods disclosed herein may include lining soft/organic features with a lining material, depositing a lining material on the soft/organic features, or otherwise fabricating a lining structure. This provides mechanical support for the soft/organic features, thereby increasing stability of the soft/organic features. The methods, structures, and techniques described herein provide mechanical support for a soft/organic feature, thereby enabling better pattern transfer through semiconductor device fabrication processes, especially at reduced pitch and increased aspect ratio. A method for fabricating semiconductor devices may include spin-coating a patternable material on a substrate, patterning the patternable material to form a pattern including one or more protruding structures, and lining sidewalls of each of the one or more protruding structures with a silicon-containing material.

Abstract: A method for fabricating semiconductor devices is disclosed. The method includes forming a first fin structure and a second fin structure in a first region and a second region of a substrate, respectively, wherein the first and second fin structure and the substrate comprise a first semiconductor material; forming a first liner structure and a second liner structure at least extending along sidewalls of the first fin structure and sidewalls of the second fin structure, respectively; replacing an upper portion of the second fin structure with a second semiconductor material, while leaving the first fin structure substantially intact; and exposing a top surface and upper sidewalls of the first fin structure, and a top surface and upper sidewalls of the second fin structure.

Abstract: Embodiments of improved process flows and methods are provided in the present disclosure to control fin height and channel area in a fin field effect transistor (FinFET) having gaps of variable CD. More specifically, the present disclosure provides improved transistor fabrication processes and methods that utilize a wet etch process, instead of a dry etch process, to remove the oxide material deposited within the gaps formed between the fins of a FinFET. By utilizing a wet etch process, the improved transistor fabrication processes and methods described herein provide a means to adjust or individually control the fin height of one or more the fins, thereby providing greater control over the channel area of the FinFET.

Abstract: The present disclosure combines chemical mechanical polishing (CMP), wet etch and deposition processes to provide improved processes and methods for planarizing an uneven surface of a material layer deposited over a plurality of structures formed on a substrate. A CMP process is initially used to smooth the uneven surface and provide complete local planarization of the material layer above the plurality of structures. After achieving complete local planarization, a wet etch process is used to etch the material layer until a uniform recess is formed between the plurality of structures and the material layer is provided with a uniform thickness across the substrate. In some embodiments, an additional material layer may be deposited and a second CMP process may be used to planarize the additional material layer to provide the substrate with a globally planarized surface.

Abstract: Aspects of the present disclosure provide a method for fabricating a forksheet semiconductor structure. For example, the method can include forming on a substrate a multi-layer stack including first and second semiconductor layers stacked over one another alternately, forming a cap layer over the multi-layer stack, forming a mandrel structure from the multi-layer stack and the cap layer, forming a fill material that surrounds the mandrel structure and has a top surface level with a top of the mandrel structure, partially recessing the cap layer to uncover opposite inner sidewalls of the fill material, forming sidewall spacers on the opposite inner sidewalls, directionally etching the multi-layer stack to define an insulation wall trench using the sidewall spacers as an etch mask, and forming an insulation material within the insulation wall trench to form an insulation wall that separates the multi-layer stack into insulated first and second multi-layer stacks.

Abstract: A method for processing a substrate includes: forming a mandrel over the substrate including an underlying layer, the mandrel having a top surface and sidewalls, the substrate including an exposed surface including a portion of the underlying layer; conformally depositing a spacer material over the substrate, the spacer material covering the top surface and the sidewalls of the mandrel and the portion of the underlying layer; in a plasma processing chamber, exposing the substrate to a plasma generated in the plasma processing chamber from a first halogen-containing process gas, a second halogen-containing process gas, and a carbon-containing passivating agent, the exposing anisotropically etching the spacer material; and removing the mandrel to form free-standing spacers from sidewall portions of the spacer material covering the sidewalls of the mandrel.

Abstract: A biodegradable marker pen including a barrel, a cap, and an ink reservoir. The barrel has a hollow cylindrical structure, the ink reservoir is placed in the barrel, and the cap is detachably coupled with the barrel hermetically. The barrel, the cap, and the ink reservoir comprise 2 to 10 mass percentage of a biodegradable masterbatch respectively.

Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed by the first package body.

Abstract: Methods are provided herein for forming spacers on a patterned substrate. A self-aligned multiple patterning (SAMP) process is utilized for patterning structures, spacers formed adjacent mandrels, on a substrate. In one embodiment, a novel approach of etching titanium oxide (TiO2) spacers is provided. Highly anisotropic etching of the spacer along with a selective top deposition is provided. In one embodiment, an inductively coupled plasma (ICP) etch tool is utilized. The etching process may be achieved as a one-step etching process. More particularly, a protective layer may be selectively formed on the top of the spacer to protect the mandrel as well as minimize the difference of the etching rates of the spacer top and the spacer bottom. In one embodiment, the techniques may be utilized to etch TiO2 spacers formed along amorphous silicon mandrels using an ICP etch tool utilizing a one-step etch process.

Abstract: A method of forming a semiconductor structure includes forming a first mandrel layer over a target layer, forming a second mandrel layer over the first mandrel layer, and patterning a mandrel by etching the second mandrel layer and the first mandrel layer. The first mandrel layer has a first etch rate and the second mandrel layer has a second etch rate less than the first etch rate.

Abstract: A multidrop network system includes N network devices. The N network devices include a master device and multiple slave devices, and each network device has an identification code as its own identification in the multidrop network system. The N network devices have N identification codes and obtain transmission opportunities in turn according to the N identification codes in each round of data transmission. Each network device performs a count operation to generate a current count value, and when the identification code of a network device is the same as the current count value, this network device obtains a transmission opportunity. After a device obtains the transmission opportunity, it determines whether a cut-in signal from another network device is observed in a front duration of a predetermined time slot, and then determines whether to abandon/defer the right to start transmitting in the remaining duration of the predetermined time slot.

Abstract: An embodiment etching tool includes an etch chamber for plasma etching a first wafer to be processed; a transfer chamber coupled to the etch chamber; a first run path between the transfer chamber and the etch chamber, the first run path including a path for moving the first wafer to be processed from the transfer chamber to the etch chamber, where the etching tool is configured to dry develop the first wafer to be processed before etching a hard mask on the first wafer in the etch chamber.

Abstract: Embodiments of improved process flows and methods are provided in the present disclosure to form air gaps between metal interconnects. More specifically, the present disclosure provides improved process flows and methods that utilize a wet etch process to form recesses between metal interconnects formed on a patterned substrate. Unlike conventional air gap integration methods, the improved process flows and methods described herein utilize the critical dimension (CD) dependent etching provided by wet etch processes to etch an intermetal dielectric material formed between the metal interconnects at a faster rate than the intermetal dielectric material is etched in surrounding areas of the patterned substrate. This enables the improved process flows and methods described herein to form recesses (and subsequently form air gaps) between the metal interconnects without using a dry etch process.