Abstract: An inductive light-source module including a casing, a substrate, light sources, a circuit board, an infrared sensing device, a bi-incident lens and a control unit is provided. The substrate disposed in the casing includes a carrying surface facing a transparent portion of the casing. The light sources connected to the substrate are disposed on the carrying surface. The infrared sensing device is connected to the circuit board. The bi-incident lens disposed on the transparent portion is located on a light path of each light for scattering visible lights to pass through the transparent portion and transmit to the outside, and converging the infrared from the outside to the infrared sensing device. The control unit is coupled to the light sources and the infrared sensing device to drive the light sources to emit the visible lights according to a sensing signal generated by the infrared sensing device when sensing the infrared.

Abstract: A power control device for dynamically adjusting frequency includes an electric transformer, a controller, a loading feedback unit, and a switching transistor. The electric transformer includes a first side induction coil connected to an input power unit, a second side induction coil connected to a loading unit to generate an output power by electromagnetic induction with the first side induction coil, and an auxiliary induction coil generating a power sensing signal by electromagnetic induction with the first side induction coil. The loading feedback unit generates a loading feedback signal. The controller determines the level of loading based on the loading feedback signal and further detects the valleys of the power sensing signal so as to change the switching signal which controls the switching transistor at the optimal one of the valleys.

Abstract: A method for processing an input composite signal includes tracking a signal component of the input composite signal according to a frequency of a pilot signal to generate a locked signal, detecting an amplitude of the signal component to generate a detecting result, and generating a reproduced pilot signal according to the detecting result and the locked signal. A frequency and a phase of the locked signal are substantially identical to the frequency and a phase of the pilot signal.

Abstract: A digital pulse width modulation controller includes a pulse width modulation controller, a selection unit having at least one selector, a comparison unit having at least one comparator, and a signal conversion unit having at least one digital-to-analog converter. The digital-to-analog converter generates a reference current and/or voltage. The comparator receives the reference current and/or voltage, and performs a comparison operation to generate a comparison signal based on a feedback signal. The selector selects one selection signal to input into the pulse width modulation controller, which receives other parameters set by a user or the system at the same time so as to control characteristics of the digital pulse width modulation signals, thereby improving the electric properties of a loading circuit.

Abstract: A dual-mode switching power control device includes an electric transformer, a PWM driving controller, a switching transistor, an isolation element, an output diode and an output capacitor. The PWM driving controller is connected to the switching transistor coupled to the electric transformer. The first side inductor of the electric transformer and the switching transistor are coupled to an input power, and the second side inductor of the electric transformer is coupled to the output diode. The output capacitor and a load are connected in series. The output power is converted into a feedback signal by the isolation element. The PWM driving controller determines to perform DCM or CCM based on the feedback signal to control the current flowing through the electric transformer, and the output power is generated. Therefore, the efficiency of power conversion is improved and is suitable for high power applications.

Abstract: A light emitting diode device including a base, at least one light emitting diode, a bulb, and a patterned reflective layer is provided. The light emitting diode and the bulb are both disposed on the base. The bulb has a side-wall and a reflective surface, wherein the side-wall surrounds the light emitting diode and the reflective surface connected with the side-wall is located above and facing the light emitting diode. The patterned reflective layer is disposed on the reflective surface. The light emitting diode device has side-emitting effects that a user desired by the co-disposition of the patterned reflective layer and the reflective surface.

Abstract: A power conversion system with adjustable frequency includes an electric transformer, a pulse width modulation driving controller, a switching transistor, a first and second voltage division resistors connected in series, an output diode and an output capacitor. The electric transformer receives the input power and generates the sensing current and induced current. The sensing current flows through the first and second voltage division resistors to generate the feedback signal. The induced current flows through the output diode and output capacitor to generate the output voltage to supply the load. The pulse width modulation driving controller determine whether the loading state of the load based on the feedback signal, and change the switching frequency according to the loading state and the input power, thereby increasing the whole efficiency of the power conversion system and achieving the aim of dynamically adjusting the optimal frequency.

Abstract: A digital pulse width modulation controller includes a pulse width modulation controller, a selection unit having at least one selector, a comparison unit having at least one comparator, and a signal conversion unit having at least one digital-to-analog converter. The digital-to-analog converter generates a reference current and/or voltage. The comparator receives the reference current and/or voltage, and performs a comparison operation to generate a comparison signal based on a feedback signal. The selector selects one selection signal to input into the pulse width modulation controller, which receives other parameters set by a user or the system at the same time so as to control characteristics of the digital pulse width modulation signals, thereby improving the electric properties of a loading circuit.

Abstract: A dual-mode switching power control device includes an electric transformer, a PWM driving controller, a switching transistor, an isolation element, an output diode and an output capacitor. The PWM driving controller is connected to the switching transistor coupled to the electric transformer. The first side inductor of the electric transformer and the switching transistor are coupled to an input power, and the second side inductor of the electric transformer is coupled to the output diode. The output capacitor and a load are connected in series. The output power is converted into a feedback signal by the isolation element. The PWM driving controller determines to perform DCM or CCM based on the feedback signal to control the current flowing through the electric transformer, and the output power is generated. Therefore, the efficiency of power conversion is improved and is suitable for high power applications.

Abstract: A system and method of correcting baseline wander (BLW) are disclosed. An analog-to-digital converter (ADC) converts an analog input to a digital output, and a slicer maps the digital output to one of a plurality of predefined values. A BLW correction unit generates a BLW correction value according to a difference between an input and an output of the slicer. A correction controller generates a fine correction value and a coarse correction value according to the BLW correction value. Specifically, the fine correction value is used to correct the digital output of the ADC, and the coarse correction value is used to correct the analog input of the ADC.

Abstract: A system and method of correcting baseline wander (BLW) are disclosed. An analog-to-digital converter (ADC) converts an analog input to a digital output, and a slicer maps the digital output to one of a plurality of predefined values. A BLW correction unit generates a BLW correction value according to a difference between an input and an output of the slicer. A correction controller generates a fine correction value and a coarse correction value according to the BLW correction value. Specifically, the fine correction value is used to correct the digital output of the ADC, and the coarse correction value is used to correct the analog input of the ADC.

Abstract: An optical disc includes a round opening at the center of the optical disc, an annular recording section configured to record information, an annular supporting section between the round opening and the annular recording section and configured to support the optical disc, and a spoiler provided on a non-read/write side of the annular recording section and configured to disturb the flow field inside the optical disc drive when the optical disc is rotating, the spoiler having a centerline average roughness between 2 ?m and 10 ?m, a thickness between 0.02 mm and 0.05 mm, an area occupying at least 5% of the non-read/write side. The flow field so disturbed changes from a laminar state to a turbulent state and thus the read/write characteristics of the disc is improved due to lower air resistance experienced by the rotating disc.

Abstract: A Radio Data System (RDS) decoder circuit determines a subcarrier frequency utilizing only a 57 kHz RDS signal of an FM broadcast signal. The RDS decoder includes a zero-intermediate frequency (zero-IF) FM demodulator, a first mixer, a low-pass filter (LPF) unit, a shaping filter unit, a carrier recovery circuit, a digitally controlled oscillator (DCO), a symbol timing recovery circuit, an integrate and dump circuit, a slicer 280, and a differential decoder. The carrier recovery circuit includes a phase error detector and a digital loop filter (DLF). The symbol timing recovery circuit includes a zero-crossing detector, a phase detector and loop filter unit, and a counter.

Abstract: An optical disc includes a round opening at the center of the optical disc, an annular recording section configured to record information, an annular supporting section between the round opening and the annular recording section and configured to support the optical disc, and a spoiler provided on a non-read/write side of the annular recording section and configured to disturb the flow field inside the optical disc drive when the optical disc is rotating, the spoiler having a centerline average roughness between 2 ?m and 10 ?m, a thickness between 0.02 mm and 0.05 mm, an area occupying at least 5% of the non-read/write side. The flow field so disturbed changes from a laminar state to a turbulent state and thus the read/write characteristics of the disc is improved due to lower air resistance experienced by the rotating disc.

Abstract: A transmission convergence sublayer circuit is coupled between a buffer and a deframer. The deframer submits a data stream enable signal and data bytes to the circuit. The data stream enable signal enables the circuit so that multiple groups of byte data belonging to a data cell are received and temporarily stored inside a byte-wise data pipeline. A header cyclic redundancy checker also receives the byte data and then conducts a header search. An idle cell identifier is used to determine if the data cell is a non-idle cell. When the header is found and determined to be a non-idle cell, a descrambler retrieves payload data of data cell from the byte-wise data pipeline and conducts a descrambling operation after obtaining a quantity of data equal to a double word. Ultimately, the double word data is output to the buffer with minimum delay.

Abstract: A method for processing an input composite signal includes tracking a signal component of the input composite signal according to a frequency of a pilot signal to generate a locked signal, detecting an amplitude of the signal component to generate a detecting result, and generating a reproduced pilot signal according to the detecting result and the locked signal. A frequency and a phase of the locked signal are substantially identical to the frequency and a phase of the pilot signal.

Abstract: A Radio Data System (RDS) decoder circuit determines a subcarrier frequency utilizing only a 57 kHz RDS signal of an FM broadcast signal. The RDS decoder includes a zero-intermediate frequency (zero-IF) FM demodulator, a first mixer, a low-pass filter (LPF) unit, a shaping filter unit, a carrier recovery circuit, a digitally controlled oscillator (DCO), a symbol timing recovery circuit, an integrate and dump circuit, a slicer 280, and a differential decoder. The carrier recovery circuit includes a phase error detector and a digital loop filter (DLF). The symbol timing recovery circuit includes a zero-crossing detector, a phase detector and loop filter unit, and a counter.

Abstract: A communication device is provided with a ball turned by hand to reflect a laser beam within a housing. The laser beam proceeding within the housing is in response to motion of the ball and received by a light sensor. The communication device is capable of operation without providing a panel for the ball.

Abstract: A single-sided double layer disc comprises a first access layer, a second access layer, a bonding layer, and a protective layer. The first and second access layers are used for allowing a driving device to access the disc. The second access layer includes a second substrate having a second coating surface, a reflective layer laminated on the second coating surface, and a second recording layer laminated on the reflective layer. The protective layer, made of metal or semiconductor material, is formed on the second recording layer. The bonding layer is formed between the first access layer and the protective layer for bonding the first access layer and the second access layer such that the second recording layer faces the first access layer.

Abstract: A transmission convergence sublayer circuit is coupled between a buffer and a deframer. The deframer submits a data stream enable signal and data bytes to the circuit. The data stream enable signal enables the circuit so that multiple groups of byte data belonging to a data cell are received and temporarily stored inside a byte-wise data pipeline. A header cyclic redundancy checker also receives the byte data and then conducts a header search. An idle cell identifier is used to determine if the data cell is a non-idle cell. When the header is found and determined to be a non-idle cell, a descrambler retrieves payload data of data cell from the byte-wise data pipeline and conducts a descrambling operation after obtaining a quantity of data equal to a double word. Ultimately, the double word data is output to the buffer with minimum delay.