Patents by Inventor Chih-Hsiang Chang

Chih-Hsiang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10784872
    Abstract: Systems, methods, and devices for fractional realignment are disclosed herein. A feedback divider generates a feedback dividing clock signal based on a controlling oscillator frequency. A delta-sigma modulator is coupled to the feedback divider and generates a dividing ratio to the feedback divider. An accumulating phase adjustor is coupled to the delta-sigma modulator and (i) determines a difference between a frequency tuning word (FCW) and the dividing ratio and (ii) generates a coarse tuning word and a fine tuning word. A digital-to-time converter (DTC) is coupled to the accumulating phase adjustor and generates a first clock frequency based on a reference clock frequency, the coarse tuning word and the fine tuning word. A realignment pulse generator is coupled to the DTC and generates a realignment clock based on the first clock frequency having a period that is the same as a period of the controlling oscillator frequency.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: September 22, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Tsung-Hsien Tsai, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Patent number: 10777423
    Abstract: A planarization method and a CMP method are provided. The planarization method includes providing a substrate with a first region and a second region having different degrees of hydrophobicity or hydrophilicity and performing a surface treatment to the first region to render the degrees of hydrophobicity or hydrophilicity in proximity to that of the second region. The CMP method includes providing a substrate with a first region and a second region; providing a polishing slurry on the substrate, wherein the polishing slurry and the surface of the first region have a first contact angle, and the polishing slurry and the surface of the first region have a second contact angle; modifying the surface of the first region to make a contact angle difference between the first contact angle and the second contact angle equal to or less than 30 degrees.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: September 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tung-Kai Chen, Ching-Hsiang Tsai, Kao-Feng Liao, Chih-Chieh Chang, Chun-Hao Kung, Fang-I Chih, Hsin-Ying Ho, Chia-Jung Hsu, Hui-Chi Huang, Kei-Wei Chen
  • Publication number: 20200279743
    Abstract: A method for semiconductor manufacturing includes providing a substrate, forming a patterning layer over the substrate, and patterning the patterning layer to form a hole in the patterning layer. The method also includes applying a first directional etching to two inner sidewalls of the hole to expand the hole along a first direction and applying a second directional etching to another two inner sidewalls of the hole to expand the hole along a second direction that is different from the first direction.
    Type: Application
    Filed: May 19, 2020
    Publication date: September 3, 2020
    Inventors: Yu-Tien Shen, Chi-Cheng Hung, Chin-Hsiang Lin, Chien-Wei Wang, Ching-Yu Chang, Chih-Yuan Ting, Kuei-Shun Chen, Ru-Gun Liu, Wei-Liang Lin, Ya Hui Chang, Yuan-Hsiang Lung, Yen-Ming Chen, Yung-Sung Yen
  • Publication number: 20200261033
    Abstract: A positioning system for positioning a body part of a patient for radiotherapy includes a positioning device and a radiation treatment system. The positioning device includes a photosensor disposed on an outer surface of the body part and configured to generate a sensing signal upon sensing a positioning beam. The processing unit is operable in a recording mode and a comparison mode. In the recording mode, the processing unit receives the sensing signal of the photosensor and generates reference positioning information according to the sensing signal. In the comparison mode, the processing unit receives the sensing signal of the photosensor and generates comparison positioning information according to the sensing signal. The processor compares the reference positioning information to the comparison positioning information and outputs a positioning result according to a result of comparison.
    Type: Application
    Filed: November 6, 2019
    Publication date: August 20, 2020
    Inventors: LIANG-HSIANG WU, NGOT-SWAN CHONG, CHIH-CHING CHANG, YI-CHING LIU, MING-HSUN HSU
  • Publication number: 20200264655
    Abstract: A transparent display device having an optical transmissive region and a circuit layout region is provided. A light transmittance of the optical transmissive region is greater than that of the circuit layout region. The transparent display device includes a plurality of display elements and a driving circuit. The display elements are disposed in the optical transmissive region or the circuit layout region. The driving circuit is disposed in the circuit layout region and is electrically connected with the display elements. The transparent display device satisfies: 0.1<light spot spreading degree <1.1+0.78×exp (0.0072×resolution), and 10%<aperture ratio <90%.
    Type: Application
    Filed: October 28, 2019
    Publication date: August 20, 2020
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Tang Tsai, Shin-Hong Kuo, Yu-Hsiang Tsai, Chih-Chia Chang, Hung-Chuan Liu
  • Patent number: 10749537
    Abstract: Hybrid phase lock loop (PLL) devices are provided that combine advantages of the digital controlled loop and the analog controlled loop. For example, a hybrid PLL includes a digital controlled loop that receives a reference input signal and an output signal of the hybrid PLL, and generates a digital tuning word. The hybrid PLL further includes an analog controlled loop that receives the reference input signal and the output signal of the hybrid PLL, and generates an output voltage. The hybrid PLL also includes a hybrid oscillator. An oscillator controller of the digital controlled loop controls the hybrid oscillator using the digital tuning word and disables the analog controlled loop during a frequency tracking operational mode of the hybrid PLL. The oscillator controller enables the analog controlled loop to control the hybrid oscillator during the phase tracking operational mode of the hybrid PLL.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: August 18, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Hsien Tsai, Chih-Hsien Chang, Ruey-Bin Sheen, Cheng-Hsiang Hsieh
  • Patent number: 10741654
    Abstract: A semiconductor device includes a semiconductor substrate, at least one gate stack, a gate spacer and a dielectric cap. The gate stack is located on the semiconductor substrate. The gate spacer is located on a sidewall of the gate stack. The gate spacer includes a first dielectric layer and a second dielectric layer with different etch properties. The dielectric cap at least caps the gate spacer. The dielectric cap and the second dielectric layer define a gap therebetween.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: August 11, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Ting Li, Jen-Hsiang Lu, Chih-Hao Chang
  • Publication number: 20200252008
    Abstract: A flexure stage with modularized flexure units for convenient manufacturing, assembly and repair is provided. The flexure stage comprises a base, a platform separated from the base, and a plurality of flexure units disposed between the base and the platform. Each flexure unit comprises a first section, a second section, and a third section. The first section is located on the base. The second section is connected with the platform and separated from the first section. The third section is coupled with the first section and the second section through the first bending part and the second bending part 35 respectively wherein the first bending part and the second bending part comprises flexibility in different axial directions.
    Type: Application
    Filed: February 5, 2019
    Publication date: August 6, 2020
    Inventors: Chun-Hsiang LI, Chih-Kai FAN, Yu-Jung CHANG
  • Publication number: 20200245957
    Abstract: A radiation measurement panel is disclosed. The radiation measurement panel comprising a substrate, a first conductive layer, a sacrificial layer, and a second conductive layer. The first conductive layer formed over the substrate. The sacrificial layer formed over the first conductive layer, wherein the dielectric constant of the sacrificial layer changes in accordance with a magnitude of received radiation. The second conductive layer formed over the sacrificial layer, wherein the magnitude of the received radiation corresponds to a capacitance between the first conductive layer and the second conductive layer.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Inventors: LIANG-HSIANG WU, NGOT-SWAN CHONG, CHIH-CHING CHANG, YI-CHING LIU, MING-HSUN HSU
  • Publication number: 20200246924
    Abstract: A flexure stage with modularized flexure units for convenient manufacturing, assembly and repair is provided. The flexure stage comprises a base, a first carrier, a plurality of first flexure units, a gantry unit, a second carrier, and a plurality of second flexure units. The first carrier is separated from the base and reciprocated along a first axis. The first flexure units are disposed between the base and the first carrier wherein each of the first flexure units comprises flexibility in the first axis. The gantry unit is located on the base and separated from the first carrier. The second carrier is set on the gantry unit and reciprocated along a second axis. The second flexure units are disposed between the first carrier and the second carrier wherein each of the second flexure units comprises flexibility in the second axis.
    Type: Application
    Filed: February 5, 2019
    Publication date: August 6, 2020
    Inventors: Chun-Hsiang LI, Chih-Kai FAN, Yu-Jung CHANG
  • Patent number: 10727117
    Abstract: A method for manufacturing a semiconductor structure includes following operations. A sacrificial layer is formed over the conductive layer, wherein the sacrificial layer includes a first sacrificial portion over the first conductive portion, and a second sacrificial portion over the second conductive portion, and a first thickness of the first sacrificial portion is larger than a second thickness of the second sacrificial portion. The first sacrificial portion and the second sacrificial portion of the sacrificial layer, and the second conductive portion of the conductive layer are removed, with at least a portion of the first conductive portion remaining over the bottom of the trench.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: July 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Hsiang Liao, Ya-Huei Li, Li-Wei Chu, Chun-Wen Nieh, Hung-Yi Huang, Chih-Wei Chang, Ching-Hwanq Su
  • Patent number: 10723841
    Abstract: A method for preparing a compound and a method for preparing a polymer employing the same are provided. The method for preparing a compound includes reacting a compound having a structure represented by Formula (I) with a compound having a structure represented by Formula (III) in the presence of a compound having a structure represented by Formula (II) to obtain a compound having a structure represented by Formula (IV) wherein Ar1 is substituted or unsubstituted aryl group; X is —O—, —S—, or —NH—; R1 is independently hydrogen or C1-6 alkyl group; R2 is hydroxyl group, C1-6 alkyl group, phenyl group, or tolyl group; and R3 is independently C1-6 alkyl group, C5-8 cycloalkyl group, or C2-6 alkoxyalkyl group.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: July 28, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH
    Inventors: Po-Hsien Ho, Chih-Hsiang Lin, Feng-Jen Tsai, Cheng-Hsing Fan, Yih-Her Chang, Hsin-Ching Kao, Chien-Ming Chen
  • Patent number: 10717865
    Abstract: A polyester elastomer is provided, which includes a product of reacting (a) amide oligomer, (b) polyalkylene glycol, and (c) poly(alkylene arylate). (a) Amide oligomer has a chemical structure of or a combination thereof, wherein R1 is C4-8 alkylene group, R2 is C4-8 alkylene group, and each of x is independently an integer of 10 to 20. (b) Polyalkylene glycol has a chemical structure of wherein R3 is C2-10 alkylene group, and y is an integer of 20 to 30. (c) Poly(alkylene arylate) has a chemical structure of or a combination thereof, wherein Ar is R4 is C2-6 alkylene group, and z is an integer of 1 to 10.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: July 21, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sheng-Lung Chang, Jen-Chun Chiu, Chih-Hsiang Lin, Meng-Hsin Chen, Chien-Ming Chen, Chuh-Yung Chen, Yen-Chen Lin
  • Patent number: 10713521
    Abstract: An image capturing apparatus including a substrate, a light source, a sensor, a light shielding element, a first reflective element, and a transparent colloid curing layer is provided. The light source, the sensor, the light shielding element, the first reflective element, and the transparent colloid curing layer are disposed on the substrate. The sensor is located next to the light source. The light shielding element is located between the light source and the sensor. The first reflective element is located between the light shielding element and the sensor. The transparent colloid curing layer covers the light source, the sensor, the light shielding element, and the first reflective element. A manufacturing method of the image capturing apparatus is also provided.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: July 14, 2020
    Assignee: Gingy Technology Inc.
    Inventors: Kuo-Liang You, Kuo-Wen Yang, Cheng-Jyun Huang, Yu-Cheng Chiu, Hao-Hsiang Chang, Chih-Chiang Yu
  • Patent number: 10700177
    Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate including a conductive region made of silicon, germanium or a combination thereof. The method also includes forming an insulating layer over the semiconductor substrate and forming an opening in the insulating layer to expose the conductive region. The method also includes performing a deposition process to form a metal layer over a sidewall and a bottom of the opening, so that a metal silicide or germanide layer is formed on the exposed conductive region by the deposition process. The method also includes performing a first in-situ etching process to etch at least a portion of the metal layer and forming a fill metal material layer in the opening.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: June 30, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Min-Hsiu Hung, Yi-Hsiang Chao, Kuan-Yu Yeh, Kan-Ju Lin, Chun-Wen Nieh, Huang-Yi Huang, Chih-Wei Chang, Ching-Hwanq Su
  • Patent number: 10692983
    Abstract: In a method of manufacturing a semiconductor device, a first fin structure for an n-channel fin field effect transistor (FinFET) is formed over a substrate. An isolation insulating layer is formed over the substrate such that an upper portion of the first fin structure protrudes from the isolation insulating layer. A gate structure is formed over a part of the upper portion of the first fin structure. A first source/drain (S/D) epitaxial layer is formed over the first fin structure not covered by the gate structure. A cap epitaxial layer is formed over the first S/D epitaxial layer. The first S/D epitaxial layer includes SiP, and the cap epitaxial layer includes SiC with a carbon concentration is in a range from 0.5 atomic % to 5 atomic %.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: June 23, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Ting Li, Chih-Hao Chang, Sheng-Yu Chang, Jen-Hsiang Lu, Jyun-Yang Shen
  • Patent number: 10693003
    Abstract: An embodiment of a method for forming a transistor that includes providing a semiconductor substrate having a source/drain region is provided where a first SiGe layer is formed over the source/drain region. A thermal oxidation is performed to convert a top portion of the first SiGe layer to an oxide layer and a bottom portion of the first SiGe layer to a second SiGe layer. A thermal diffusion process is performed after the thermal oxidation is performed to form a SiGe area from the second SiGe layer. The SiGe area has a higher Ge concentration than the first SiGe layer.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chang, Jeff J. Xu, Chien-Hsun Wang, Chih Chieh Yeh, Chih-Hsiang Chang
  • Patent number: 10670940
    Abstract: A display panel including a substrate, a display device, a dielectric layer, and an optical resonance structure is provided. The substrate has a layout area and a light transmitting area located outside the layout area. The display device is disposed on the layout area of the substrate. The display device includes a first display electrode, a second display electrode, and a display media layer deposited between the first display electrode and the second display electrode. The dielectric layer is disposed on the substrate and covers the display device. The optical resonance structure is disposed on the dielectric layer and distributed correspondingly to the display device. The optical resonance structure includes a first transflective layer and a second transflective layer stacked on the display device and separated from each other.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: June 2, 2020
    Assignees: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Chih-Chia Chang, Yi-Hsiang Huang, Kai-Ming Chang, Kuan-Ting Chen
  • Patent number: 10658184
    Abstract: A method for semiconductor manufacturing includes providing a substrate and a patterning layer over the substrate; forming a hole in the patterning layer; applying a first directional etching along a first direction to inner sidewalls of the hole; and applying a second directional etching along a second direction to the inner sidewalls of the hole, wherein the second direction is different from the first direction.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 19, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Tien Shen, Chi-Cheng Hung, Chin-Hsiang Lin, Chien-Wei Wang, Ching-Yu Chang, Chih-Yuan Ting, Kuei-Shun Chen, Ru-Gun Liu, Wei-Liang Lin, Ya Hui Chang, Yuan-Hsiang Lung, Yen-Ming Chen, Yung-Sung Yen
  • Patent number: 10659770
    Abstract: A stereo image display apparatus includes a display device, a lens array layer and a directional structure. The display device includes display surface and an image algorithm unit. The lens array layer is disposed adjacent to the display surface of the display device. The lens array layer includes a plurality of lenses. The directional structure disposed between the display device and the lens array layer or disposed on the lens array layer. The directional structure enables light generated by the display device to emit directionally, and the lens array layer is configured to reconstruct an un-reconstructed image displayed by the display surface as an integral image to produce a stereo image, so that a better stereo image display effect can be provided.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: May 19, 2020
    Assignee: CHERAY CO. LTD.
    Inventors: Chun-Hsiang Yang, Yi-Pai Huang, Chih-Hung Ting, Kai-Chieh Chang, Jui-Yi Wu