Patents by Inventor Chih-Hsiang Chang
Chih-Hsiang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20150213753Abstract: A display panel and a demultiplexer circuit are provided. The demultiplexer circuit includes a first to a Pth switch units. The first to the Pth switch units are coupled to a first to a Pth data lines of a display panel respectively and collectively receive a data voltage and turn on sequentially in sequence to provide the data voltage to corresponding data lines. A period of the first to the Pth switch units provide the data voltage to the first to the P data lines sequentially which is defined to a data transmission period. When the switch unit is turned on, N transistors are turned on simultaneously according to a plurality of control signals. When the switch unit is turned off, at least one of the N transistors is turned off according to a corresponding control signal.Type: ApplicationFiled: July 22, 2014Publication date: July 30, 2015Inventors: Chen-Chi Lin, Chih-Hsiang Chang
-
Patent number: 8994387Abstract: A semiconductor device and a detection method thereof are provided. The semiconductor device includes a resistor terminal, a dummy pull up driver, a comparator and a detection state machine. The resistor terminal is connected to an external resistor. The dummy pull up driver provides driving operations of 20 to 2N+1?1 stages, wherein N is a natural number. The comparator outputs a comparison signal in response to a test voltage and a reference voltage. The detection state machine controls the driving operation of the dummy pull up driver to generate and output a detection signal according to the comparison signal. The detection signal indicates an electric connection state of the resistor terminal is a connecting state of an operation voltage or a floating state, a connecting state of the external resistor, or a connecting state of a ground voltage.Type: GrantFiled: November 4, 2012Date of Patent: March 31, 2015Assignee: Winbond Electronics Corp.Inventor: Chih-Hsiang Chang
-
Patent number: 8829966Abstract: A current reuse frequency divider including a first latch circuit and a second latch circuit is provided. The first latch circuit includes a first transistor pair and a second transistor pair. The first latch circuit receives a first differential oscillation signal through bodies of the first transistor pair and the second transistor pair and divides the frequency of the first differential oscillation signal to generate a second differential oscillation signal. The second latch circuit is coupled to the first latch circuit and includes a third transistor pair and a fourth transistor pair. The second latch circuit receives the first differential oscillation signal through bodies of the third transistor pair and the fourth transistor pair and divides the frequency of the first differential oscillation signal to generate a third differential oscillation signal.Type: GrantFiled: December 27, 2012Date of Patent: September 9, 2014Assignee: Industrial Technology Research InstituteInventors: Chih-Hsiang Chang, Nai-Chen Cheng, Yu Lee, Ching-Yuan Yang
-
Publication number: 20140139273Abstract: A current reuse frequency divider including a first latch circuit and a second latch circuit is provided. The first latch circuit includes a first transistor pair and a second transistor pair. The first latch circuit receives a first differential oscillation signal through bodies of the first transistor pair and the second transistor pair and divides the frequency of the first differential oscillation signal to generate a second differential oscillation signal. The second latch circuit is coupled to the first latch circuit and includes a third transistor pair and a fourth transistor pair. The second latch circuit receives the first differential oscillation signal through bodies of the third transistor pair and the fourth transistor pair and divides the frequency of the first differential oscillation signal to generate a third differential oscillation signal.Type: ApplicationFiled: December 27, 2012Publication date: May 22, 2014Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Hsiang Chang, Nai-Chen Cheng, Yu Lee, Ching-Yuan Yang
-
Patent number: 8723609Abstract: A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.Type: GrantFiled: July 26, 2012Date of Patent: May 13, 2014Assignee: Idustrial Technology Research InstituteInventors: Chih-Hsiang Chang, Nai-Chen Cheng, Yu Lee, Ching-Yuan Yang
-
Publication number: 20140125362Abstract: A semiconductor device and a detection method thereof are provided. The semiconductor device includes a resistor terminal, a dummy pull up driver, a comparator and a detection state machine. The resistor terminal is connected to an external resistor. The dummy pull up driver provides driving operations of 20 to 2N+1?1 stages, wherein N is a natural number. The comparator outputs a comparison signal in response to a test voltage and a reference voltage. The detection state machine controls the driving operation of the dummy pull up driver to generate and output a detection signal according to the comparison signal. The detection signal indicates an electric connection state of the resistor terminal is a connecting state of an operation voltage or a floating state, a connecting state of the external resistor, or a connecting state of a ground voltage.Type: ApplicationFiled: November 4, 2012Publication date: May 8, 2014Applicant: WINBOND ELECTRONICS CORP.Inventor: Chih-Hsiang Chang
-
Patent number: 8703565Abstract: An integrated circuit structure includes a substrate and a germanium-containing semiconductor fin over the substrate. The germanium-containing semiconductor fin has an upper portion having a first width, and a neck region under the upper portion and having a second width smaller than the first width.Type: GrantFiled: March 11, 2013Date of Patent: April 22, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chang, Jeffrey Junhao Xu, Chien-Hsun Wang, Chih-Hsiang Chang
-
Publication number: 20140091362Abstract: An integrated circuit transistor structure includes a semiconductor substrate, a first SiGe layer in at least one of a source area or a drain area on the semiconductor substrate, and a channel between the source area and the drain area. The first SiGe layer has a Ge concentration of 50 percent or more.Type: ApplicationFiled: December 11, 2013Publication date: April 3, 2014Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao CHANG, Jeff J. XU, Chien-Hsun WANG, Chih Chieh YEH, Chih-Hsiang CHANG
-
Patent number: 8623728Abstract: A method for producing a SiGe stressor with high Ge concentration is provided. The method includes providing a semiconductor substrate with a source area, a drain area, and a channel in between; depositing the first SiGe film layer on the source area and/or the drain area; performing a low temperature thermal oxidation, e.g., a high water vapor pressure wet oxidation, to form an oxide layer at the top of the first SiGe layer and to form the second SiGe film layer with high Ge percentage at the bottom of the first SiGe film layer without Ge diffusion into the semiconductor substrate; performing a thermal diffusion to form the SiGe stressor from the second SiGe film layer, wherein the SiGe stressor provides uniaxial compressive strain on the channel; and removing the oxide layer. A Si cap layer can be deposited on the first SiGe film layer prior to performing oxidation.Type: GrantFiled: July 7, 2010Date of Patent: January 7, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chang, Jeff J. Xu, Chien-Hsun Wang, Chih Chieh Yeh, Chih-Hsiang Chang
-
Patent number: 8546242Abstract: A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first treatment on the dielectric material, wherein the first treatment provides an energy high enough for breaking bonds in the dielectric material; and performing a steam anneal on the dielectric material.Type: GrantFiled: May 25, 2012Date of Patent: October 1, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Neng-Kuo Chen, Chih-Hsiang Chang, Kuo-Hwa Tzeng, Cheng-Yuan Tsai
-
Publication number: 20130241661Abstract: A voltage-controlled oscillator (VCO) module including a first VCO unit, a second VCO unit, and a matching circuit is provided. The first VCO unit includes a first terminal and a second terminal and generates a first oscillator signal. The second VCO unit is coupled to the first VCO unit and generates a second oscillator signal. The matching circuit is coupled between the first VCO unit and second VCO unit. The matching circuit includes a plurality of inductor modules respectively coupled between the first terminal of the first VCO unit and the second VCO unit, between the first terminal and the second terminal of the first VCO unit, and between the second terminal of the first VCO unit and the second VCO unit. Furthermore, a method for generating oscillator signals is also provided.Type: ApplicationFiled: July 26, 2012Publication date: September 19, 2013Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Hsiang Chang, Nai-Chen Cheng, Yu Lee, Ching-Yuan Yang
-
Patent number: 8395195Abstract: An integrated circuit structure includes a substrate and a germanium-containing semiconductor fin over the substrate. The germanium-containing semiconductor fin has an upper portion having a first width, and a neck region under the upper portion and having a second width smaller than the first width.Type: GrantFiled: February 9, 2010Date of Patent: March 12, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chang, Jeffrey Junhao Xu, Chien-Hsun Wang, Chih-Hsiang Chang
-
Publication number: 20120301277Abstract: A fan includes a housing, an impeller and at least one position-limiting mechanism. The housing has an accommodating space for receiving the impeller. The impeller has a hub and a plurality of blades surrounding the hub. The position-limiting mechanism is located between the top of the blade and the inner side of the housing, and disposed on the top of the blade or the inner side of the housing.Type: ApplicationFiled: May 16, 2012Publication date: November 29, 2012Inventors: Chih-Hsiang CHANG, Ding-Wei CHIU, Shih-Chou CHEN
-
Publication number: 20120235273Abstract: A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first treatment on the dielectric material, wherein the first treatment provides an energy high enough for breaking bonds in the dielectric material; and performing a steam anneal on the dielectric material.Type: ApplicationFiled: May 25, 2012Publication date: September 20, 2012Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Neng-Kuo Chen, Chih-Hsiang Chang, Kuo-Hwa Tzeng, Cheng-Yuan Tsai
-
Patent number: 8258827Abstract: A frequency doubler receiving an in-phase oscillating signal and an inverse oscillating signal and generating an output signal oscillating at a multiplied frequency, accordingly. The frequency doubler has a first transistor, a second transistor, a first inductor and a second inductor. A first terminal of the first transistor and a first terminal of the second transistor are at a common voltage. The frequency doubler receives the in-phase oscillating signal and the inverse oscillating signal via control terminals of the first and second transistors. The first and second inductors couple a second terminal of the first transistor and a second terminal of the second transistor to an output terminal of the frequency doubler, respectively. The first and second inductors may be separate inductance devices or, in another case, be implemented by a symmetric inductor.Type: GrantFiled: May 27, 2010Date of Patent: September 4, 2012Assignee: Industrial Technology Research InstituteInventors: Chih-Hsiang Chang, Jung-Mao Lin, Ching-Yuan Yang
-
Publication number: 20120154060Abstract: A quadrature voltage-controlled oscillator (QVCO) apparatus including a first VCO, a second VCO, a first energy-storage element, a second energy-storage element, a third energy-storage element and a fourth energy-storage element is provided. The first VCO has a first and a second phase output ends. The second VCO has a third and a fourth phase output ends. A first and a second ends of the first energy-storage element respectively connect to the first and the third phase output ends. A first and a second ends of the second energy-storage element respectively connect to the second and the third phase output ends. A first and a second ends of the third energy-storage element respectively connect to the second and the fourth phase output ends. A first and a second ends of the fourth energy-storage element respectively connect to the first and the fourth phase output ends.Type: ApplicationFiled: January 31, 2011Publication date: June 21, 2012Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Hsiang Chang, Jung-Mao Lin, Ching-Yuan Yang
-
Patent number: 8187948Abstract: A method of forming a shallow trench isolation region is provided. The method includes providing a semiconductor substrate comprising a top surface; forming an opening extending from the top surface into the semiconductor substrate; performing a conformal deposition method to fill a dielectric material into the opening; performing a first treatment on the dielectric material, wherein the first treatment provides an energy high enough for breaking bonds in the dielectric material; and performing a steam anneal on the dielectric material.Type: GrantFiled: February 18, 2008Date of Patent: May 29, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Neng-Kuo Chen, Chih-Hsiang Chang, Kuo-Hwa Tzeng, Cheng-Yuan Tsai
-
Patent number: 8035457Abstract: A voltage controlled oscillator (VCO) includes a voltage controlled current source (VCCS), a negative resistance circuit (NRC), a first transformer, a second transformer, a first transistor and a second transistor. A current terminal of the VCCS receives a control voltage. First terminals of first and second current paths in the NRC are coupled to a current terminal of the VCCS. Primary sides of the first and the second transformers are respectively coupled to second terminals of the first and the second current paths. Secondary sides of the first and the second transformers are first and second output terminals of the VCO, respectively. First terminals of the first and the second transistor are respectively coupled to the secondary sides of the first and the second transformers. Control terminals of the first and the second transformers are respectively coupled to the primary sides of the first and the second transformers.Type: GrantFiled: January 15, 2010Date of Patent: October 11, 2011Assignee: Industrial Technology Research InstituteInventors: Chih-Hsiang Chang, Jung-Mao Lin, Ching-Yuan Yang
-
Publication number: 20110193178Abstract: An integrated circuit structure includes a substrate and a germanium-containing semiconductor fin over the substrate. The germanium-containing semiconductor fin has an upper portion having a first width, and a neck region under the upper portion and having a second width smaller than the first width.Type: ApplicationFiled: February 9, 2010Publication date: August 11, 2011Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chang, Jeffrey Junhao Xu, Chien-Hsun Wang, Chih-Hsiang Chang
-
Publication number: 20110175651Abstract: A frequency doubler receiving an in-phase oscillating signal and an inverse oscillating signal and generating an output signal oscillating at a multiplied frequency, accordingly. The frequency doubler has a first transistor, a second transistor, a first inductor and a second inductor. A first terminal of the first transistor and a first terminal of the second transistor are at a common voltage. The frequency doubler receives the in-phase oscillating signal and the inverse oscillating signal via control terminals of the first and second transistors. The first and second inductors couple a second terminal of the first transistor and a second terminal of the second transistor to an output terminal of the frequency doubler, respectively. The first and second inductors may be separate inductance devices or, in another case, be implemented by a symmetric inductor.Type: ApplicationFiled: May 27, 2010Publication date: July 21, 2011Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Hsiang CHANG, Jung-Mao Lin, Ching-Yuan Yang