Patents by Inventor Chih-Kang Yeh
Chih-Kang Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100180069Abstract: A block management method for a flash memory of a storage system is provided, wherein the flash memory includes a plurality of physical blocks. The block management method includes grouping the physical blocks into a plurality of physical units, and grouping the physical units into a data area, a spare area, and a replacement area. The block management method further includes performing a first physical unit switch which switches the physical units between the data area and the spare area, and performing a second physical unit switch which switches the physical units between the spare area and the replacement area. Therefore, the block management method can uniformly use the physical blocks and thereby effectively prolong a lifespan of the storage system.Type: ApplicationFiled: March 18, 2009Publication date: July 15, 2010Applicant: PHISON ELECTRONICS CORP.Inventor: CHIH-KANG YEH
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Publication number: 20100156448Abstract: A flash storage device and a testing method and a testing system for the flash storage device are provided. The testing system includes a testing apparatus and the flash storage device. The flash storage device includes a controller, a flash memory module, a plurality of peripheral pins and at least one test pin. The flash storage device receives an enable signal transmitted from the testing apparatus through the test pin. Subsequently, the controller outputs a signal to the testing apparatus through each peripheral pin based to the enable signal. Finally, the testing apparatus verifies the signal outputted by each peripheral pin.Type: ApplicationFiled: February 11, 2009Publication date: June 24, 2010Applicant: PHISON ELECTRONICS CORP.Inventors: Ban-Hui Chen, Chih-Kang Yeh
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Publication number: 20100088540Abstract: A block management and replacement method for a flash memory is provided. The method includes grouping physical blocks of the flash memory into physical units and dividing the physical units as a usage area and a replacement area, wherein the physical blocks grouped into the same physical unit are accessed by using a multi-planes accessing command. The method also includes when one of the physical block of the physical unit in the usage area is damaged, replacing the physical unit having the damaged physical block with one physical unit selected from the replacement area and recording the undamaged physical block within the replaced physical unit if there is an applicable physical unit in the replacement area; and replacing the damaged physical block with one physical block selected from the replacement area if there is no applicable physical unit but an undamaged physical block in the replacement area.Type: ApplicationFiled: December 4, 2008Publication date: April 8, 2010Applicant: PHISON ELECTRONICS CORP.Inventors: Chien-Hua Chu, Chih-Kang Yeh, Horng-Sheng Yan
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Publication number: 20100064094Abstract: A memory managing method for a non-volatile memory and a controller using the same are disclosed. The controller includes a system wear leveling member for performing a first wear leveling process in a non-volatile memory for choosing a memory unit; and a subsystem wear leveling member for performing a second wear leveling process in the chosen memory unit for selecting a block from the chosen memory unit for data programming; whereby uneven use of the blocks of the chosen memory unit is avoided.Type: ApplicationFiled: September 9, 2008Publication date: March 11, 2010Applicant: Phison Electronics Corp.Inventor: Chih-Kang Yeh
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Publication number: 20100057979Abstract: A data transmission method suitable for transmitting data from a cache to a plurality of flash memory groups through a single data bus in a flash memory storage system is provided. The data transmission method includes sequentially sorting and grouping data to be written at continuous logical addresses in the cache in unit of logical blocks. The data transmission method further includes respectively transmitting the grouped sector data into the flash memory groups through the data bus in an interleaving manner, wherein data in the same logical block is transmitted and written into physical blocks of the same flash memory group. Thereby, the data is prevented from being written into different physical blocks, and accordingly the lifespan of the flash memory storage system is prolonged.Type: ApplicationFiled: December 3, 2008Publication date: March 4, 2010Applicant: PHISON ELECTRONICS CORP.Inventors: Chien-Hua Chu, Chih-Kang Yeh, Ruei-Cian Chen, Kian-Fui Seng
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Publication number: 20100042773Abstract: A flash memory storage system and a data writing method thereof are provided. The flash memory storage system includes a controller, a connector, a cache memory, a SLC NAND flash memory and a MLC NAND flash memory. When the controller receives data to be written into the MLC NAND flash memory from a host system, the data is temporarily stored in the cache memory first and then is written into the MLC NAND flash memory from the cache memory. And, the controller may backup the data stored in the cache memory to the SLC NAND flash memory. Accordingly, it is possible to reduce a response time for a flush command, thereby improving a performance of the flash memory storage system.Type: ApplicationFiled: October 31, 2008Publication date: February 18, 2010Applicant: PHISON ELECTRONICS CORP.Inventor: Chih-Kang Yeh
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Publication number: 20100042774Abstract: A block management method for a flash memory chip having multiple planes is provided, wherein each plane has a plurality of physical blocks. The method includes disposing a plurality of physical units, wherein each physical unit includes a physical block of each plane, and the physical blocks in the physical unit have a simultaneously-operable relationship. The method also includes writing data in a single plane access mode when a host system does not update all the physical blocks in an updated the physical unit. The method further includes writing the data in a multi-planes access mode when the host system updates all the physical blocks in the updated physical unit, wherein the physical blocks for writing the data have the simultaneously-operable relationship.Type: ApplicationFiled: November 5, 2008Publication date: February 18, 2010Applicant: PHISON ELECTRONICS CORP.Inventors: Jiunn-Yeong Yang, Chien-Hua Chu, Chih-Kang Yeh, Kuang-Tung Fang, Jui-Hsien Chang
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Publication number: 20100042775Abstract: A block management method for managing a flash memory is provided. The method includes dividing the flash memory into a cache area and a storage area and dividing the cache area into a plurality of cache sub-areas, wherein the storage area has a plurality of physical blocks and each cache sub-area contains at least one physical block. The method also includes configuring a plurality of logical blocks for mapping the physical blocks of the storage area, and allocating one of the cache sub-areas for each logical block, wherein when the host writes the data into the logical blocks, the data may be temporarily stored in the cache sub-areas allocated for the logical blocks. Accordingly, it is possible to increase efficiency of the flash storage system and avoid wearing of the physical blocks, so as to prolong a lifetime of the flash storage system.Type: ApplicationFiled: November 19, 2008Publication date: February 18, 2010Applicant: PHISON ELECTRONICS CORP.Inventor: Chih-Kang Yeh
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Publication number: 20100030979Abstract: A data management method, a controller and a storage apparatus thereof are provided. The method is adapted for a storage apparatus having a plurality of blocks. Parts of the blocks are linked to configure a plurality of mother and child blocks (M&C block). The data management method includes: (a) checking whether a mother and child block currently to be written with data is the same of a mother and child block which has been most lately written with data; (b) when it is determined that the mother and child block currently to be written with data is not the same of the mother and child block which has been most lately written with data, saving a transient data of the mother and child block currently to be written with data to a mother and child block transient relationship table.Type: ApplicationFiled: October 27, 2008Publication date: February 4, 2010Applicant: PHISON ELECTRONICS CORP.Inventors: Chien-Hua Chu, Chih-Kang Yeh
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Publication number: 20100023675Abstract: A wear leveling method for a flash is provided, wherein the flash memory includes a plurality of physical blocks grouped into at least a data area and a spare area. The method includes setting a first predetermined threshold value as a wear-leveling start value and randomly generating a random number as a memory erased count, wherein the random number is smaller than the wear-leveling start value. The method also includes counting the memory erased count each time when the physical blocks are erased and determining whether the memory erased count is smaller than the wear-leveling start value, wherein a physical blocks switching is performed between the data area and the spare area when the memory erased count is not smaller then the wear-leveling start value. Accordingly, it is possible to uniformly use the physical blocks, so as to effectively prolong a lifetime of the store system.Type: ApplicationFiled: November 6, 2008Publication date: January 28, 2010Applicant: PHISON ELECTRONICS CORP.Inventors: RUEI-CIAN CHEN, Chih-Kang Yeh, Kian-Fui Seng
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Patent number: 7649794Abstract: A wear leveling method under limited system resources is provided, the wear levelling method is suitable for a non-volatile memory, the non-volatile memory is substantially divided into a plurality of blocks, and the blocks are at least grouped into a data area, a spare area and a substitution-transient area. The blocks within the data area may be divided into a plurality of lately-used blocks and a plurality of lately-unused blocks. The method includes only recording erase times of the lately-used blocks and blocks within the spare area and selecting a block used for the substitution-transient area is selected from the spare area according to a judgment condition of erase times of another block within the spare area plus a first threshold value. The method also includes performing a wear leveling procedure. Wherein, the selected block and the other block are selected in a random mode or a sequential mode.Type: GrantFiled: January 14, 2008Date of Patent: January 19, 2010Assignee: Phison Electronics Corp.Inventor: Chih-Kang Yeh
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Publication number: 20100011153Abstract: A block management method for managing a multi level cell (MLC) NAND flash memory is provided, wherein the MLC NAND flash memory has a plurality of physical blocks grouped into at least a data area and a spare area, each of the physical blocks has a plurality of pages divided into a plurality of upper pages, and a plurality of lower pages with a writing speed thereof being greater than that of the upper pages. The block management method includes configuring a plurality of logical blocks for being accessed by a host, recording the logical block belonged to a frequently accessed block and executing a special mode to use the lower pages of at least two physical blocks of the MLC NAND flash memory for storing data of one logical block belonged to the frequently accessed block. Accordingly, it is possible to increase the access speed of a storage system.Type: ApplicationFiled: October 28, 2008Publication date: January 14, 2010Applicant: PHISON ELECTRONICS CORP.Inventor: Chih-Kang Yeh
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Publication number: 20100011154Abstract: A data accessing method for a flash memory and a storage system and a controller using the same are provided. The data accessing method includes grouping a plurality of physical blocks of the flash memory into a data area, a spare area, and a random area and when a write command and a new data to be written are received from a host, determining whether the new data is a continuous data, wherein the new data is written temporarily into the physical blocks in the random area if the new data is not a continuous data. Thereby, the number of data moving and physical block erasing is reduced and accordingly the data accessing speed in a random writing mode is increased.Type: ApplicationFiled: November 25, 2008Publication date: January 14, 2010Applicant: PHISON ELECTRONICS CORP.Inventor: Chih-Kang Yeh
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Publication number: 20100011151Abstract: A data accessing method, and a storage system and a controller using the same are provided. The data accessing method is suitable for a flash memory storage system having a data perturbation module. The data accessing method includes receiving a read command from a host and obtaining a logical block to be read and a page to be read from the read command. The data accessing method also includes determining whether a physical block in a data area corresponding to the logical block to be read is a new block and transmitting a predetermined data to the host when the physical block corresponding to the logical block to be read is a new block. Thereby, the host is prevented from reading garbled code from the flash memory storage system having the data perturbation module.Type: ApplicationFiled: September 15, 2008Publication date: January 14, 2010Applicant: PHISON ELECTRONICS CORP.Inventors: Chien-Hua Chu, Chih-Kang Yeh
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Publication number: 20090327585Abstract: A data management method a flash memory storage system and a controller using the same are provided. The data management method is used for accessing a flash memory of the flash memory storage system, wherein the flash memory includes a plurality of physical blocks and the physical blocks are grouped into a data area and a spare area. The data management method includes configuring a plurality of logical blocks for be accessed by a host. The data management method also includes dividing each physical block into a plurality of physical parts and mapping the logical blocks to the physical parts. The data management method further includes accessing the mapped physical parts according to the physical blocks to be accessed by the host. Accordingly, it is possible to increase the usage and the accessing speed of the physical blocks in the flash memory storage system.Type: ApplicationFiled: September 30, 2008Publication date: December 31, 2009Applicant: PHISON ELECTRONICS CORP.Inventor: Chih-Kang Yeh
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Publication number: 20090307412Abstract: A memory management method for a non-volatile memory and a controller using the same are provided. The non-volatile memory is substantially divided into a plurality of blocks. First, non-erasing information of a plurality of memory units comprising at least one block is recoded and used as a reference to establish an evaluation value. Then, whether to move data of at least one block on the memory units to another memory unit according to the evaluation value is determined. Accordingly, problems of read disturb and data retention due to excessive reading times can be resolved.Type: ApplicationFiled: July 24, 2008Publication date: December 10, 2009Applicant: PHISON ELECTRONICS CORP.Inventor: Chih-Kang Yeh
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Publication number: 20090300271Abstract: A non-volatile memory storage system including a transmission interface, a memory module, and a controller is provided. The memory module includes first and second non-volatile memory chips. The first and the second non-volatile memory chips can be simultaneously enabled by receiving a chip enable signal from the controller via a chip enable pin. When the controller performs a multichannel access, the controller provides an access instruction to the first and second non-volatile memory chip, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal. When the controller performs a single channel access, the controller provides the access signal to one of the first and second non-volatile memory chips, and provides a non-access instruction to the other one, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal.Type: ApplicationFiled: August 25, 2008Publication date: December 3, 2009Applicant: PHISON ELECTRONICS CORP.Inventors: Jiunn-Yeong Yang, Chien-Hua Chu, Kuo-Yi Cheng, Li-Chun Liang, Chih-Kang Yeh
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Publication number: 20090287876Abstract: A method, an apparatus and a controller for managing memories are provided. In the present invention, a data accessing format of each of the memories is adjusted such that the accessing units for each data accessing operation are unified. A mapping table is then established for recording the adjusted data accessing format. When a data accessing command is received from a host, the mapping table is inquired so as to execute the data accessing command. Accordingly, incompatibility of hardware structures can be resolved, and management of different types of flash memory can be achieved.Type: ApplicationFiled: July 7, 2008Publication date: November 19, 2009Applicant: PHISON ELECTRONICS CORP.Inventor: Chih-Kang Yeh
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Publication number: 20090287877Abstract: A multi non-volatile memory chip packaged storage system having a memory module, a controller, a first and a second control buses and a first and a second I/O buses is provided. The memory module at least includes a first and a second non-volatile memory chips which are both enabled by receiving a chip enabled signal via a chip enabled pin, wherein the memory module and the controller are stacked and packaged as a single chip. After the first and the second non-volatile memory chips are enabled by the chip enable signal via the chip enabled pin, the controller may active the first and second control buses and the first and second I/O buses to access the first and the second non-volatile memory chips, or only active the first control and I/O buses or the second control and I/O buses to access the corresponding first or second non-volatile memory chip.Type: ApplicationFiled: August 25, 2008Publication date: November 19, 2009Applicant: PHISON ELECTRONICS CORP.Inventors: Chien-Hua Chu, Kuo-Yi Cheng, Chih-Kang Yeh
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Publication number: 20090265505Abstract: A data writing method, and a flash storage system and a controller using the same are provided. The method includes grouping the physical blocks of a flash memory into the physical blocks of a data area, a spare area and a special area. The method also includes writing the update data into the corresponding physical block of the special area when the update data is the single accessing unit. The method may include moving a part of valid data in a physical block mapping a logical block where the update data is belonged into a physical block of the spare area during each data writing command. Accordingly, it is possible to reduce the response time for each data writing command, thereby preventing a time-out problem caused by a flash memory having a large erasing unit configured at the flash storage system.Type: ApplicationFiled: June 27, 2008Publication date: October 22, 2009Applicant: PHISON ELECTRONICS CORP.Inventors: Jiunn-Yeong Yang, Chih-Kang Yeh