Patents by Inventor Chih-Kang Yeh

Chih-Kang Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8386699
    Abstract: A method for giving program commands to a flash memory chip is provided, the method is suitable for writing data from a host system into the flash memory chip. In the present method, a plurality of host write commands and data corresponding to the host write commands are received from the host system by using a native command queuing (NCQ) protocol, and cache program commands are gived to the flash memory chip to write the data into the flash memory chip. Accordingly, the time for executing the host write commands is effectively shortened by writing the data through the cache program commands and the NCQ protocol.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: February 26, 2013
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Publication number: 20130024604
    Abstract: A method for writing updated data into a flash memory module having a plurality of physical pages is provided, wherein each physical page is the smallest writing unit of the flash memory module. The method includes partitioning a physical page into storage segments and configuring a state mark for each storage segment, wherein the state marks indicate the validity of data stored in the storage segments. The method also includes writing the updated data into at least one of the storage segments and changing the state mark corresponding to the storage segment containing the updated data, wherein the state mark corresponding to the storage segment containing the updated data indicates a valid state, and the state marks corresponding to the other storage segments of the physical page not containing the updated data indicate an invalid state. Thereby, the time for writing data into a physical page is effectively shortened.
    Type: Application
    Filed: October 6, 2011
    Publication date: January 24, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Publication number: 20130019049
    Abstract: A block management method for a rewritable non-volatile memory module having a plurality of physical blocks, and a memory controller and memory storage apparatus using the same are provided. The method includes logically grouping the physical blocks at least into a data area, a free area and a replacement area and configuring a plurality of logical blocks for mapping to the physical blocks of the data area. The method also includes assigning bad physical blocks into the data area and marking the logical blocks mapping to the bad physical blocks as bad logical addresses, thereby forbidding the access of the logical blocks mapping to the bad physical blocks. According, the method can effectively use the rewritable non-volatile memory module having too many bad physical blocks to store data.
    Type: Application
    Filed: September 15, 2011
    Publication date: January 17, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Publication number: 20130013853
    Abstract: A command executing method for a memory storage apparatus and a memory controller and the memory storage apparatus using the same are provided. The method includes, during a data merging operation, receiving a write command and a write data corresponding to the write command from a host system. The method also includes temporarily storing the write data into a buffer memory, and at a delay time point, transmitting a response message to the host, the delay time point is set by adding a dummy delay time to a time point that the operation of writing the write data into the buffer memory is completed. Accordingly, the method can effectively level the response times of executing write commands during the data merging operation, thereby shortening the maximum access time.
    Type: Application
    Filed: September 25, 2011
    Publication date: January 10, 2013
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Publication number: 20120324205
    Abstract: A memory management table processing method for storing a plurality of entries belonging to a plurality of memory management tables into a buffer memory of a memory storage apparatus is provided, wherein each of the entries has at least one invalid bit. The present method includes following steps. An area corresponding to each of the memory management tables is configured in the buffer memory. Invalid bit information corresponding to each of the memory management tables is recorded. The invalid bit in each of the entries is removed according to the invalid bit information corresponding to each of the memory management tables, so as to generate a valid data stream corresponding to each of the entries. Each of the valid data streams is written into the corresponding area in the buffer memory. Accordingly, the storage space of the buffer memory can be efficiently utilized.
    Type: Application
    Filed: August 21, 2011
    Publication date: December 20, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Chen Teo, Ming-Jen Liang, Chih-Kang Yeh
  • Publication number: 20120317346
    Abstract: A data storing method for a rewritable non-volatile memory module is provided. The method includes receiving page data to be stored in a first logical address. The method also includes determining whether a storage status of the rewritable non-volatile memory module is a predetermined status; if yes, using a first writing mode to write the page data into the rewritable non-volatile memory module; if no, using a second writing mode to write the page data into the rewritable non-volatile memory module. In the first writing mode, lower physical program units of the rewritable non-volatile memory module are applied for writing data, and upper physical program units of the rewritable non-volatile memory module are not applied for writing data; in the second writing mode, the upper physical program units and the lower physical program units are applied for writing data.
    Type: Application
    Filed: August 17, 2012
    Publication date: December 13, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Publication number: 20120311247
    Abstract: A data read method for reading data to be accessed by a host system from a plurality of flash memory modules is provided. The data read method includes receiving command queuing information related to a plurality of host read commands from the host system, each of the host read commands is corresponding to one of a plurality of data input/output buses coupled to the flash memory modules. The data read method also includes re-arranging the host read commands and generating a command giving sequence according to the data input/output buses corresponding to the host read commands. The data read method further includes sequentially receiving and processing the host read commands from the host system according to the command giving sequence and pre-reading data corresponding to a second host read command. Thereby, the time for executing the host read commands can be effectively shortened.
    Type: Application
    Filed: August 17, 2012
    Publication date: December 6, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: CHIH-KANG YEH
  • Patent number: 8312554
    Abstract: A data protecting method for a portable memory storage apparatus is provided. The method includes determining whether a mode signal is at a data protecting mode, and performing a file hiding procedure to change a file allocation table if the mode signal is at the data protecting mode, wherein a host system coupled to the portable memory storage device is allowed to only access a portion of logical addresses of the portable memory storage apparatus according to the changed file allocation table and files stored in the portable memory storage apparatus before the file hiding procedure are written into another portion of the logical addresses. Additionally, the method still includes performing a file showing procedure to change the file allocation table if the mode signal is not at the data protecting mode, wherein the host system may access all the logical addresses according to the changed file allocation table.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: November 13, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chih-Ling Wang, Chih-Kang Yeh
  • Publication number: 20120278535
    Abstract: A data writing method for writing data belonging to a logical page into a rewritable non-volatile memory module is provided. In the data writing method, a mark count value is set for each logical page. Whether the mark count value corresponding to the logical page is greater than a predetermined threshold is determined If the mark count value corresponding to the logical page is not greater than the predetermined threshold, the mark count value corresponding to the logical page is counted, and the data and the mark count value corresponding to the logical page are written into a first storage area or a second storage area. Otherwise, the data and the mark count value corresponding to the logical page are written into the second storage area. Thereby, data stored in the rewritable non-volatile memory module can be effectively identified and data loss caused by power failure can be avoided.
    Type: Application
    Filed: July 15, 2011
    Publication date: November 1, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 8301827
    Abstract: A data read method for reading data to be accessed by a host system from a plurality of flash memory modules is provided. The data read method includes receiving command queuing information related to a plurality of host read commands from the host system, each of the host read commands is corresponding to one of a plurality of data input/output buses coupled to the flash memory modules. The data read method also includes re-arranging the host read commands and generating a command giving sequence according to the data input/output buses corresponding to the host read commands. The data read method further includes sequentially receiving and processing the host read commands from the host system according to the command giving sequence and pre-reading data corresponding to a second host read command. Thereby, the time for executing the host read commands can be effectively shortened.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: October 30, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Publication number: 20120272123
    Abstract: A data writing method for writing page data into a rewritable non-volatile memory module is provided, the rewritable non-volatile memory module has a plurality of physical blocks, and each of the physical blocks has a plurality of physical pages. The data writing method includes grouping the physical pages into a plurality of physical page groups according to write speed of each physical page. The data writing method also includes compressing the page data to generate compressed data and calculating a data compression ratio corresponding to the compressed data. The data writing method further includes writing the compressed data into one of the physical pages in a corresponding physical page group among the physical page groups according to the data compression ratio. Accordingly, the data writing method can effectively ensure the accuracy of data stored in the rewritable non-volatile memory module.
    Type: Application
    Filed: May 23, 2011
    Publication date: October 25, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 8296507
    Abstract: A memory management and writing method for managing a plurality of physical units of a memory chip is provided. The present method includes grouping the physical units into a first physical unit group and a second physical unit group, recording and calculating a first erase count of the first physical unit group and a second erase count of the second physical unit group, and calculating an erase count difference between the first erase count and the second erase count. The present method also includes determining whether the erase count difference is larger than an erase count difference threshold when a write command is received. The method further includes executing a switched writing procedure to write data corresponding to the write command into the memory chip when the erase count difference is larger than the erase count difference threshold. Thereby, the lifespan of the memory chip is effectively prolonged.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: October 23, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Patent number: 8296504
    Abstract: A data management method for a flash memory storage system having a cache memory is provided. The data management method includes writing data into a flash memory when a write command is executed, and determining currently a state of all the writing data which is temporarily stored in the cache memory. Wherein, if the state indicates that a time for writing all the writing data temporarily stored in the cache memory into a flash memory may exceed an upper limit processing time, a portion of the writing data temporarily stored in the cache memory is first written into the flash memory. Accordingly, the data management method may effectively avoid a delay caused by a flush command issued from the host for flushing the cache memory.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: October 23, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Chih-Kang Yeh
  • Patent number: 8296502
    Abstract: A data management method, a flash memory storage system and a controller using the same are provided. The data management method is used for accessing a flash memory of the flash memory storage system, wherein the flash memory includes a plurality of physical blocks and the physical blocks are grouped into a data area and a spare area. The data management method includes configuring a plurality of logical blocks for be accessed by a host. The data management method also includes dividing each physical block into a plurality of physical parts and mapping the logical blocks to the physical parts. The data management method further includes accessing the mapped physical parts according to the physical blocks to be accessed by the host. Accordingly, it is possible to increase the usage and the accessing speed of the physical blocks in the flash memory storage system.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: October 23, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Patent number: 8296501
    Abstract: A memory management method for a non-volatile memory and a controller using the same are provided. The non-volatile memory is substantially divided into a plurality of blocks. First, non-erasing information of a plurality of memory units comprising at least one block is recoded and used as a reference to establish an evaluation value. Then, whether to move data of at least one block on the memory units to another memory unit according to the evaluation value is determined. Accordingly, problems of read disturb and data retention due to excessive reading times can be resolved.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: October 23, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Publication number: 20120254522
    Abstract: A method for giving a read command to a flash memory chip to read data to be accessed by a host system is provided. The method includes receiving a host read command; determining whether the received host read command follows a last host read command; if yes, giving a cache read command to read data from the flash memory chip; and if no, giving a general read command and the cache read command to read data from the flash memory chip. Accordingly, the method can effectively reduce time needed for executing the host read commands by using the cache read command to combine the host read commands which access continuous physical addresses and pre-read data stored in a next physical address.
    Type: Application
    Filed: June 12, 2012
    Publication date: October 4, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: CHIH-KANG YEH
  • Publication number: 20120254511
    Abstract: A memory storage device, a memory controller, and a data writing method are provided. The memory storage device has a rewritable non-volatile memory chip including a plurality of physical units, and each of the physical units has a plurality of physical pages. The data writing method includes configuring a plurality of logical units to be mapped to a portion of the physical units, and each of the logical unit has a plurality of logical pages. The data writing method also includes receiving a first write data from a host system and writing the first write data into the ith physical page in a substitute physical unit selected from the physical units. The data writing method further includes writing a first address access information corresponding to the first write data and a second address access information into the ith physical page. Herein i is a positive integer.
    Type: Application
    Filed: May 20, 2011
    Publication date: October 4, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 8275931
    Abstract: A block management method for a flash memory of a storage system is provided, wherein the flash memory includes a plurality of physical blocks. The block management method includes grouping the physical blocks into a plurality of physical units, and grouping the physical units into a data area, a spare area, and a replacement area. The block management method further includes performing a first physical unit switch which switches the physical units between the data area and the spare area, and performing a second physical unit switch which switches the physical units between the spare area and the replacement area. Therefore, the block management method can uniformly use the physical blocks and thereby effectively prolong a lifespan of the storage system.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: September 25, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Patent number: 8276033
    Abstract: A data writing method for a flash memory, and a flash memory controller and a flash memory storage apparatus using the same are provided. First, data is received from a host system. Next, the data is divided into at least one frame. Afterwards, an error checking and correcting (ECC) code corresponding to the frame is generated so as to form at least one ECC frame. Then, the ECC frame is divided into a plurality of frame segments. Finally, the frame segments are written into a flash memory chip according to a non-sequentially ranking order.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: September 25, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Fu Tseng, Yu-Hung Liu, Li-Chun Liang, Chih-Kang Yeh
  • Patent number: 8250292
    Abstract: A data writing method for writing data from a host system into a flash memory chip is provided. The method includes configuring a plurality of logical page addresses, grouping the logical page addresses into a plurality of logical blocks, and recording the data dispersion degree of each of the logical blocks. The method also includes receiving write-in data from the host system, identifying a logical block that a logical page address to be written by the host system belongs to, and writing the write-in data into the flash memory chip according to the data dispersion degree of the logical block, wherein the data dispersion degree of each of the logical blocks is not larger than a logical block data dispersion degree threshold value. Accordingly, the method can effectively reduce the time for executing a host write command.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: August 21, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh