Patents by Inventor Chih-Pin Hung

Chih-Pin Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit package substrate integrating with decoupling capacitor
    Patent number: 6430059
    Abstract: An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: August 6, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chih-Pin Hung, Jung-sheng Chiang
  • Integrated circuit pakage substrate integrating with decoupling capacitor
    Publication number: 20020024801
    Abstract: An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.
    Type: Application
    Filed: December 19, 2000
    Publication date: February 28, 2002
    Inventors: Chih-Pin Hung, Jung-Sheng Chiang