Patents by Inventor Chih-Ping Chen

Chih-Ping Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11889637
    Abstract: A display device is provided. The display device includes a device housing, a knob, a restriction unit and a screen panel. The knob is rotatably connected to the device housing, wherein the knob comprises a latch and a plurality of teeth, the knob is adapted to be rotated between a first knob location and a second knob location, and when the knob is in the first knob location, the latch protrudes from the device housing, and when the knob is in the second knob location, the latch is received in the device housing. The restriction unit is disposed in the device housing, wherein the restriction unit is adapted to be connected to one of the teeth to restrict the knob. The screen panel is detachably connected to the device housing. The display device can be easily detached from a display system.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: January 30, 2024
    Assignee: WISTRON CORP.
    Inventors: An-Hsiu Lee, Chih-Ping Chen, Yuan-Tai Chen, Chun-Hong Kuo
  • Publication number: 20230072830
    Abstract: A display device is provided. The display device includes a device housing, a knob, a restriction unit and a screen panel. The knob is rotatably connected to the device housing, wherein the knob comprises a latch and a plurality of teeth, the knob is adapted to be rotated between a first knob location and a second knob location, and when the knob is in the first knob location, the latch protrudes from the device housing, and when the knob is in the second knob location, the latch is received in the device housing. The restriction unit is disposed in the device housing, wherein the restriction unit is adapted to be connected to one of the teeth to restrict the knob. The screen panel is detachably connected to the device housing. The display device can be easily detached from a display system.
    Type: Application
    Filed: April 13, 2022
    Publication date: March 9, 2023
    Inventors: An-Hsiu LEE, Chih-Ping CHEN, Yuan-Tai CHEN, Chun-Hong KUO
  • Patent number: 10520698
    Abstract: A retractable virtual reality device includes a rear cover, a front cover, a first restraining component, a second restraining component, and a display module. The front cover is movably combined with the rear cover. The first restraining component is fixed on the front cover. The second restraining component is movably disposed on the rear cover and for restraining the first restraining component. The display module includes a sleeve, a lens, and a display. The sleeve is fixed on the rear cover. The lens is disposed on a side of the sleeve. The display is disposed on the front cover and movably combined with the other side of the sleeve. By cooperation of the first restraining component and the second restraining component, the display and the front cover are movable relative to the lens and the rear cover, which reduces an overall size of the virtual reality device for easy carry.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: December 31, 2019
    Assignee: Wistron Corporation
    Inventors: Chih-Ping Chen, Yung-Hung Teng, Cheng-Wei Lin
  • Publication number: 20180299640
    Abstract: A retractable virtual reality device includes a rear cover, a front cover, a first restraining component, a second restraining component, and a display module. The front cover is movably combined with the rear cover. The first restraining component is fixed on the front cover. The second restraining component is movably disposed on the rear cover and for restraining the first restraining component. The display module includes a sleeve, a lens, and a display. The sleeve is fixed on the rear cover. The lens is disposed on a side of the sleeve. The display is disposed on the front cover and movably combined with the other side of the sleeve. By cooperation of the first restraining component and the second restraining component, the display and the front cover are movable relative to the lens and the rear cover, which reduces an overall size of the virtual reality device for easy carry.
    Type: Application
    Filed: September 8, 2017
    Publication date: October 18, 2018
    Inventors: Chih-Ping Chen, Yung-Hung Teng, Cheng-Wei Lin
  • Patent number: 9788816
    Abstract: A fluid withdrawing, expelling and filtering apparatus includes a fluid container including a first chamber, a second chamber, and, a first through hole and a second through hole respectively disposed in communication between the first chamber and the second chamber, a filter device movable between a first position and a second position to open or close the second through hole of the fluid container and including a filter element mating with the first through hole, and a fluid withdrawing and expelling operator operable to withdraw and expel a fluid through the first chamber of the fluid container.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: October 17, 2017
    Assignees: Mackay Memorial Hospital, Shin Yan Sheno Precision Industrial Co., Ltd.
    Inventors: Schu-Rern Chen, Chih-Ping Chen, Ching-Kuei Lin
  • Patent number: 9741600
    Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: August 22, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Hsieh, Chung-chieh Hsu, Chian-kun Chan, Chih-Kuo Chang, Chih-Ping Chen, Hsu-Shui Liu, Kai Lo, Wei-ting Hsiao, Yung-Kai Lin
  • Publication number: 20160353586
    Abstract: A display device includes a case, a display panel received in the case and a lateral cover coupled to the case. The case includes a main body, an extension body extending from the main body and a frame extending from the main body. The main body and the extension body cooperatively define an opening between the main body and the extension body. The display panel is received between the main body and the frame via the opening. The display panel has a periphery surrounded by the main body and the frame. The lateral cover covers the opening and is coupled to the main body and the extension body.
    Type: Application
    Filed: June 30, 2015
    Publication date: December 1, 2016
    Inventors: FANG-WEI LUO, JEN-HUI OH, CHING-HUA TSAI, CHIH-PING CHEN, KUANG-LUNG LIN
  • Patent number: 9425077
    Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: August 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Hsieh, Yung-Kai Lin, Hsu-Shui Liu, Kai Lo, Chih-Ping Chen, Chian-Kun Chan, Chung-Chieh Hsu, Chih-Kuo Chang, Wei-Ting Hsiao
  • Patent number: 9419010
    Abstract: A plurality of semiconductor layers is etched to define a first plurality of stacks of active strips between a first plurality of trenches. A first memory layer is formed on side surfaces of active strips in the first plurality of trenches, and a first layer of conductive material is formed over the first memory layer. The first plurality of stacks is etched to define a second plurality of stacks of active strips between a second plurality of trenches of the plurality of semiconductor layers. A second memory layer is formed on side surfaces of active strips in the second plurality of trenches, and a second layer of conductive material is formed over the second memory layer. Channel regions of memory cells in the memory device are formed in active strips of the plurality of semiconductor layers in the second plurality of stacks.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: August 16, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Yen-Hao Shih, Chih-Ping Chen, Sheng-Chih Lai
  • Publication number: 20160091399
    Abstract: A fluid withdrawing, expelling and filtering apparatus includes a fluid container including a first chamber, a second chamber, and, a first through hole and a second through hole respectively disposed in communication between the first chamber and the second chamber, a filter device movable between a first position and a second position to open or close the second through hole of the fluid container and including a filter element mating with the first through hole, and a fluid withdrawing and expelling operator operable to withdraw and expel a fluid through the first chamber of the fluid container.
    Type: Application
    Filed: September 23, 2015
    Publication date: March 31, 2016
    Inventors: SCHU-RERN CHEN, CHIH-PING CHEN, CHING-KUEI LIN
  • Patent number: 9252156
    Abstract: A method of forming an interlayer conductor structure. The method includes forming a stack of semiconductor pads coupled to respective active layers for a circuit. The semiconductor pads include outside perimeters each having one side coupled to a respective active layer. Impurities are implanted along the outside perimeters to form outside lower resistance regions on the pads. Openings are then formed in the stack of the semiconductor pads to expose a landing area for interlayer conductors on a corresponding semiconductor pad and to define an inside perimeter on at least one of the semiconductor pads. Inside lower resistance regions are formed along the inside perimeters by implanting impurities for interlayer conductor contacts and configured to overlap and be continuous with the corresponding outside lower resistance region.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: February 2, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Yen-Hao Shih, Yi-Hsuan Hsiao, Chih-Ping Chen
  • Publication number: 20150243674
    Abstract: A plurality of layers of a first conductive material is etched to define a first plurality of stacks of conductive strips between a first plurality of trenches, where a stack has a width greater than two times a target width. A first memory layer is formed on side surfaces of conductive strips in the first plurality of trenches, and a first layer of a second conductive material is formed over the first memory layer. The first plurality of stacks is etched to define a second plurality of stacks of conductive strips between a second plurality of trenches, wherein a stack has a width equal to the target width. A second memory layer is formed on side surfaces of conductive strips in the second plurality of trenches, and a second layer of the second conductive material is formed over the second memory layer.
    Type: Application
    Filed: September 17, 2014
    Publication date: August 27, 2015
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: YEN-HAO SHIH, CHIH-PING CHEN, SHENG-CHIH LAI
  • Publication number: 20150171107
    Abstract: A method of forming an interlayer conductor structure. The method includes forming a stack of semiconductor pads coupled to respective active layers for a circuit. The semiconductor pads include outside perimeters each having one side coupled to a respective active layer. Impurities are implanted along the outside perimeters to form outside lower resistance regions on the pads. Openings are then formed in the stack of the semiconductor pads to expose a landing area for interlayer conductors on a corresponding semiconductor pad and to define an inside perimeter on at least one of the semiconductor pads. Inside lower resistance regions are formed along the inside perimeters by implanting impurities for interlayer conductor contacts and configured to overlap and be continuous with the corresponding outside lower resistance region.
    Type: Application
    Filed: February 26, 2015
    Publication date: June 18, 2015
    Applicant: Macronix International Co., Ltd.
    Inventors: Yen-Hao SHIH, Yi-Hsuan HSIAO, Chih-Ping CHEN
  • Patent number: 8987914
    Abstract: A method of forming an interlayer conductor structure. The method includes forming a stack of semiconductor pads coupled to respective active layers for a circuit. The semiconductor pads include outside perimeters each having one side coupled to a respective active layer. Impurities are implanted along the outside perimeters to form outside lower resistance regions on the pads. Openings are then formed in the stack of the semiconductor pads to expose a landing area for interlayer conductors on a corresponding semiconductor pad and to define an inside perimeter on at least one of the semiconductor pads. Inside lower resistance regions are formed along the inside perimeters by implanting impurities for interlayer conductor contacts and configured to overlap and be continuous with the corresponding outside lower resistance region.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: March 24, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Yen-Hao Shih, Yi-Hsuan Hsiao, Chih-Ping Chen
  • Patent number: 8907108
    Abstract: Disclosed is a p-type organic semiconductor material having the formula: Each Con is the same and consists of a conjugated oligomer. Each EW is the same and consists of an electron withdrawing group. The p-type organic semiconductor material can be applied in an active layer of an optoelectronic device, such as an organic solar cell, an organic light-emitting diode, or an organic thin-film transistor.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: December 9, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Ping Chen, Fang-Yuan Tsai, Chien-Tien Chen, Gue-Wuu Hwang
  • Publication number: 20140273505
    Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.
    Type: Application
    Filed: April 9, 2013
    Publication date: September 18, 2014
    Inventors: Chih-Chang HSIEH, Yung-Kai Lin, Hsu-Shui Liu, Kai Lo, Chih-Ping Chen, Chian-Kun Chan, Chung-Chieh Hsu, Chih-Kuo Chang, Wei-Ting Hsiao
  • Publication number: 20140217518
    Abstract: A method of forming an interlayer conductor structure. The method includes forming a stack of semiconductor pads coupled to respective active layers for a circuit. The semiconductor pads include outside perimeters each having one side coupled to a respective active layer. Impurities are implanted along the outside perimeters to form outside lower resistance regions on the pads. Openings are then formed in the stack of the semiconductor pads to expose a landing area for interlayer conductors on a corresponding semiconductor pad and to define an inside perimeter on at least one of the semiconductor pads. Inside lower resistance regions are formed along the inside perimeters by implanting impurities for interlayer conductor contacts and configured to overlap and be continuous with the corresponding outside lower resistance region.
    Type: Application
    Filed: May 31, 2013
    Publication date: August 7, 2014
    Inventors: Yen-Hao SHIH, Yi-Hsuan HSIAO, Chih-Ping CHEN
  • Patent number: 8764457
    Abstract: A circuit board device for fixing an electronic card, which is formed with at least one aperture, includes a circuit board and a securing member. The circuit board includes a board body formed with two through holes, and a socket connector provided on the board body for mating with the electronic card. The securing member includes a pressing plate for pressing against the electronic card, at least one engaging stud projecting from a bottom end of the pressing plate for engaging the aperture, and two resilient engaging arms provided respectively on left and right sides of the pressing plate. The engaging arms extend respectively through the through holes and engage releasably the board body.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: July 1, 2014
    Assignee: Wistron Corporation
    Inventors: Chih-Ping Chen, Ping-Yu Ko
  • Patent number: 8741448
    Abstract: Disclosed is a fullerene derivative having a formula of F-Cy, wherein F is an open-cage fullerene, and Cy is a chalcogenyl group. The fullerene derivative can be applied to hydrogen storage material and an optoelectronic device such as an organic light emitting diode (OLED), a solar cell, or an organic thin film transistor (TFT).
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: June 3, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Ping Chen, Yeu-Ding Chen, Shih-Ching Chuang, Yu-Wei Lin, Fu-Wei Chan
  • Publication number: 20140121386
    Abstract: Disclosed is a p-type organic semiconductor material having the formula: Each Con is the same and consists of a conjugated oligomer. Each EW is the same and consists of an electron withdrawing group. The p-type organic semiconductor material can be applied in an active layer of an optoelectronic device, such as an organic solar cell, an organic light-emitting diode, or an organic thin-film transistor.
    Type: Application
    Filed: April 26, 2013
    Publication date: May 1, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Ping CHEN, Fang-Yuan TSAI, Chien-Tien CHEN, Gue-Wuu HWANG