Abstract: A method of forming an interlayer conductor structure. The method includes forming a stack of semiconductor pads coupled to respective active layers for a circuit. The semiconductor pads include outside perimeters each having one side coupled to a respective active layer. Impurities are implanted along the outside perimeters to form outside lower resistance regions on the pads. Openings are then formed in the stack of the semiconductor pads to expose a landing area for interlayer conductors on a corresponding semiconductor pad and to define an inside perimeter on at least one of the semiconductor pads. Inside lower resistance regions are formed along the inside perimeters by implanting impurities for interlayer conductor contacts and configured to overlap and be continuous with the corresponding outside lower resistance region.

Abstract: Disclosed is a p-type organic semiconductor material having the formula: Each Con is the same and consists of a conjugated oligomer. Each EW is the same and consists of an electron withdrawing group. The p-type organic semiconductor material can be applied in an active layer of an optoelectronic device, such as an organic solar cell, an organic light-emitting diode, or an organic thin-film transistor.

Abstract: An apparatus and method for processing semiconductor substrates provides a substrate stage being a rotatable disc with a solid surface and a terraced edge with upper, intermediate and lower portions of increasing diameter. A hollow edge ring rests on the intermediate edge portion and a substrate disposed on the rotatable disc is lifted and transported by robot blades positioned beneath the edge ring and which lift the edge ring which holds the substrate around its edges. The rotatable disc and edge ring find application in MOCVD and other semiconductor manufacturing tools.

Abstract: A method of forming an interlayer conductor structure. The method includes forming a stack of semiconductor pads coupled to respective active layers for a circuit. The semiconductor pads include outside perimeters each having one side coupled to a respective active layer. Impurities are implanted along the outside perimeters to form outside lower resistance regions on the pads. Openings are then formed in the stack of the semiconductor pads to expose a landing area for interlayer conductors on a corresponding semiconductor pad and to define an inside perimeter on at least one of the semiconductor pads. Inside lower resistance regions are formed along the inside perimeters by implanting impurities for interlayer conductor contacts and configured to overlap and be continuous with the corresponding outside lower resistance region.

Abstract: A circuit board device for fixing an electronic card, which is formed with at least one aperture, includes a circuit board and a securing member. The circuit board includes a board body formed with two through holes, and a socket connector provided on the board body for mating with the electronic card. The securing member includes a pressing plate for pressing against the electronic card, at least one engaging stud projecting from a bottom end of the pressing plate for engaging the aperture, and two resilient engaging arms provided respectively on left and right sides of the pressing plate. The engaging arms extend respectively through the through holes and engage releasably the board body.

Abstract: Disclosed is a fullerene derivative having a formula of F-Cy, wherein F is an open-cage fullerene, and Cy is a chalcogenyl group. The fullerene derivative can be applied to hydrogen storage material and an optoelectronic device such as an organic light emitting diode (OLED), a solar cell, or an organic thin film transistor (TFT).

Abstract: Disclosed is a p-type organic semiconductor material having the formula: Each Con is the same and consists of a conjugated oligomer. Each EW is the same and consists of an electron withdrawing group. The p-type organic semiconductor material can be applied in an active layer of an optoelectronic device, such as an organic solar cell, an organic light-emitting diode, or an organic thin-film transistor.

Abstract: A voltage regulator with a low quiescent current is provided. The voltage regulator includes a pulse voltage generating unit, a first switch unit, a regulating unit and a power output unit. The pulse voltage generating unit receives an input voltage to provide an intermittent signal with a predetermined period, and output a pulse voltage according to the intermittent signal. The first switch unit is turned on according to the intermittent signal. The regulating unit converts the pulse voltage into a continuous voltage. The power output unit receives the continuous voltage to output a voltage power through a power output terminal. And, the power output unit detects an output current of the power output terminal to adjust current drive capability of the power output unit dynamically. Thus, the pulse voltage generating unit consumes power while the intermittent signal is enabled, so as to achieve the power saving effect.

Abstract: A housing is usable for positioning selectively a first electronic card having a first locking hole and a second electronic card having a second locking hole, and includes a base plate, a connector for mating with the selected one of the first and second electronic cards, and a movable element including a lever body that has an end portion connected pivotally to the base plate and a third locking hole opposite to the end portion. The lever body is operable to move the third locking hole between a first position, where the third locking hole is aligned with the first locking hole to cooperatively receive a fastener for fastening one of the first and second electronic cards, and a second position, where the third locking hole is aligned with the second locking hole to cooperatively receive the fastener for fastening the other one of the first and second electronic cards.

Abstract: A memory device includes an array of dielectric charge trapping structures memory cells including word lines and bit lines. Control circuitry is coupled to the array arranged to control read, program and erase operations. A controller is arranged with supporting circuitry thermally annealing charge trapping structures in the memory cells in the array. Word line drivers and word line termination circuits can be used to induce current flow on the word lines to induce heat for the annealing. The thermal annealing can be applied interleaved with normal operations for recover from cycling damage. Also, the thermally annealing can be applied during mission functions like erase, to improve performance of the function.

Abstract: A button mechanism includes a casing. A lock hole and an engaging portion are formed and disposed on a bottom of the casing, and a plurality of open slots is formed on a lateral wall of the casing. The button mechanism further includes a plurality of buttons respectively disposed on the corresponding open slots, a fixing component, and a supporting component. An end of the supporting component is engaged with the engaging portion. The supporting component includes a first part whereon a piercing hole is formed. The fixing component pierces through the piercing hole and the lock hole to fix the first part on the bottom of the casing. The supporting component further includes a second part connected to the first part and contacting against the plurality of first buttons for constraining movements of the plurality of buttons relative to the casing.

Abstract: A circuit board device for fixing an electronic card, which is formed with at least one aperture, includes a circuit board and a securing member. The circuit board includes a board body formed with two through holes, and a socket connector provided on the board body for mating with the electronic card. The securing member includes a pressing plate for pressing against the electronic card, at least one engaging stud projecting from a bottom end of the pressing plate for engaging the aperture, and two resilient engaging arms provided respectively on left and right sides of the pressing plate. The engaging arms extend respectively through the through holes and engage releasably the board body.

Abstract: An image scanner and a method for compensating image data are provided. By using both the X-axis calibration gain and the Y-axis calibration gain, the processing time period for compensating image data is reduced. In addition, no initial calibration and no warm-up calibration are required.

Abstract: A voltage regulator with a low quiescent current is provided. The voltage regulator includes a pulse voltage generating unit, a first switch unit, a regulating unit and a power output unit. The pulse voltage generating unit receives an input voltage to provide an intermittent signal with a predetermined period, and output a pulse voltage according to the intermittent signal. The first switch unit is turned on according to the intermittent signal. The regulating unit converts the pulse voltage into a continuous voltage. The power output unit receives the continuous voltage to output a voltage power through a power output terminal. And, the power output unit detects an output current of the power output terminal to adjust current drive capability of the power output unit dynamically. Thus, the pulse voltage generating unit consumes power while the intermittent signal is enabled, so as to achieve the power saving effect.

Abstract: A method for operating a semiconductor structure is provided. The semiconductor structure comprises a substrate, a first stacked structure, a dielectric element, a conductive line, a first conductive island and a second conductive island. The first stacked structure is formed on the substrate. The first stacked structure comprises first conductive strips and first insulating strips stacked alternately. The first conductive strips are separated from each other by the first insulating strips. The dielectric element is formed on the first stacked structure. The conductive line is formed on the dielectric element. The first conductive island and the second conductive island on opposite sidewalls of the first stacked structure are separated from each other. The method for operating the semiconductor structure comprises respectively applying a first voltage to the first conductive island and applying a second voltage to the second conductive island.

Abstract: Disclosed is a fullerene derivative having a formula of F-Cy, wherein F is an open-cage fullerene, and Cy is a chalcogenyl group. The fullerene derivative can be applied to hydrogen storage material and an optoelectronic device such as an organic light emitting diode (OLED), a solar cell, or an organic thin film transistor (TFT).

Abstract: A memory device includes an array of dielectric charge trapping structures memory cells including word lines and bit lines. Control circuitry is coupled to the array arranged to control read, program and erase operations. A controller is arranged with supporting circuitry thermally annealing charge trapping structures in the memory cells in the array. Word line drivers and word line termination circuits can be used to induce current flow on the word lines to induce heat for the annealing. The thermal annealing can be applied interleaved with normal operations for recover from cycling damage. Also, the thermally annealing can be applied during mission functions like erase, to improve performance of the function.

Abstract: A housing is usable for positioning selectively a first electronic card having a first locking hole and a second electronic card having a second locking hole, and includes a base plate, a connector for mating with the selected one of the first and second electronic cards, and a movable element including a lever body that has an end portion connected pivotally to the base plate and a third locking hole opposite to the end portion. The lever body is operable to move the third locking hole between a first position, where the third locking hole is aligned with the first locking hole to cooperatively receive a fastener for fastening one of the first and second electronic cards, and a second position, where the third locking hole is aligned with the second locking hole to cooperatively receive the fastener for fastening the other one of the first and second electronic cards.

Abstract: For detecting line short defects in a display panel, a driving circuit has a plurality of shift registers, a plurality of diode modules, and at least one power supply. Each shift register has an output port for outputting a driving signal sequentially. The diode modules are coupled to the output ports of the shift registers accordingly. The power supply is coupled to the diode modules and forward biases the diode modules to bypass the shift registers during at least a part of a period of detecting line short defects.

Abstract: The present invention discloses a soluble polythiophene derivative containing highly coplanar repeating units. The coplanar characteristic of the TPT (thiophene-phenylene -thiophene) units improves the degree of intramolecular conjugation and intermolecular ?-? interaction. The polythiophene derivative exhibits good carrier mobility and is suitable for use in optoelectronic devices such as organic thin film transistors (OTFTs), organic light-emitting diodes (OLEDs), and organic solar cells (OSCs).