Abstract: The present invention discloses a soluble polythiophene derivative containing highly coplanar repeating units. The coplanar characteristic of the TPT (thiophene-phenylene-thiophene) units improves the degree of intramolecular conjugation and intermolecular ?-? interaction. The polythiophene derivative exhibits good carrier mobility and is suitable for use in optoelectronic devices such as organic thin film transistors (OTFTs), organic light-emitting diodes (OLEDs), and organic solar cells (OSCs).

Abstract: A storing mechanism suitable for being disposed in an electronic device is provided, which is used to store a first hard disk with a first thickness or a second hard disk with a second thickness. The storing mechanism includes a first module, a second module and a restoring element. The first module includes a base and a lever. The lever having a leaned portion is pivoted to the base. Additionally, the second module includes a tray and a slide. The tray is glidingly disposed on the base, and has a stopper for being limited to the leaned portion, so as to limit the shift of the tray relative to the base. The slide is glidingly disposed on the tray. Moreover, the restoring element is disposed between the base and the tray for making the delocalized tray move back to the original location.

Abstract: A method and apparatus stores data representing a non 1:1 memory access interleaving ratio for accessing a plurality of memories. The method and apparatus interleaves memory accesses to at least either a first memory that is accessible via a first (and associated memory) bus having first characteristics or a second memory accessible via a second bus having different characteristics, based on the data representing the non 1:1 interleaving memory access ratio.

Abstract: A method for debugging a program includes identifying a thread in an unsafe state during a breakpoint. The thread is allowed to continue execution until it reaches a safe state while preventing other threads from executing. According to one aspect of the invention, the thread is in the unsafe state when the thread is executing code to access sharable memory and the sharable memory is in transition. Other embodiments are described and claimed.

Abstract: A method for forming a semiconductor device includes placing a Si substrate and an Sc2O3 powder source in an oxide chamber, and vaporizing the Sc2O3 powder source in the oxide chamber so as to form a single crystal Sc2O3 film on the Si substrate through electron beam evaporation techniques.

Abstract: A storing mechanism suitable for being disposed in an electronic device is provided, which is used to store a first hard disk with a first thickness or a second hard disk with a second thickness. The storing mechanism includes a first module, a second module and a restoring element. The first module includes a base and a lever. The lever having a leaned portion is pivoted to the base. Additionally, the second module includes a tray and a slide. The tray is glidingly disposed on the base, and has a stopper for being limited to the leaned portion, so as to limit the shift of the tray relative to the base. The slide is glidingly disposed on the tray. Moreover, the restoring element is disposed between the base and the tray for making the delocalized tray move back to the original location.

Abstract: Provided are a method, system, and article of manufacture, wherein a first application requests an operating system to monitor a memory address, and wherein the operating system generates a signal in response to an operation that affects the memory address. A second application receives the generated signal. The second application determines whether to forward the signal to the first application. The first application processes the signal, in response to the signal being forwarded by the second application.

Abstract: An image scanner and a method for compensating image data are provided. By using both the X-axis calibration gain and the Y-axis calibration gain, the processing time period for compensating image data is reduced. In addition, no initial calibration and no warm-up calibration are required.

Abstract: A method for forming a semiconductor device includes placing a Si substrate and an Sc2O3 powder source in an oxide chamber, and vaporizing the Sc2O3 powder source in the oxide chamber so as to form a single crystal Sc2O3 film on the Si substrate through electron beam evaporation techniques.

Abstract: In the manufacturing of VLSI circuits, production of overlay is a critical step. To obtain a higher resolution and alignment accuracy in microlithographic process, overlay errors must be measured so that overlay errors can be reduced to a tolerable level. This invention provides an overlay error model and a sampling strategy. Utilizing the overlay model and sampling strategy, a device for measuring overlay errors is also designed.

Abstract: The current invention provides a method for analyzing process variations that occur during integrated circuit fabrication. Critical dimension data is collected for each layer of the integrated circuit fabrication process for a period of time and a shift indicator that indicates variation in the critical dimension data for each layer of the integrated circuit fabrication process is calculated. A machine drift significance indicator is also calculated for each machine used in each layer of the integrated circuit fabrication process, and a maximum shift of mean value for each layer of the integrated circuit fabrication process is defined. The shift indicator, the maximum shift of mean value and the machine drift significance indicator are used to determine at least one likely cause of variation in critical dimension for each layer of the integrated circuit fabrication process.

Abstract: A method of fabricating a read only memory. After forming bit lines and word lines in a substrate, a coding process is performed. A photoresist layer is formed on the substrate while performing the coding process. The photoresist layer covering a part of a first channel region under the word line is exposed, and then the photoresist layer covering a part of a second channel region under the word lines is exposed. A development step is performed to remove the photoresist layer that has been exposed. Using the remaining photoresist layer as a mask to perform an ion implantation, a coding area is formed in the first channel region and the second channel region. The photoresist layer is removed.

Abstract: A method of fabricating a read only memory. After forming bit lines and word lines in a substrate, a coding process is performed. A photoresist layer is formed on the substrate while performing the coding process. The photoresist layer covering a part of a first channel region under the word line is exposed, and then the photoresist layer covering a part of a second channel region under the word lines is exposed. A development step is performed to remove the photoresist layer that has been exposed. Using the remaining photoresist layer as a mask to perform an ion implantation, a coding area is formed in the first channel region and the second channel region. The photoresist layer is removed.

Abstract: In the manufacturing of VLSI circuits, production of overlay is a critical step. To obtain a higher resolution and alignment accuracy in microlithographic process, overlay errors must be measured so that overlay errors can be reduced to a tolerable level. This invention provides an overlay error model and a sampling strategy. Utilizing the overlay model and sampling strategy, a device for measuring overlay errors is also designed.

Abstract: Conventionally, efforts to improve the yield of chips produced on a wafer focused on defect reduction. Another approach is optimizing wafer exposure patterns. The present invention includes a computer-based procedure and apparatus to expose cells on the surface of a wafer so as to maximize the number of dies produced from a wafer. The invention is useful in the exposure of six and eight inch wafers, as well as larger wafers.