Patents by Inventor Chih (Rex) Hsueh

Chih (Rex) Hsueh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12368046
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary method of forming a semiconductor device comprises receiving a structure including a substrate and a first hard mask over the substrate, the first hard mask having at least two separate portions; forming spacers along sidewalls of the at least two portions of the first hard mask with a space between the spacers; forming a second hard mask in the space; forming a first cut in the at least two portions of the first hard mask; forming a second cut in the second hard mask; and depositing a cut hard mask in the first cut and the second cut.
    Type: Grant
    Filed: December 18, 2023
    Date of Patent: July 22, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsi-Wen Tien, Wei-Hao Liao, Pin-Ren Dai, Chih Wei Lu, Chung-Ju Lee
  • Patent number: 12369474
    Abstract: An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk, the display may include active and/or passive leakage-mitigating structures. The passive leakage-mitigating structures may have an undercut that causes discontinuities in the overlying OLED layers. Active leakage-mitigating structures may include a conductive layer (e.g., a conductive ring) that drains leakage current to ground. Alternatively, the active leakage-mitigating structures may include a gate electrode modulator with a variable voltage that stops the current flow laterally.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: July 22, 2025
    Assignee: Apple Inc.
    Inventors: Po-Chun Yeh, Jiun-Jye Chang, Doh-Hyoung Lee, Caleb Coburn, Niva A. Ran, Ching-Sang Chuang, Themistoklis Afentakis, Chuan-Jung Lin, Jung Yen Huang, Shinya Ono, Ting-Kuo Chang, Shih Chang Chang, Chih-Hung Yu, Chia-Yu Chen, Yung Fong Kao, Shih Lun Huang, Xingfeng He, Chieh-Wei Chen, Lei Yuan, Gwanwoo Park
  • Patent number: 12369173
    Abstract: A method and apparatus are disclosed from the perspective of a first device. In one embodiment, the method includes the first device performs sensing on a data resource pool, and the first device selects/derives at least a first data resource from the data resource pool based on the sensing result of the data resource pool. The method further includes the first device transmits a first control information on a first control resource, wherein the first control information allocates or indicates the first data resource. The method also includes the first device performs a first data transmission on the first data resource to at least one second device.
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: July 22, 2025
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Li-Chih Tseng, Wei-Yu Chen, Li-Te Pan
  • Patent number: 12366339
    Abstract: A vehicle light device includes an optical lens and a light-emitting unit. The optical lens includes first light exit and entry lens portions, second light entry and exit lens portions connected respectively to upper and lower portions of the first light exit lens portion. The first and second light exit lens portions have respectively first and second light exit surfaces facing forwardly. The light-emitting unit includes first and second light emitting modules configured to emit first and second light rays, which travel toward the first and second light exit lens portions upon entering the first and second light entry lens portions, and which exit outwardly of the first and second light exit surfaces, respectively, toward the first and second light entry lens portions.
    Type: Grant
    Filed: May 9, 2024
    Date of Patent: July 22, 2025
    Assignee: T.Y.C. BROTHER INDUSTRIAL CO., LTD.
    Inventor: Ming-Chih Shih
  • Patent number: 12366886
    Abstract: An electronic device includes an input unit and a transmission dock. The transmission dock is pivotally connected to the input unit, and includes at least one pivotal concave portion, a first wall, a second wall and a third wall. The at least one pivotal concave portion has a first sidewall and a second sidewall opposite to each other. The first wall is connected to the first sidewall and the second sidewall. The second wall is connected to the first sidewall and the second sidewall. The third wall is connected to the first sidewall and the second sidewall. The first wall and the second wall are connected to two opposite sides of the third wall, respectively. An inner surface of the third wall forms a sloped surface toward each of the first sidewall and the second sidewall, and each of the sloped surfaces has an opening at an end thereof.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: July 22, 2025
    Assignee: Getac Technology Corporation
    Inventors: Wan-Lin Hsu, Juei-Chi Chang, Hsin-Chih Chou
  • Patent number: 12366938
    Abstract: An electronic apparatus including a touch display panel and a driver circuit is provided. The touch display panel includes a plurality of first electrodes and at least one second electrode. The plurality of first electrodes are arranged in an active area of the touch display panel, and the at least one second electrode is arranged in a border area of the touch display panel. The driver circuit is coupled to the touch display panel. The driver circuit is configured to drive the plurality of first electrodes to perform a touch sensing operation in a first period. The driver circuit is configured to drive the plurality of first electrodes and the at least one second electrode to perform a gesture sensing operation in a second period.
    Type: Grant
    Filed: April 7, 2024
    Date of Patent: July 22, 2025
    Assignee: Novatek Mircoelectronics Corp.
    Inventors: Yi-Ying Lin, Chih-Chang Lai
  • Patent number: 12369188
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a first user equipment (UE) may determine, within a channel occupancy time shared with a second UE, one or more contention slot starting times based at least in part on a listen before talk duration and an automatic gain control duration. The first UE may transmit a sidelink communication to the second UE at a starting time selected from one or more of the one or more contention slot starting times. Numerous other aspects are provided.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: July 22, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Changlong Xu, Jing Sun, Xiaoxia Zhang, Yisheng Xue, Chih-Hao Liu, Ozcan Ozturk
  • Patent number: 12369022
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive, from a network node, a network assistant information (NAI) message identifying a set of characteristics of a network connection. The UE may communicate with the network node using a communication configuration associated with the set of characteristics of the network connection. Numerous other aspects are described.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: July 22, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Kai-Chun Cheng, Jen-Chun Chang, Kuhn-Chang Lin, Wen-Hsin Hsia, Chia-Jou Lu, Sheng-Chih Wang, Chenghsin Lin, Yu-Chieh Huang, Chun-Hsiang Chiu, ChihHung Hsieh, Chung Wei Lin, Leong Yeong Choo
  • Patent number: 12367932
    Abstract: A memory device includes a column of at least three memory cells and a source line coupled to the source terminal of each memory cell. A source line driver is coupled to the source line, a voltage terminal, and a program voltage source and is switchable between a program operation, an erase operation, and a read operation.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Der Chih, Cheng-Hsiung Kuo, Chung-Chieh Chen
  • Patent number: 12369276
    Abstract: A storage assembly includes a heat dissipation device and a storage. The heat dissipation device includes a thermally conductive block, a heat sink and a plurality of heat pipes. An end of each of the heat pipes is thermally coupled with the thermally conductive block, and another end of each of the heat pipes is thermally coupled with the heat sink. The storage is thermally coupled with the thermally conductive block.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: July 22, 2025
    Assignee: COOLER MASTER CO., LTD.
    Inventors: Bo-Zhang Chen, Jen-Chih Cheng
  • Patent number: 12369369
    Abstract: A device includes a first vertical stack of nanostructures over a substrate, a second vertical stack of nanostructures over the substrate, a wall structure between and in direct contact with the first and second vertical stacks, a gate structure wrapping around three sides of the nanostructures and a source/drain region beside the first vertical stack of nanostructures.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Cheng Chiang, Shi Ning Ju, Guan-Lin Chen, Chia-Hao Chang, Chih-Hao Wang
  • Patent number: 12369400
    Abstract: An electronic device includes a panel with an operation region and an extended circuit region. The panel includes a first substrate and a first polarizing element. The first polarizing element is disposed on the first substrate. The first substrate extends from the operation region to the extended circuit region, and the first polarizing element extends from the operation region to the extended circuit region.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: July 22, 2025
    Assignee: InnoLux Corporation
    Inventors: Yu-Chih Tseng, Yi Tung, Pi-Ying Chuang, Kuo-Shun Tsai, Chu-Hong Lai
  • Patent number: 12369390
    Abstract: A semiconductor structure and a method for forming the same are provided. The method includes forming a first protruding structure and a second protruding structure over a substrate, and forming a first insulation material layer on the first protruding structure and the second protruding structure. The method includes performing a pre-treatment process on the first insulation material layer to form a first treated insulation material layer, and forming a second insulation material layer on the first treated insulation material layer. The method includes performing a first insulation material conversion process on the first treated insulation material layer and the second insulation material layer. The first protruding structure and the second protruding structure are bent toward opposite directions during the first insulation material conversion process.
    Type: Grant
    Filed: October 13, 2023
    Date of Patent: July 22, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Han-Pin Chung, Chih-Tang Peng, Tien-I Bao
  • Patent number: 12366004
    Abstract: A semiconductor apparatus for pre-wetting a semiconductor workpiece includes a process chamber, a workpiece holder disposed within the process chamber to hold the semiconductor workpiece, a pre-wetting fluid tank disposed outside the process chamber and containing a pre-wetting fluid, and a conduit coupled to the pre-wetting fluid tank and extending into the process chamber. The conduit delivers the pre-wetting fluid from the pre-wetting fluid tank out through an outlet of the conduit to wet a major surface of the semiconductor workpiece, wherein the outlet of the conduit is positioned above the major surface of the semiconductor workpiece by a vertical distance.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Yu Tsai, Ku-Feng Yang, Wen-Chih Chiou
  • Patent number: 12368390
    Abstract: A power converter is provided. The power converter includes first to fourth switches electrically connected in series, a flying capacitor and a controller. Positive and negative terminals of the flying capacitor are electrically connected to the second and third switches respectively. The controller operates the first and fourth switches to perform a first complementary switching with a first dead time, and operates the second and third switches to perform a second complementary switching with a second dead time. The controller determines to regulate the first or second dead time by detecting a capacitor voltage of the flying capacitor, such that the capacitor voltage of the flying capacitor is maintained within a balance voltage range.
    Type: Grant
    Filed: August 10, 2023
    Date of Patent: July 22, 2025
    Assignee: Delta Electronics, Inc.
    Inventors: Hsin-Chih Chen, Li-Hung Wang, Chao-Li Kao, Yi-Ping Hsieh, Hung-Chieh Lin
  • Patent number: 12369090
    Abstract: A user device capable of receiving a full configuration related to a radio connection to a base station and a delta configuration which the user device can apply to a first configuration received previously (i) receives, from the base station while the user device is operating in a cell covered by the base station using the first configuration, the full configuration providing information for user device operation within a candidate cell (1404), (ii) determines whether a set of one or more conditions associated with the full configuration to the candidate cell is satisfied (1406), and (iii) connects to the candidate cell using the full configuration if the user device determines that the set of conditions is satisfied (1410).
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: July 22, 2025
    Assignee: GOOGLE LLC
    Inventor: Chih-Hsiang Wu
  • Patent number: 12369366
    Abstract: A device includes a substrate, a first semiconductor fin over the substrate extending in a first lateral direction, a first vertical stack of semiconductor nanosheets over the substrate extending in the first lateral direction, and an inactive fin between the first semiconductor fin and the first vertical stack extending in the first lateral direction. A first gate structure surrounds and covers the first semiconductor fin, and extends in a second lateral direction substantially perpendicular to the first lateral direction. A second gate structure surrounds and covers the first vertical stack, and extends in the second lateral direction.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuan-Ting Pan, Kuo-Cheng Chiang, Shi Ning Ju, Yi-Ruei Jhan, Yen-Ming Chen, Chih-Hao Wang
  • Patent number: 12368444
    Abstract: Systems and methods are provided for a phase locked loop. A phase/frequency detector is configured to receive a reference signal and a feedback signal. A charge pump is configured to receive outputs from the phase/frequency detector and to generate pulses. An oscillator is configured to generate an output waveform based on the charge pump pulses. A realignment path is configured to generate a clock realignment signal that is provided to the oscillator based on the outputs from the phase/frequency detector.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Hsien Tsai, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
  • Patent number: 12369431
    Abstract: A semiconductor structure includes a substrate, an adhesion layer, arranged on the substrate, a first release layer, arranged on the adhesion layer and a first semiconductor device, including a semiconductor epitaxial stack, and a conducting structure directly connected to the first release layer. The first semiconductor device is not electrically connected to the substrate by the adhesion layer and the first release layer.
    Type: Grant
    Filed: February 13, 2024
    Date of Patent: July 22, 2025
    Assignee: EPISTAR CORPORATION
    Inventors: Hao-Min Ku, You-Hsien Chang, Shih-I Chen, Fu-Chun Tsai, Hsin-Chih Chiu
  • Patent number: D1085085
    Type: Grant
    Filed: January 22, 2024
    Date of Patent: July 22, 2025
    Assignee: Acer Incorporated
    Inventors: Cheng-Han Lin, Pao-Ching Huang, Kai-Teng Cheng, Hsueh-Chih Peng