Patents by Inventor Chih-Tsung Shih

Chih-Tsung Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960116
    Abstract: A structure includes a first waveguide and a second waveguide. The first waveguide includes a first strip portion and a first tapered tip portion connected to the first strip portion. The second waveguide includes a second strip portion and a second tapered tip portion connected to the second strip portion, wherein the first tapered tip portion of the first waveguide is optically coupled to the second tapered tip portion of the second waveguide, and the first waveguide and the second waveguide are configured to guide a light. In a region where the light is coupled between the first tapered tip portion and the second tapered tip portion, an effective refractive index of the first waveguide with respect to the light is substantially equal to an effective refractive index of the second waveguide with respect to the light.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Chewn-Pu Jou, Felix Ying-Kit Tsui, Stefan Rusu
  • Patent number: 11953052
    Abstract: A fastener is adapted for assembling a first housing to a second housing. The first housing is provided with a protruding portion and a buckling portion, and the second housing has a first surface, a second surface, and a through hole. The fastener includes a first portion, at least one connecting portion, at least two elastic portions, and a second portion. The first portion movably abuts against the first surface and has a first opening. The connecting portion is accommodated in the through hole. One end of the connecting portion is connected to the first portion. The connecting portion is spaced apart from an inner edge of the second housing by a gap. The two elastic portions inclinedly extend into the first opening. The second portion movably abuts against the second surface and is disposed at the another end of the connecting portion.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Jian-Hua Chen, Po-Tsung Shih, Yu-Wei Lin, Ming-Hua Ho, Chih-Hao Wu
  • Patent number: 11940727
    Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.
    Type: Grant
    Filed: March 27, 2023
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Tsung Chuan Lee, Hao-Shiang Chang
  • Publication number: 20240088309
    Abstract: A semiconductor device is provided. The semiconductor device includes a waveguide over a first dielectric layer. A first portion of the waveguide has a first width and a second portion of the waveguide has a second width larger than the first width. The semiconductor device includes a first doped semiconductor structure and a second doped semiconductor structure. The second portion of the waveguide is between the first doped semiconductor structure and the second doped semiconductor structure.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Chih-Tsung SHIH, Felix TSUI, Stefan RUSU, Chewn-Pu JOU, Hau-Yan LU
  • Patent number: 11908765
    Abstract: A semiconductor structure includes a semiconductor substrate, a semiconductor device and a heating structure. The semiconductor substrate includes a device region and a heating region surrounding the device region. The semiconductor device is located on the device region. The heating structure is located on the heating region and includes an intrinsic semiconductor area, at least one heating element and at least one heating pad. The intrinsic semiconductor area is surrounding the semiconductor device. The at least one heating element is located at a periphery of the intrinsic semiconductor area. The at least one heating pad is joined with the at least one heating element, wherein the at least one heating pad includes a plurality of contact structures, and a voltage is supplied from the plurality of contact structures to control a temperature of the at least one heating element.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Chewn-Pu Jou, Stefan Rusu, Feng-Wei Kuo
  • Publication number: 20240047597
    Abstract: A photodetection device and a manufacturing method are provided. The photodetection device includes an absorption structure, a cathode, a charge multiplication region and an anode. The absorption structure is formed in a recess at a surface region of a semiconductor substrate, and configured to receive an incident light. The cathode is formed on a top surface of the absorption structure, and has a first conductive type. The charge multiplication layer is in lateral contact with the absorption structure, and is an intrinsic portion of the semiconductor substrate extending into the semiconductor substrate from a topmost surface of the semiconductor substrate. The anode is in lateral contact with the charge multiplication layer from a side of the charge multiplication region away from the absorption structure, and is a doped region in the semiconductor substrate having a second conductive type complementary to the first conductive type.
    Type: Application
    Filed: October 20, 2023
    Publication date: February 8, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Felix yingkit Tsui, Stefan Rusu, Chewn-Pu Jou
  • Publication number: 20240045141
    Abstract: A semiconductor structure includes a substrate, a grating coupler structure over the substrate, a multi-layers film structure over the grating coupler structure. The multi-layers film structure include a first layer including a first refractive index, a second layer over the first layer and including a second refractive index and a third layer over the second layer and including a third refractive index. The second refractive index is greater than the first refractive index and is greater than the third refractive index of the third layer, and a thickness of each layer of the multi-layers film structure is within a range from ?/4 to ?2, ? is a wavelength of light.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Inventors: CHIH-TSUNG SHIH, WEI-KANG LIU, SUI-YING HSU, JING-HWANG YANG, YINGKIT FELIX TSUI
  • Publication number: 20240045240
    Abstract: A method includes receiving a silicon substrate; forming a first doped region and a second doped region in the silicon substrate; forming a third doped region and fourth doped region on upper portions of the first doped region and the second doped region, respectively; and patterning the silicon substrate to form an optical modulator. The optical modulator includes: a first section; a second section and a third section at least formed from the first and second doped regions, respectively; a fourth section, including a first height less than that of the first section and the second section and arranged between the first section and the second section, the fourth section being an undoped region; and a fifth section immediately adjacent to the fourth section, the fifth section including a height less than that of the first section and the second section and different from the first height.
    Type: Application
    Filed: August 2, 2022
    Publication date: February 8, 2024
    Inventors: CHIH-TSUNG SHIH, FENG YUAN, WEI-KANG LIU, YINGKIT FELIX TSUI
  • Publication number: 20240045143
    Abstract: An optical waveguide structure of a semiconductor photonic device includes a first semiconductor waveguide, a second semiconductor waveguide, and an air seam between the first and second semiconductor waveguides. The semiconductor waveguides extend in a first direction, and a plurality of air seams extend in a second direction. Each of the air seams is disposed between two adjacent semiconductor waveguides. A distance between the two adjacent semiconductor waveguides is less than a width of each semiconductor waveguide.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Inventors: CHIH-TSUNG SHIH, HAU-YAN LU, WEI-KANG LIU, YINGKIT FELIX TSUI
  • Publication number: 20240019639
    Abstract: An edge coupler, a waveguide structure and a method for forming a waveguide structure are provided. The edge coupler includes a substrate, a first cladding layer, a core layer and a first anti-reflection coating layer. The first cladding layer has a second sidewall aligned with a first sidewall of the substrate. The core layer has a third sidewall aligned with the second sidewall. The anti-reflection coating layer lines the first sidewall, the second sidewall and the third sidewall. A thickness of the anti-reflection coating layer varies along the first sidewall, the second sidewall and the third sidewall.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Inventors: WEI-KANG LIU, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
  • Publication number: 20240012199
    Abstract: Some implementations described herein include a photonics integrated circuit device including a photonics structure. The photonics structure includes a waveguide structure and an optical attenuator structure. In some implementation, the optical attenuator structure is formed on an end region of the waveguide structure and includes a metal material or a doped material. In some implementations, the optical attenuator structure includes a gaussian doping profile within a portion of the waveguide structure. The optical attenuator structure may absorb electromagnetic waves at the end of the waveguide structure with an efficiency that is improved relative to a spiral optical attenuator structure or metal cap optical attenuator structure.
    Type: Application
    Filed: July 8, 2022
    Publication date: January 11, 2024
    Inventors: Wei-kang LIU, Chih-Tsung SHIH, Hau-Yan LU, YingKit Felix TSUI, Lee-Shian JENG
  • Patent number: 11869991
    Abstract: A semiconductor device is provided. The semiconductor device includes a waveguide over a first dielectric layer. A first portion of the waveguide has a first width and a second portion of the waveguide has a second width larger than the first width. The semiconductor device includes a first doped semiconductor structure and a second doped semiconductor structure. The second portion of the waveguide is between the first doped semiconductor structure and the second doped semiconductor structure.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: January 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Chih-Tsung Shih, Hau-Yan Lu, Felix Tsui, Stefan Rusu, Chewn-Pu Jou
  • Publication number: 20240004131
    Abstract: A semiconductor structure includes a waveguide and an optical attenuator. The waveguide is disposed over an insulating layer and configured to guide light. The optical attenuator is connected to the waveguide. The optical attenuator has a first surface and a second surface opposite the first surface, and a cross-sectional width of the optical attenuator decreases from the first surface to the second surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Inventors: WEI-KANG LIU, LEE-SHIAN JENG, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
  • Publication number: 20230387334
    Abstract: A method for manufacturing an integrated circuit device is provided. The method includes: providing a photonic structure including an insulating structure and an optical coupler embedded in the insulating structure; and removing a portion of the insulating structure to expose a coupling surface of the optical coupler and form a light reflective structure corresponding to the coupling surface.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: WEI-KANG LIU, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
  • Publication number: 20230384663
    Abstract: A lithography mask includes a substrate that contains a low thermal expansion material (LTEM). The lithography mask also includes a reflective structure disposed over the substrate. The reflective structure includes a first layer and a second layer disposed over the first layer. At least the second layer is porous. The mask is formed by forming a multilayer reflective structure over the LTEM substrate, including forming a plurality of repeating film pairs, where each film pair includes a first layer and a porous second layer. A capping layer is formed over the multilayer reflective structure. An absorber layer is formed over the capping layer.
    Type: Application
    Filed: August 7, 2023
    Publication date: November 30, 2023
    Inventors: Chih-Tsung Shih, Shih-Chang Shih, Li-Jui Chen, Po-Chung Cheng
  • Patent number: 11830959
    Abstract: A photodetection device and a manufacturing method are provided. The photodetection device includes an absorption structure, a cathode, a charge multiplication region and an anode. The absorption structure is formed in a recess at a surface region of a semiconductor substrate, and configured to receive an incident light. The cathode is formed on a top surface of the absorption structure, and has a first conductive type. The charge multiplication layer is in lateral contact with the absorption structure, and is an intrinsic portion of the semiconductor substrate extending into the semiconductor substrate from a topmost surface of the semiconductor substrate. The anode is in lateral contact with the charge multiplication layer from a side of the charge multiplication region away from the absorption structure, and is a doped region in the semiconductor substrate having a second conductive type complementary to the first conductive type.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Felix yingkit Tsui, Stefan Rusu, Chewn-Pu Jou
  • Publication number: 20230367195
    Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.
    Type: Application
    Filed: July 24, 2023
    Publication date: November 16, 2023
    Inventors: Chih-Tsung SHIH, Tsung-Chih CHIEN, Shih-Chi FU, Chi-Hua FU, Kuotang CHENG, Bo-Tsun LIU, Tsung Chuan LEE
  • Patent number: 11809075
    Abstract: A lithography mask includes a substrate that contains a low thermal expansion material (LTEM). The lithography mask also includes a reflective structure disposed over the substrate. The reflective structure includes a first layer and a second layer disposed over the first layer. At least the second layer is porous. The mask is formed by forming a multilayer reflective structure over the LTEM substrate, including forming a plurality of repeating film pairs, where each film pair includes a first layer and a porous second layer. A capping layer is formed over the multilayer reflective structure. An absorber layer is formed over the capping layer.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: November 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Tsung Shih, Shih-Chang Shih, Li-Jui Chen, Po-Chung Cheng
  • Publication number: 20230324804
    Abstract: A method of forming an extreme ultraviolet (EUV) mask includes forming a multilayer Mo/Si stack comprising alternating stacked Mo and Si layers over a mask substrate; forming a ruthenium capping layer over the multilayer Mo/Si stack; doping the ruthenium capping layer with a halogen element, a pentavalent element, a hexavalent element or combinations thereof; forming an absorber layer over the ruthenium capping layer; and etching the absorber layer to form a pattern in the absorber layer.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 12, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Tsung SHIH, Yu-Hsun WU, Bo-Tsun LIU, Tsung-Chuan LEE
  • Publication number: 20230314719
    Abstract: An optical device for coupling light propagating between a waveguide and an optical transmission component is provided. The optical device includes a taper portion and a grating portion. The taper portion is disposed between the grating portion and the waveguide. The grating portion includes rows of grating patterns. A first size of a first grating pattern in a first row of grating patterns is larger than a second size of a second grating pattern in a second row of grating patterns. A first distance between the first row of grating patterns and the waveguide is less than a second distance between the second row of grating patterns and the waveguide.
    Type: Application
    Filed: June 8, 2023
    Publication date: October 5, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chan-Hong Chern, Chih-Chang Lin, Chewn-Pu Jou, Chih-Tsung Shih, Feng-Wei Kuo, Lan-Chou Cho, Min-Hsiang Hsu, Weiwei Song