Patents by Inventor Chih-Tsung Shih

Chih-Tsung Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12293954
    Abstract: A semiconductor structure includes a semiconductor substrate, a semiconductor device and a heating structure. The semiconductor substrate includes a device region and a heating region surrounding the device region. The semiconductor device is located on the device region. The heating structure is located on the heating region and includes an intrinsic semiconductor area, at least one heating element and at least one heating pad. The intrinsic semiconductor area is surrounding the semiconductor device. The at least one heating element is located at a periphery of the intrinsic semiconductor area. The at least one heating pad is joined with the at least one heating element, wherein the at least one heating pad includes a plurality of contact structures, and a voltage is supplied from the plurality of contact structures to control a temperature of the at least one heating element.
    Type: Grant
    Filed: January 11, 2024
    Date of Patent: May 6, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Chewn-Pu Jou, Stefan Rusu, Feng-Wei Kuo
  • Publication number: 20250130367
    Abstract: A waveguide photodetector includes a slab over a substrate, first and second contact portions protruding upward from the slab, and a ridge protruding upward from the slab between the first and second contact portions. A first semiconductor layer is over the substrate and includes a first doped region in the first contact portion, a second doped region in the slab between the first contact portion and the ridge, a third doped region and a sixth doped region in the ridge, a fourth doped region in the second contact portion, a fifth doped region in the slab between the second contact portion and the ridge, a first intrinsic region between the sixth and third doped regions, and a second intrinsic region between the sixth and fifth doped regions. A second semiconductor layer is over the first intrinsic region and between the sixth and third doped regions.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 24, 2025
    Inventors: Chih-Tsung Shih, Chi-Yuan Shih
  • Publication number: 20250110303
    Abstract: Disclosed are apparatus and methods for optical interconnections that include the integration of a photonics die (pDie) and an electronic die (eDie) with a socket layer, waveguides and fiber connectors to enable high bandwidth communications. In one embodiment, an exemplary optical interconnect device includes an electronic die coupled to a photonics die and integrated with a substrate, a socket, a board, a pair of micro-lenses and a mirror coupled to a waveguide, which can be embedded in the board. In another embodiment, the waveguide is embedded in a socket layer and coupled to a fiber connector. In these embodiments, the exemplary optical interface device can be coupled one more other optical interconnect devices via a waveguide array and/or a fiber array.
    Type: Application
    Filed: December 13, 2024
    Publication date: April 3, 2025
    Inventors: Stefan RUSU, Wei-wei SONG, Mohammed Rabiul ISLAM, Chih-Tsung SHIH
  • Publication number: 20250102734
    Abstract: A semiconductor photonics device includes a plurality of grating couplers, each configured to couple a particular wavelength (or wavelength range) of an optical signal to a waveguide of the semiconductor photonics device. In some implementations, various implementations of optical signal splitters or filters described herein enable respective wavelengths (or respective wavelength ranges) to be passed to each of the grating couplers (while filtering out other wavelengths or other wavelength ranges), thereby enabling the grating couplers to each handle a respective wavelength (or respective wavelength range). This enables multiple wavelengths (or multiple wavelength ranges) to be distributed across multiple grating couplers, which may increase the bandwidth of the semiconductor photonics device relative to a semiconductor photonics device that includes only a single grating coupler.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 27, 2025
    Inventors: Chih-Tsung SHIH, Wei-kang LIU, Hau-Yan LU, Chi-Yuan SHIH, Ming-Fa CHEN, YingKit Felix TSUI
  • Publication number: 20250093764
    Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.
    Type: Application
    Filed: November 27, 2024
    Publication date: March 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung SHIH, Tsung-Chih CHIEN, Shih-Chi FU, Chi-Hua FU, Kuotang CHENG, Bo-Tsun LIU, Tsung Chuan LEE
  • Patent number: 12235490
    Abstract: A semiconductor structure includes a waveguide and an optical attenuator. The waveguide is disposed over an insulating layer and configured to guide light. The optical attenuator is connected to the waveguide. The optical attenuator has a first surface and a second surface opposite the first surface, and a cross-sectional width of the optical attenuator decreases from the first surface to the second surface.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Kang Liu, Lee-Shian Jeng, Chih-Tsung Shih, Hau-Yan Lu, Yingkit Felix Tsui
  • Publication number: 20250044518
    Abstract: An edge coupler includes a substrate, a first cladding layer over the substrate, a core layer over the first cladding layer, and an ARC layer. The substrate has a first sidewall, the first cladding layer has a second sidewall aligned with the first sidewall, and the core layer has a third sidewall aligned with the second sidewall. The ARC layer lines the first sidewall, the second sidewall and the third sidewall. The ARC layer physically contacts and covers a surface of the substrate. A first height of the ARC layer varies along the surface of the substrate.
    Type: Application
    Filed: October 22, 2024
    Publication date: February 6, 2025
    Inventors: WEI-KANG LIU, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
  • Patent number: 12216399
    Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.
    Type: Grant
    Filed: February 20, 2024
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Tsung Chuan Lee, Hao-Shiang Chang
  • Patent number: 12181724
    Abstract: Disclosed are apparatus and methods for optical interconnections that include the integration of a photonics die (pDie) and an electronic die (eDie) with a socket layer, waveguides and fiber connectors to enable high bandwidth communications. In one embodiment, an exemplary optical interconnect device includes an electronic die coupled to a photonics die and integrated with a substrate, a socket, a board, a pair of micro-lenses and a mirror coupled to a waveguide, which can be embedded in the board. In another embodiment, the waveguide is embedded in a socket layer and coupled to a fiber connector. In these embodiments, the exemplary optical interface device can be coupled one more other optical interconnect devices via a waveguide array and/or a fiber array.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: December 31, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Stefan Rusu, Wei-Wei Song, Mohammed Rabiul Islam, Chih-Tsung Shih
  • Patent number: 12181791
    Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: December 31, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Shih-Chi Fu, Chi-Hua Fu, Kuotang Cheng, Bo-Tsun Liu, Tsung Chuan Lee
  • Publication number: 20240413911
    Abstract: Some implementations described herein provide an optical receiver system. The optical receiver system includes optical circuitry that may include a phase shifter device, a demultiplexer device, a power combiner device, and/or a power splitter device. Different combinations of such devices within the optical circuitry may balance and/or reduce photocurrents within the photodiode device to improve a performance (e.g., a bandwidth) of the optical receiver system relative to another optical receiver system that does not include the optical circuitry.
    Type: Application
    Filed: September 22, 2023
    Publication date: December 12, 2024
    Inventors: Chih-Tsung SHIH, Chia-Ming HUNG, Chi-Yuan SHIH
  • Publication number: 20240402521
    Abstract: An optical modulator structure in a photonic integrated circuit includes an L-shaped P-N junction at an optical mode of the optical modulator structure (e.g., an area of the optical modulator structure in which light is generated). The L-shaped P-N junction provides increased area of overlap of the P-N junction at the optical mode relative to another type of junction, such as a horizontal junction or I-shaped junction. The increased area of overlap may enable the optical modulator structure to achieve a greater modulation efficiency.
    Type: Application
    Filed: May 30, 2023
    Publication date: December 5, 2024
    Inventors: Wen-Shun LO, Ta-Wei CHOU, Chih-Tsung SHIH, Jing-Hwang YANG, Chi-Yuan SHIH, YingKit Felix TSUI, Shih-Fen HUANG
  • Patent number: 12153261
    Abstract: An edge coupler, a waveguide structure and a method for forming a waveguide structure are provided. The edge coupler includes a substrate, a first cladding layer, a core layer and a first anti-reflection coating layer. The first cladding layer has a second sidewall aligned with a first sidewall of the substrate. The core layer has a third sidewall aligned with the second sidewall. The anti-reflection coating layer lines the first sidewall, the second sidewall and the third sidewall. A thickness of the anti-reflection coating layer varies along the first sidewall, the second sidewall and the third sidewall.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: November 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Kang Liu, Chih-Tsung Shih, Hau-Yan Lu, Yingkit Felix Tsui
  • Publication number: 20240377720
    Abstract: A lithography mask includes a substrate that contains a low thermal expansion material (LTEM). The lithography mask also includes a reflective structure disposed over the substrate. The reflective structure includes a first layer and a second layer disposed over the first layer. At least the second layer is porous. The mask is formed by forming a multilayer reflective structure over the LTEM substrate, including forming a plurality of repeating film pairs, where each film pair includes a first layer and a porous second layer. A capping layer is formed over the multilayer reflective structure. An absorber layer is formed over the capping layer.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Chih-Tsung Shih, Shih-Chang Shih, Li-Jui Chen, Po-Chung Cheng
  • Publication number: 20240369764
    Abstract: A semiconductor structure includes a grating coupler structure, a circuit component separated from the grating coupler structure, an inter level dielectric layer, a capping layer over the inter level dielectric layer, and a passivation layer over the capping layer. The inter level dielectric layer has a first refractive index, the capping layer has second refractive index, and the passivation layer has a third refractive index. The second refractive index is greater than the first refractive index, and is greater than the third refractive index.
    Type: Application
    Filed: July 21, 2024
    Publication date: November 7, 2024
    Inventors: CHIH-TSUNG SHIH, WEI-KANG LIU, SUI-YING HSU, JING-HWANG YANG, YINGKIT FELIX TSUI
  • Publication number: 20240361533
    Abstract: Disclosed are apparatus and methods for optical coupling.
    Type: Application
    Filed: July 10, 2024
    Publication date: October 31, 2024
    Inventors: Chih-Tsung SHIH, Chewn-Pu JOU, Stefan RUSU, Felix Ying-Kit TSUI, Lan-Chou CHO
  • Publication number: 20240361524
    Abstract: Some implementations described herein include a photonics integrated circuit device including a photonics structure. The photonics structure includes a waveguide structure and an optical attenuator structure. In some implementation, the optical attenuator structure is formed on an end region of the waveguide structure and includes a metal material or a doped material. In some implementations, the optical attenuator structure includes a gaussian doping profile within a portion of the waveguide structure. The optical attenuator structure may absorb electromagnetic waves at the end of the waveguide structure with an efficiency that is improved relative to a spiral optical attenuator structure or metal cap optical attenuator structure.
    Type: Application
    Filed: July 8, 2024
    Publication date: October 31, 2024
    Inventors: Wei-kang LIU, Chih-Tsung SHIH, Hau-Yan LU, YingKit Felix TSUI, Lee-Shian JENG
  • Patent number: 12124083
    Abstract: A semiconductor structure includes a substrate, a grating coupler structure over the substrate, a multi-layers film structure over the grating coupler structure. The multi-layers film structure include a first layer including a first refractive index, a second layer over the first layer and including a second refractive index and a third layer over the second layer and including a third refractive index. The second refractive index is greater than the first refractive index and is greater than the third refractive index of the third layer, and a thickness of each layer of the multi-layers film structure is within a range from ?/4 to ?2, ? is a wavelength of light.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: October 22, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Tsung Shih, Wei-Kang Liu, Sui-Ying Hsu, Jing-Hwang Yang, Yingkit Felix Tsui
  • Publication number: 20240310579
    Abstract: A method for forming an optical waveguide structure includes following operations. A substrate is received. A semiconductor layer is formed on the substrate. The semiconductor layer is patterned to form at least a waveguide in the substrate and at least a trench in the semiconductor layer. A first gap-filling operation is performed to form a first dielectric portion in the trench. A second gap-filling operation is performed to form a second dielectric portion over the first dielectric portion. An air seam is sealed within the second dielectric portion. A third gap-filling operation is performed to form a third dielectric portion over the second dielectric portion.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 19, 2024
    Inventors: CHIH-TSUNG SHIH, HAU-YAN LU, WEI-KANG LIU, YINGKIT FELIX TSUI
  • Patent number: 12085751
    Abstract: Some implementations described herein include a photonics integrated circuit device including a photonics structure. The photonics structure includes a waveguide structure and an optical attenuator structure. In some implementation, the optical attenuator structure is formed on an end region of the waveguide structure and includes a metal material or a doped material. In some implementations, the optical attenuator structure includes a gaussian doping profile within a portion of the waveguide structure. The optical attenuator structure may absorb electromagnetic waves at the end of the waveguide structure with an efficiency that is improved relative to a spiral optical attenuator structure or metal cap optical attenuator structure.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: September 10, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-kang Liu, Chih-Tsung Shih, Hau-Yan Lu, YingKit Felix Tsui, Lee-Shian Jeng