Patents by Inventor Chih-Wei Hung

Chih-Wei Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210092694
    Abstract: A wireless communication includes a control circuit and a receiver (RX) circuit. The control circuit obtains indicator information from another wireless communication system, identifies a transmitter (TX) and receiver (RX) packet delivery scenario as one of a packet overlapping scenario and a packet non-overlapping scenario according to the indicator information, and generates RX gain control information in response to the TX and RX packet delivery scenario. The RX circuit refers to the RX gain control information to set an RX gain used for receiving data.
    Type: Application
    Filed: September 8, 2020
    Publication date: March 25, 2021
    Inventors: Yen-Wen Yang, Chen-Feng Liu, Ting-Che Tseng, Ying-Che Hung, Tsai-Yuan Hsu, You-Chin Chang, KIN-MAN SUN, Chih-Hsiu Lin, Teng-Wei Huang, Hung-Chang Tsai
  • Publication number: 20210052179
    Abstract: The present disclosure provides a method for determining R peaks of an electrocardiogram (ECG/EKG). First, an ECG/EKG complex is provided, and then, a maximum peak of the ECG/EKG complex is obtained. Following that, a half of a largest voltage of the maximum peak is defined as a threshold voltage. Later, an R peak number estimating process is performed to obtain an estimated number of all R peaks of the ECG/EKG complex and a plurality of peaks of the ECG/EKG complex with voltages greater than the threshold voltage and followed by determining whether a number of the peaks is equal to the estimated number of the all R peaks. When the number of the peaks is equal to the estimated number of the all R peaks, the peaks serve as the all R peaks.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 25, 2021
    Inventors: Tao-Wei Wang, Chih-Wen Hung, Ming-Chiuan Jing, Shih-Cheng Lan
  • Publication number: 20210050350
    Abstract: Methods of cutting gate structures, and structures formed, are described. In an embodiment, a structure includes first and second gate structures over an active area, and a gate cut-fill structure. The first and second gate structures extend parallel. The active area includes a source/drain region disposed laterally between the first and second gate structures. The gate cut-fill structure has first and second primary portions and an intermediate portion. The first and second primary portions abut the first and second gate structures, respectively. The intermediate portion extends laterally between the first and second primary portions. First and second widths of the first and second primary portions along longitudinal midlines of the first and second gate structures, respectively, are each greater than a third width of the intermediate portion midway between the first and second gate structures and parallel to the longitudinal midline of the first gate structure.
    Type: Application
    Filed: October 30, 2020
    Publication date: February 18, 2021
    Inventors: Chih-Chang Hung, Chia-Jen Chen, Ming-Ching Chang, Shu-Yuan Ku, Yi-Hsuan Hsiao, I-Wei Yang
  • Patent number: 10912948
    Abstract: The present invention provides a composite intelligent biological phototherapy device including a base structure, a plurality of white light fluorescent tubes arranged side by side on the base structure, a plurality of LEDs disposed between the white light fluorescent tubes, a housing having an opening and configured to accommodate the base structure and the white light fluorescent tubes and the LEDs thereon, a light-transmittable plate disposed on the housing corresponding to the opening, and an control module configured to respectively control the white light fluorescent tubes and the LEDs. The base structure includes a plurality of sections, and each of the sections has a first surface facing the light-transmittable plate. The white light fluorescent tubes and the LEDs are provided on the first surfaces, and the sections are bent relative to each other so an angle between the first surfaces of adjacent sections is less than 180 degrees.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: February 9, 2021
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Yi-Cheng Lin, Hsin-Yi Tsai, Min-Wei Hung, Kuo-Cheng Huang, Hsin-Su Yu, Chiou-Lian Lai, Chung-Yao Hsu, Chao-Hung Cheng, Li-Wei Kuo, Hung-Che Chiang, Chih-Yi Yang
  • Patent number: 10872978
    Abstract: A semiconductor device and method of forming thereof includes a first fin and a second fin each extending from a substrate. A first gate segment is disposed over the first fin and a second gate segment is disposed over the second fin. An interlayer dielectric (ILD) layer is adjacent the first gate segment and the second gate segment. A cut region (e.g., opening or gap between first gate structure and the second gate structure) extends between the first and second gate segments. The cut region has a first portion has a first width and a second portion has a second width, the second width is greater than the first width. The second portion interposes the first and second gate segments and the first portion is defined within the ILD layer.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: December 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: I-Wei Yang, Chih-Chang Hung, Shu-Yuan Ku, Ryan Chia-Jen Chen, Ming-Ching Chang
  • Patent number: 10867998
    Abstract: Methods of cutting gate structures, and structures formed, are described. In an embodiment, a structure includes first and second gate structures over an active area, and a gate cut-fill structure. The first and second gate structures extend parallel. The active area includes a source/drain region disposed laterally between the first and second gate structures. The gate cut-fill structure has first and second primary portions and an intermediate portion. The first and second primary portions abut the first and second gate structures, respectively. The intermediate portion extends laterally between the first and second primary portions. First and second widths of the first and second primary portions along longitudinal midlines of the first and second gate structures, respectively, are each greater than a third width of the intermediate portion midway between the first and second gate structures and parallel to the longitudinal midline of the first gate structure.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Hung, Chia-Jen Chen, Ming-Ching Chang, Shu-Yuan Ku, Yi-Hsuan Hsiao, I-Wei Yang
  • Publication number: 20200388616
    Abstract: A method includes forming a first semiconductor fin in a substrate, forming a metal gate structure over the first semiconductor fin, removing a portion of the metal gate structure to form a first recess in the metal gate structure that is laterally separated from the first semiconductor fin by a first distance, wherein the first distance is determined according to a first desired threshold voltage associated with the first semiconductor fin, and filling the recess with a dielectric material.
    Type: Application
    Filed: August 24, 2020
    Publication date: December 10, 2020
    Inventors: Chung-Chiang Wu, Shih-Hang Chiu, Chih-Chang Hung, I-Wei Yang, Shu-Yuan Ku, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
  • Patent number: 10861692
    Abstract: A method includes receiving a carrier with a plurality of wafers inside; supplying a purge gas to an inlet of the carrier; extracting an exhaust gas from an outlet of the carrier; and generating a health indicator of the carrier while performing the supplying of the purge gas and the extracting of the exhaust gas.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: December 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jen-Ti Wang, Chih-Wei Lin, Fu-Hsien Li, Yi-Ming Chen, Cheng-Ho Hung
  • Patent number: 10833077
    Abstract: Methods of cutting gate structures, and structures formed, are described. In an embodiment, a structure includes first and second gate structures over an active area, and a gate cut-fill structure. The first and second gate structures extend parallel. The active area includes a source/drain region disposed laterally between the first and second gate structures. The gate cut-fill structure has first and second primary portions and an intermediate portion. The first and second primary portions abut the first and second gate structures, respectively. The intermediate portion extends laterally between the first and second primary portions. First and second widths of the first and second primary portions along longitudinal midlines of the first and second gate structures, respectively, are each greater than a third width of the intermediate portion midway between the first and second gate structures and parallel to the longitudinal midline of the first gate structure.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: November 10, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chang Hung, Chia-Jen Chen, Ming-Ching Chang, Shu-Yuan Ku, Yi-Hsuan Hsiao, I-Wei Yang
  • Publication number: 20200335597
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a fin structure formed over a semiconductor substrate and a gate structure formed over the fin structure. The semiconductor device structure also includes an isolation feature over a semiconductor substrate and below the gate structure. The semiconductor device structure further includes two spacer elements respectively formed over a first sidewall and a second sidewall of the gate structure. The first sidewall is opposite to the second sidewall and the two spacer elements have hydrophobic surfaces respectively facing the first sidewall and the second sidewall. The gate structure includes a gate dielectric layer and a gate electrode layer separating the gate dielectric layer from the hydrophobic surfaces of the two spacer elements.
    Type: Application
    Filed: June 29, 2020
    Publication date: October 22, 2020
    Inventors: Min-Hsiu HUNG, Yi-Hsiang CHAO, Kuan-Yu YEH, Kan-Ju LIN, Chun-Wen NIEH, Huang-Yi HUANG, Chih-Wei CHANG, Ching-Hwanq SU
  • Patent number: 10809469
    Abstract: A method and a system for active alignment of a light source assembly along three dimensions in an optical bench plane are provided. The light source assembly, preferably a laser diode on its sub-mount, is actively aligned in three dimensions, longitudinal, transection and vertical along the optical bench. The light source assembly is attached on edge of the optical bench, via adhesion processes, such as solder welding. Optical components such as collimator lens, isolator, etc are first passively aligned on the optical bench using alignment marks and epoxy slots provided on the surface of the optical bench. Then, laser diode, mounted on a laser diode sub-mount, is aligned in X and Z direction. Thereafter, the light source assembly is pushed towards the edge of the optical bench and attached with the edge via a solder joint. Also, a compensator can be actively aligned until the optimum light intensity achieved.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: October 20, 2020
    Assignee: Cloud Light Technology Limited
    Inventors: Vincent Wai Hung, Vivian Wei Ma, Wing Keung Mark Mak, Chih Hsun Lin
  • Publication number: 20200319415
    Abstract: A method and a system for active alignment of a light source assembly along three dimensions in an optical bench plane are provided. The light source assembly, preferably a laser diode on its sub-mount, is actively aligned in three dimensions, longitudinal, transection and vertical along the optical bench. The light source assembly is attached on edge of the optical bench, via adhesion processes, such as solder welding. Optical components such as collimator lens, isolator, etc are first passively aligned on the optical bench using alignment marks and epoxy slots provided on the surface of the optical bench. Then, laser diode, mounted on a laser diode sub-mount, is aligned in X and Z direction. Thereafter, the light source assembly is pushed towards the edge of the optical bench and attached with the edge via a solder joint. Also, a compensator can be actively aligned until the optimum light intensity achieved.
    Type: Application
    Filed: April 2, 2019
    Publication date: October 8, 2020
    Inventors: Vincent Wai Hung, Vivian Wei Ma, Wing Keung Mark Mak, Chih Hsun Lin
  • Publication number: 20200303255
    Abstract: A method for forming semiconductor device structure is provided. The method includes forming a gate stack over a semiconductor substrate and forming a spacer element over a sidewall of the gate stack. The method also includes forming a dielectric layer over the semiconductor substrate to surround the gate stack and the spacer element and replacing the gate stack with a metal gate stack. The method further includes forming a protection element over the metal gate stack and forming a conductive contact partially surrounded by the dielectric layer. A portion of the conductive contact is formed directly above a portion of the protection element.
    Type: Application
    Filed: June 3, 2020
    Publication date: September 24, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hua-Li HUNG, Chih-Lun LU, Hsu-Yu HUANG, Tsung-Fan YIN, Ying-Ting HSIA, Yi-Wei CHIU, Li-Te HSU
  • Publication number: 20200296264
    Abstract: A camera module for an imaging device includes a light sensing module, a control circuit, a mounting member, one or more external lens modules, and a magnetic sensing element. The control circuit sets photographic conditions for a certain external lens module according to a control signal, the control signal being prompted by the magnetic sensing element detecting the type of the external lens module by the arrangement of magnetic components therein, as detected by the magnetic sensing element. The magnetic components have configurations corresponding to the type of the external lens module and the magnetic components assist in aligning one external lens module to the body of the imaging device. The automatic detection and photographic settings applied can be disabled by a user.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Inventor: CHIH-WEI HUNG
  • Publication number: 20200279743
    Abstract: A method for semiconductor manufacturing includes providing a substrate, forming a patterning layer over the substrate, and patterning the patterning layer to form a hole in the patterning layer. The method also includes applying a first directional etching to two inner sidewalls of the hole to expand the hole along a first direction and applying a second directional etching to another two inner sidewalls of the hole to expand the hole along a second direction that is different from the first direction.
    Type: Application
    Filed: May 19, 2020
    Publication date: September 3, 2020
    Inventors: Yu-Tien Shen, Chi-Cheng Hung, Chin-Hsiang Lin, Chien-Wei Wang, Ching-Yu Chang, Chih-Yuan Ting, Kuei-Shun Chen, Ru-Gun Liu, Wei-Liang Lin, Ya Hui Chang, Yuan-Hsiang Lung, Yen-Ming Chen, Yung-Sung Yen
  • Patent number: 10763116
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: September 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Ying Lin, Cheng-Yi Wu, Alan Tu, Chung-Liang Cheng, Li-Hsuan Chu, Ethan Hsiao, Hui-Lin Sung, Sz-Yuan Hung, Sheng-Yung Lo, C. W. Chiu, Chih-Wei Hsieh, Chin-Szu Lee
  • Patent number: 10756087
    Abstract: A method includes forming a first semiconductor fin in a substrate, forming a metal gate structure over the first semiconductor fin, removing a portion of the metal gate structure to form a first recess in the metal gate structure that is laterally separated from the first semiconductor fin by a first distance, wherein the first distance is determined according to a first desired threshold voltage associated with the first semiconductor fin, and filling the recess with a dielectric material.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Shih-Hang Chiu, Chih-Chang Hung, I-Wei Yang, Shu-Yuan Ku, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
  • Publication number: 20200249379
    Abstract: A lens including a filter, an aperture stop, and a lens set sequentially arranged along a first direction is provided. The filter includes a central region and a peripheral region. The central region has a first light transmission band for a wavelength range of a visible light and a second light transmission band for a wavelength range of an infrared light. The peripheral region surrounds the central region. The peripheral region has a third light transmission band for the wavelength range of the infrared light and is substantially opaque to the visible light, and an area of one portion of the central region surrounded by the peripheral region is tapered toward the first direction.
    Type: Application
    Filed: November 14, 2019
    Publication date: August 6, 2020
    Applicant: Rays Optics Inc.
    Inventors: Chen-Cheng Lee, Chen-Yi Tsai, Shin-Jen Wang, Kuo-Hsiang Hung, Chih-Ling Lin, Meng-Wei Lin, Yu-Chia Lu
  • Patent number: 10725238
    Abstract: A display assembly includes at least two display devices and two image compensating elements at a junction of every adjacent two display devices. Each display device includes a front surface that is viewed by user. Each front surface defines a display area and a border area. Each image compensating element is on the front surface. Each image compensating element includes a light-incident surface on the display area, a light-emitting surface coupling to the light-incident surface, and a connecting surface coupling between the light-incident surface and the light-emitting surface. Each image compensating element includes a plurality of light guiding channels. Light guiding paths of the light guiding channels extend along a direction from the light-incident surface toward the light-emitting surface.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: July 28, 2020
    Assignee: SEAMLESS TECHNOLOGY INC.
    Inventors: I-Wei Wu, Chih-Lung Hung, Hsiao-Min Yin
  • Patent number: 10715706
    Abstract: A camera module for an imaging device includes a light sensing module, a control circuit, a mounting member, one or more external lens modules, and a magnetic sensing element. The control circuit sets photographic conditions for a certain external lens module according to a control signal, the control signal being prompted by the magnetic sensing element detecting the type of the external lens module by the arrangement of magnetic components therein, as detected by the magnetic sensing element. The magnetic components have configurations corresponding to the type of the external lens module and the magnetic components assist in aligning one external lens module to the body of the imaging device. The automatic detection and photographic settings applied can be disabled by a user.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: July 14, 2020
    Assignee: NANNING FUGUI PRECISION INDUSTRIAL CO., LTD.
    Inventor: Chih-Wei Hung