Patents by Inventor Chih-Yu Lai
Chih-Yu Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12034009Abstract: A semiconductor device includes a base isolation layer, a first transistor with a first source electrode at a first side of the base isolation layer. A bridge pillar extends through the base isolation layer, and a metal electrode electrically connects the bridge pillar to the first source electrode. The metal electrode and the first source electrode are at the same side of the base isolation layer. A second metal electrode at an opposite side of the base isolation layer electrically connects to the bridge pillar and to a conductive line at the second side of the base isolation layer.Type: GrantFiled: August 31, 2021Date of Patent: July 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Yu Lai, Chih-Liang Chen, Ching-Wei Tsai, Shang-Wen Chang, Li-Chun Tien
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Patent number: 12009362Abstract: A method of making a semiconductor device includes forming a first active region on a first side of a substrate. The method further includes forming a first source/drain (S/D) electrode surrounding a first portion of the first active region. The method further includes forming an S/D connect via extending through the substrate. The method further includes flipping the substrate. The method further includes forming a second active region on a second side of the substrate, wherein the second side of the substrate is opposite to the first side of the substrate. The method further includes forming a second S/D electrode surrounding a first portion of the second active region, wherein the S/D connect directly contacts both the first S/D electrode and the second S/D electrode.Type: GrantFiled: July 27, 2023Date of Patent: June 11, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang, Ching-Wei Tsai, Shang-Wen Chang
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Publication number: 20240096756Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Syuan CIOU, Hui-Zhong ZHUANG, Ching-Wei TSAI, Shang-Wen CHANG
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Publication number: 20240095433Abstract: An integrated circuit includes a first conductor segment intersecting a first active-region structure at a source/drain region and a second conductor segment intersecting a second active-region structure at a source/drain region. The first conductor segment and the second conductor segment are separated at proximal edges by a separation distance. A distance from a first horizontal cell boundary to a proximal edge of the first conductor segment is larger than a distance from a second horizontal cell boundary to a proximal edge of the second conductor segment by a predetermined distance that is a fraction of the separation distance.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Hsuan CHIU
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Publication number: 20240021606Abstract: A method of making a semiconductor device includes forming a first active region on a first side of a substrate. The method further includes forming a first source/drain (S/D) electrode surrounding a first portion of the first active region. The method further includes forming an S/D connect via extending through the substrate. The method further includes flipping the substrate. The method further includes forming a second active region on a second side of the substrate, wherein the second side of the substrate is opposite to the first side of the substrate. The method further includes forming a second S/D electrode surrounding a first portion of the second active region, wherein the S/D connect directly contacts both the first S/D electrode and the second S/D electrode.Type: ApplicationFiled: July 27, 2023Publication date: January 18, 2024Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Syuan CIOU, Hui-Zhong ZHUANG, Ching-Wei TSAI, Shang-Wen CHANG
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Patent number: 11862562Abstract: A circuit structure includes a substrate that includes a first transistor stack over the substrate that includes: a first transistor where the first transistor is a first conductivity type; and a second transistor, above the first transistor, where the second transistor is a second conductivity type different from the first conductivity type. The structure also includes a plurality of first conductive lines in a first metal layer above the first transistor stack, the plurality of first conductive lines electrically connected to the first transistor stack. The structure also includes a plurality of second conductive lines in a second metal layer below the substrate and underneath the first transistor stack, the plurality of second conductive lines electrically connected to the first transistor stack. The plurality of first conductive lines are configured asymmetrically with respect to the plurality of second conductive lines.Type: GrantFiled: August 27, 2021Date of Patent: January 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Yu Lai, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien
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Patent number: 11854940Abstract: A semiconductor device includes a substrate and a first transistor on a first side of the substrate. The semiconductor device further includes a first electrode contacting a first region of the first transistor. The semiconductor device further includes a spacer extending along a sidewall of the first transistor. The semiconductor device further includes a self-aligned interconnect structure (SIS) separated from at least a portion of the first electrode by the spacer, wherein the SIS extends through the substrate. The semiconductor device further includes a second electrode contacting a surface of the first electrode farthest from the substrate, wherein the second electrode directly contacts the SIS.Type: GrantFiled: April 15, 2021Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang, Ching-Wei Tsai, Shang-Wen Chang
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Patent number: 11853670Abstract: An integrated circuit includes a first conductor segment intersecting a first active-region structure at a source/drain region and a second conductor segment intersecting a second active-region structure at a source/drain region. The first conductor segment and the second conductor segment are separated at proximal edges by a separation distance. The first conductor has a distal edge separated from a first power rail, and the second conductor segment is connected to a second power rail through a via-connector. A distance from the first power rail to a proximal edge of the first conductor segment is larger than a distance from the second power rail to a proximal edge of the second conductor segment by a predetermined distance that is a fraction of the separation distance.Type: GrantFiled: November 12, 2021Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Hsuan Chiu
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Publication number: 20230386997Abstract: A semiconductor device includes a first source/drain structure and a second source/drain structure of a first transistor. The semiconductor device includes a first source/drain structure and a second source/drain structure of a first transistor. The semiconductor device includes a third source/drain structure and a fourth source/drain structure of a second transistor. The second source/drain structure and the third source/drain structure merges as a common source/drain structure. The semiconductor device includes a first interconnect structure extending along a first lateral direction and disposed above the common source/drain structure. The semiconductor device includes a first dielectric structure interposed between the first interconnect structure and the common source/drain structure.Type: ApplicationFiled: May 26, 2022Publication date: November 30, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Yu Lu, Chih-Yu Lai, Meng-Hsueh Wang, Chih-Liang Chen, Shang Hsuan Chiu
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Publication number: 20230387014Abstract: A method includes forming a first transistor stack over a substrate. The first transistor stack includes: a first transistor of a first conductivity type, and a second transistor of a second conductivity type different from the first conductivity type. The second transistor is above the first transistor. A plurality of first conductive lines is formed in a first metal layer above the first transistor stack. The plurality of first conductive lines includes, over the first transistor stack, a power conductive line configured to route power to the first transistor stack, one or more signal conductive lines configured to route one or more signals to the first transistor stack, and a shielding conductive line configured to shield the routed one or more signals. The one or more signal conductive lines are between the power conductive line and the shielding conductive line.Type: ApplicationFiled: August 10, 2023Publication date: November 30, 2023Inventors: Chih-Yu LAI, Hui-Zhong ZHUANG, Chih-Liang CHEN, Li-Chun TIEN
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Publication number: 20230386998Abstract: An integrated circuit (IC) structure includes first and second active areas extending in a first direction in a semiconductor substrate, first and second gate structures extending in a second direction perpendicular to the first direction, wherein each of the first and second gate structures overlies each of the first and second active areas, a first metal-like defined (MD) segment extending in the second direction between the first and second gate structures and overlying each of the first and second active areas, and an isolation structure positioned between the first MD segment and the first active area. The first MD segment is electrically connected to the second active area and electrically isolated from a portion of the first active area between the first and second gate structures.Type: ApplicationFiled: May 24, 2022Publication date: November 30, 2023Inventors: Chi-Yu LU, Yi-Hsun CHIU, Chih-Liang CHEN, Chih-Yu LAI, Shang-Hsuan CHIU
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Publication number: 20230387011Abstract: An integrated circuit (IC) structure includes two active areas extending in a first direction, two gate structures extending in a second direction, a first metal segment extending in the second direction in a first metal layer, second and third metal segments extending in the first direction in a second metal layer, and a gate via structure extending from the third metal segment to one of the gate structures. The gate structures overlie the active areas, the first metal segment overlies each of the active areas between the gate structures, the second metal segment overlies a first active area and overlies and is electrically connected to the first metal segment, and the first and second metal segments are electrically connected to the second active area, isolated from the first active area between the gate structures, and connected to the first active area outside the gate structures.Type: ApplicationFiled: May 24, 2022Publication date: November 30, 2023Inventors: Chi-Yu LU, Chih-Liang CHEN, Chia-Tien WU, Chih-Yu LAI, Shang-Hsuan CHIU
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Publication number: 20230343703Abstract: A semiconductor device includes a substrate. The semiconductor device further includes a conductive mesh on a first side of the substrate. The semiconductor device further includes an active region on a second side of the substrate, wherein the first side of the substrate is opposite to the second side of the substrate. The semiconductor device further includes a through via electrically connected to the conductive mesh, wherein the through via extends through the substrate. The semiconductor device further includes a contact structure on the second side of the substrate, wherein the contact structure is electrically connected to the active region, the contact structure is in direct contact with the through via, and the contact structure overlaps a top surface of the through via in a top view.Type: ApplicationFiled: April 22, 2022Publication date: October 26, 2023Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Chung-Hsing WANG
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Patent number: 11764213Abstract: A semiconductor device includes a substrate and a first active region on a first side of the substrate. The semiconductor device further includes a first gate structure surrounding a first portion of the first active region. The semiconductor device further includes a second active region on a second side of the substrate, wherein the second side is opposite the first side. The semiconductor device further includes a second gate structure surrounding a first portion of the second active region. The semiconductor device further includes a gate via extending through the substrate, wherein the gate via directly connects to the first gate structure, and the gate via directly connects to the second gate structure.Type: GrantFiled: March 26, 2021Date of Patent: September 19, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang, Ching-Wei Tsai, Shang-Wen Chang
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Publication number: 20230268339Abstract: An integrated circuit including a first cell and a second cell. The first cell includes a first plurality of active areas that extend in a first direction and a first plurality of gates that extend in a second direction that crosses the first direction, the first cell having first cell edges defined by breaks in the first plurality of gates. The second cell includes a second plurality of active areas that extend in the first direction and a second plurality of gates that extend in the second direction, the second cell having second cell edges defined by breaks in the second plurality of gates. Each of the second plurality of active areas is larger than each of the first plurality of active areas and the first cell is adjacent the second cell such that the first cell edges align with the second cell edges.Type: ApplicationFiled: May 13, 2022Publication date: August 24, 2023Inventors: Pochun Wang, Chih-Yu LAI, Chi-Yu Lu, Shang-Hsuan CHIU, Hui-Zhong Zhuang, Chih-Liang Chen
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Publication number: 20230154990Abstract: An integrated circuit includes a first conductor segment intersecting a first active-region structure at a source/drain region and a second conductor segment intersecting a second active-region structure at a source/drain region. The first conductor segment and the second conductor segment are separated at proximal edges by a separation distance. The first conductor has a distal edge separated from a first power rail, and the second conductor segment is connected to a second power rail through a via-connector. A distance from the first power rail to a proximal edge of the first conductor segment is larger than a distance from the second power rail to a proximal edge of the second conductor segment by a predetermined distance that is a fraction of the separation distance.Type: ApplicationFiled: November 12, 2021Publication date: May 18, 2023Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Hsuan CHIU
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Publication number: 20230062140Abstract: A circuit structure includes a substrate that includes a first transistor stack over the substrate that includes: a first transistor where the first transistor is a first conductivity type; and a second transistor, above the first transistor, where the second transistor is a second conductivity type different from the first conductivity type. The structure also includes a plurality of first conductive lines in a first metal layer above the first transistor stack, the plurality of first conductive lines electrically connected to the first transistor stack. The structure also includes a plurality of second conductive lines in a second metal layer below the substrate and underneath the first transistor stack, the plurality of second conductive lines electrically connected to the first transistor stack. The plurality of first conductive lines are configured asymmetrically with respect to the plurality of second conductive lines.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Inventors: Chih-Yu LAI, Hui-Zhong ZHUANG, Chih-Liang CHEN, Li-Chun TIEN
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Publication number: 20230067311Abstract: An integrated circuit device includes a first-type active-region semiconductor structure, a second-type active-region semiconductor structure stacked with the first-type active-region semiconductor structure, a front-side power rail in a front-side conductive layer, and a back-side power rail in a back-side conductive layer. The integrated circuit device also includes a source conductive segment intersecting the first-type active-region semiconductor structure at a source region of a transistor, a back-side power node in the back-side conductive layer, and a top-to-bottom via-connector. The source conductive segment is conductively connected to the front-side power rail through a front-side terminal via-connector.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Inventors: Chih-Yu LAI, Chih-Liang CHEN, Li-Chun TIEN
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Publication number: 20230067952Abstract: A semiconductor device includes a base isolation layer, a first transistor with a first source electrode at a first side of the base isolation layer. A bridge pillar extends through the base isolation layer, and a metal electrode electrically connects the bridge pillar to the first source electrode. The metal electrode and the first source electrode are at the same side of the base isolation layer. A second metal electrode at an opposite side of the base isolation layer electrically connects to the bridge pillar and to a conductive line at the second side of the base isolation layer.Type: ApplicationFiled: August 31, 2021Publication date: March 2, 2023Inventors: Chih-Yu LAI, Chih-Liang CHEN, Ching-Wei TSAI, Shang-Wen CHANG, Li-Chun TIEN
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Publication number: 20230050555Abstract: An integrated circuit includes a set of transistors including a set of active regions, a set of power rails, a first set of conductors and a first conductor. The set of active regions extends in a first direction, and is on a first level. The set of power rails extends in the first direction and is on a second level. The set of power rails has a first width. The first set of conductors extends in the first direction, is on the second level, and overlaps the set of active regions. The first set of conductors has a second width. The first conductor extends in the first direction, is on the second level and is between the first set of conductors. The first conductor has the first width, electrically couples a first transistor of the set of transistors to a second transistor of the set of transistors.Type: ApplicationFiled: August 12, 2021Publication date: February 16, 2023Inventors: Chih-Yu LAI, Chih-Liang CHEN