Abstract: A structure includes a first via and a first conductive line embedded in a first dielectric layer and spaced apart from each other by the first dielectric layer. A first metal pattern disposed on the first via and embedded in a second dielectric layer. A first conductive via disposed on the first conductive line and embedded in the second dielectric layer. The first metal pattern and the first conductive via are spaced apart from each other and are located on a first horizontal level, and the first metal pattern has an open ring shape. A second via disposed on the first metal pattern and embedded in a third dielectric layer. An inductor structure including the first via, the first metal pattern, and the second via.

Abstract: Disclosed herein is a glass composition including, based on a total weight of the glass composition, 49 wt % to 59 wt % of SiO2, 9.5 wt % to 14.5 wt % of Al2O3, 19 wt % to 35 wt % of B2O3, 2 wt % to 5 wt % of CaO, 0.25 wt % to 3 wt % of ZnO, 0 wt % to 1 wt % of MgO, 0 wt % to 1 wt % of TiO2, 0 wt % to 3 wt % of ZrO2, and 0.1 wt % to 3.5 wt % of MnO. Also disclosed herein are a glass fiber and a glass article which include the glass composition.

Abstract: Disclosed herein is a glass composition that includes, based on a total weight of the glass composition, 55 wt % to 64 wt % of SiO2, 15 wt % to 22 wt % of Al2O3, 0.1 wt % to 4 wt % of CaO, 2.1 wt % to 10 wt % of MgO, 0 wt % to 8 wt % of ZnO, greater than 0 wt % and less than 7 wt % of CuO, and greater than 13.1 wt % and less than 18 wt % of B2O3. Also disclosed herein are a glass fiber and a glass article including the glass composition.

Abstract: A method for managing network traffic is shown. The method includes establishing a virtual tunnel between a source endpoint and a destination endpoint, the virtual tunnel including a plurality of data flow paths, each of the plurality of data flow streams connecting the source endpoint and the destination endpoint. The method includes providing, via the destination endpoint, a plurality of credits to the source endpoint, the plurality of credits provided via two or more of the plurality of data flow paths. The method includes updating, at the source endpoint, a data transmission sequence based on the received plurality of credits. The method includes providing a plurality of data packets based on the data transmission sequence to the destination endpoint.

Abstract: A method of forming a package structure includes: forming an inductor comprising a through-via over a carrier; placing a semiconductor device over the carrier; molding the semiconductor device and the through-via in a molding material; and forming a first redistribution layer on the molding material, wherein the inductor and the semiconductor device are electrically connected by the first redistribution layer.

Abstract: A stacked die structure for a semiconductor device generally includes a primary level with a first die formed in a wafer, and a second level with a second die coupled to the first die. A third level includes a third die coupled to the second die. The levels have conductive first, second, and third interconnects, respectively, extending from active sides of the dies and may be bonded prior to stacking the dies. The dies may be stacked in an offset or rotated position relative to each other such that the interconnects extend beyond each of the other dies to contact a redistribution layer that forms electrical connections with external components. In some configurations, a fourth level having a fourth die and a conductive fourth interconnect is coupled to the third die and positioned laterally offset from the third die such that the third interconnect extends beyond the fourth die.

Abstract: Disclosed herein is a glass composition that includes, based on the total weight of the composition, 52 wt % to 58 wt % of SiO2, 12 wt % to 16 wt % of Al2O3, 16 wt % to 26 wt % of B2O3, greater than 0 wt % and not greater than 2 wt % of MgO, 1 wt % to 6 wt % of CaO, greater than 1 wt % and lower than 5 wt % of TiO2, greater than 0 wt % and not greater than 0.6 wt % of Na2O, 0 wt % to 0.5 wt % of K2O, 0 wt % to 1 wt % of F2, 1 wt % to 5 wt % of ZnO, greater than 0 wt % and not greater than 1 wt % of Fe2O3; and 0.1 wt % to 0.6 wt % of SO3. Also disclosed herein is a glass fiber including the glass composition.

Abstract: A structure includes a first via and a first conductive line embedded in a first dielectric layer and spaced apart from each other by the first dielectric layer. A first metal pattern disposed on the first via and embedded in a second dielectric layer. A first conductive via disposed on the first conductive line and embedded in the second dielectric layer. The first metal pattern and the first conductive via are spaced apart from each other and are located on a first horizontal level, and the first metal pattern has an open ring shape. A second via disposed on the first metal pattern and embedded in a third dielectric layer. An inductor structure including the first via, the first metal pattern, and the second via.

Abstract: A stacked die structure for a semiconductor device generally includes a primary level with a first die formed in a wafer, and a second level with a second die coupled to the first die. A third level includes a third die coupled to the second die. The levels have conductive first, second, and third interconnects, respectively, extending from active sides of the dies and may be bonded prior to stacking the dies. The dies may be stacked in an offset or rotated position relative to each other such that the interconnects extend beyond each of the other dies to contact a redistribution layer that forms electrical connections with external components. In some configurations, a fourth level having a fourth die and a conductive fourth interconnect is coupled to the third die and positioned laterally offset from the third die such that the third interconnect extends beyond the fourth die.

Abstract: A semiconductor package includes an interconnect structure, an insulating layer and a conductive layer. The interconnect structure includes a first surface and a second surface opposite to the first surface. The insulating layer contacts the interconnect structure. The insulating layer includes a third surface contacting the second surface of the interconnect structure and a fourth surface opposite to the third surface. The conductive layer is electrically coupled to the interconnect structure. The conductive layer has a continuous portion extending from the second surface to the fourth surface.

Abstract: A semiconductor package includes an interconnect structure having a first surface and a second surface opposite to the first surface, an insulating layer contacting the second surface of the interconnect structure wherein the insulating layer has a third surface facing the second surface of the interconnect structure and a fourth surface opposite to the third surface, at least one optical chip over the fourth surface of the insulating layer and electrically coupled to the interconnect structure, and a molding compound over the first surface of the interconnect structure.

Abstract: A method includes embedding a die in a molding material; forming a first dielectric layer over the molding material and the die; forming a conductive line over an upper surface of the first dielectric layer facing away from the die; and forming a second dielectric layer over the first dielectric layer and the conductive line. The method further includes forming a first trench opening extending through the first dielectric layer or the second dielectric layer, where a longitudinal axis of the first trench is parallel with a longitudinal axis of the conductive line, and where no electrically conductive feature is exposed at a bottom of the first trench opening; and filling the first trench opening with an electrically conductive material to form a first ground trench.

Abstract: A sensor system includes a sensing panel, at least one multiplexer and a controller. The sensing panel includes one or more sensing areas. The multiplexer is coupled to the one or more sensing areas through one or more connecting wire groups on the sensing panel, wherein each of the connecting wire groups includes one or more connecting wires. The controller is coupled to the at least one multiplexer via one or more control wires and one or more sensing wires. Each of the at least one multiplexer includes one or more switch groups each coupled between one of the one or more sensing wires and one of the connecting wire groups, and each of the switch groups includes one or more switches respectively controlled by one or more control signals transmitted through the one or more control wires.

Abstract: A fingerprint detecting system comprises a fingerprint module, for receiving a fingerprint driving signal and performing a frequency modulation on the fingerprint driving signal, to correspondingly outputting a fingerprint signal with a first frequency based on the fingerprint driving signal, and a signal processing circuit, coupled to the fingerprint module, for receiving the fingerprint signal with the first frequency, performing a frequency demodulation to shift the first frequency of the fingerprint signal to a second frequency, and filtering the fingerprint signal with the second frequency based on the first frequency, whereby the filtered fingerprint signal is used for a fingerprint data analysis.

Abstract: A semiconductor package includes a redistribution structure, a memory wafer, semiconductor dies and conductive vias. The memory wafer, disposed over the redistribution structure, includes at least one memory die. The semiconductor dies are disposed side by side with respect to each other, between the memory wafer and the redistribution structure, and are electrically connected to the redistribution structure. The conductive vias electrically connect the at least one memory die with the redistribution structure. A semiconductor package includes a redistribution structure, a reconstructed wafer, and a heat sink. The reconstructed wafer is disposed on the redistribution structure. The reconstructed wafer includes logic dies and memory dies. The logic dies are electrically connected to the redistribution structure. The memory dies are electrically connected to the redistribution structure and vertically stacked with the logic dies. The heat sink is disposed on the reconstructed wafer.

Abstract: A manufacturing method of a semiconductor package is provided. The method includes: providing an initial rigid-flexible substrate, wherein the initial rigid-flexible substrate includes rigid structures and a flexible core laterally penetrating through the rigid structures, and further includes a supporting frame connected to the rigid structures; bonding a package structure onto the initial rigid-flexible substrate, wherein the package structure includes semiconductor dies and an encapsulant laterally surrounding the semiconductor dies; and removing the supporting frame.

Abstract: A switched capacitor circuit includes an output capacitor, a first transmission switch, a first reference buffer, a second transmission switch, a second reference buffer and a charge compensation circuit. The output capacitor includes a first terminal and a second terminal, wherein the first terminal is coupled to an output terminal of the switched capacitor circuit, and the second terminal is coupled to a reference node. The first transmission switch is coupled to the reference node. The first reference buffer is coupled to the first transmission switch. The second transmission switch is coupled to the reference node. The second reference buffer is coupled to the second transmission switch. The charge compensation circuit is coupled to the reference node.

Abstract: A fingerprint detecting system comprises a fingerprint module, for receiving a fingerprint driving signal and performing a frequency modulation on the fingerprint driving signal, to correspondingly outputting a fingerprint signal with a first frequency based on the fingerprint driving signal, and a signal processing circuit, coupled to the fingerprint module, for receiving the fingerprint signal with the first frequency, performing a frequency demodulation to shift the first frequency of the fingerprint signal to a second frequency, and filtering the fingerprint signal with the second frequency based on the first frequency, whereby the filtered fingerprint signal is used for a fingerprint data analysis.

Abstract: A fingerprint detecting system comprises a fingerprint module, for detecting a fingerprint of a user and outputting a current signal according to the detected fingerprint, and a signal processing circuit, coupled to the fingerprint module, for receiving the current signal from the fingerprint module, performing a offset cancellation for the current signal to remove an offset of the current signal, and converting the current signal without the offset to a voltage signal for fingerprint data analysis.

Abstract: A power supply device includes a housing having a socket opening, and a pair of sliding grooves are formed on the socket opening. A guiding piece is formed at a bottom of each sliding groove, and the guiding piece includes a positioning section and a guiding section. A power socket passes through the sliding grooves along the guiding section, and one side of the power socket is abutted against the positioning section so as to contact the socket opening. A cover plate is provided with a pair of clips corresponding to the sliding grooves, and the clips are inserted into the pair of sliding grooves and abutted against a side of the power socket for positioning the power socket.