Abstract: A flushing switch device with automatic pressing stroke detection is provided, which is applied to the flushing switches of a toilet. The flushing switch device with automatic pressing stroke detection includes a capacitive sensor, an actuator, and a protector. The capacitive sensor senses a user's hand movements to generate a sensing signal. The actuator includes a driver and a pressing mechanism; the driver drives the pressing mechanism to press one of the flushing switches. The protector includes a detector and a controller; the detector detects a load variation during an operation of the actuator to generate a detection signal; the controller receives the sensing signal and correspondingly generates a control signal to control the actuator according to the sensing signal and the detection signal.

Abstract: A semiconductor device includes a first cell. The first cell includes a first functional feature, a first sensitivity region, at least one anchor node, wherein each of the at least one anchor node is different from the first functional feature, and a number of anchor nodes of the at least one anchor node linked to the first functional feature is based on a position of the first functional feature relative to the first sensitivity region. The semiconductor device further includes a second cell abutting the first cell. The second cell includes a second functional feature, wherein the second functional feature satisfies a minimum spacing requirement with respect to the first functional feature.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes an electrical interconnect structure, a thermal interconnect structure, and a thermal passivation layer over a substrate. The electrical interconnect structure includes interconnect vias and interconnect wires embedded within interconnect dielectric layers. The thermal interconnect structure is arranged beside the electrical interconnect structure and includes thermal vias, thermal wires, and/or thermal layers. Further, the thermal interconnect structure is embedded within the interconnect dielectric layers. The thermal passivation layer is arranged over a topmost one of the interconnect dielectric layers. The thermal interconnect structure has a higher thermal conductivity than the interconnect dielectric layers.

Abstract: An optical member driving mechanism for connecting an optical member is provided, including a fixed portion and a first adhesive member. The fixed portion includes a first member and a second member, wherein the first member is fixedly connected to the second member via the first adhesive member.

Abstract: Disclosed are some implementations of systems, apparatus, methods and computer program products for implementing a scalable computing system. The scalable computing system includes an intermediate system that facilitates communications between a core server system and a third-party system. The core server system processes a client request for a third-party service in association with a web page having a corresponding web address. The intermediate system communicates with the core server system to obtain a session token, and transmits the session token and web address to the third-party system. The third-party system may then access the web page via the web address using the session token.

Abstract: An information handling system includes a touchpad that accepts touch inputs to move a cursor on a display and that deflects at a front side to accept button inputs. A bracket is disposed between a touch detection surface and circuit board of the touchpad to bias the touch detection surface up and deflect in response to a push down as a button input. Conical spring ground devices coupled to the circuit board on opposing sides of the bracket interface with an ohmmeter included on the circuit board that detects a resistance from a first ground device through the system ground to a second ground device. Resistance across ground is applied by the touchpad processor to adjust touch detection sensitivity and avoid ghost inputs.

Abstract: A method of slicing wafers from a monocrystalline semiconductor ingot includes attaching a circumferential edge of the ingot to a bond beam and positioning sacrificial disks adjacent longitudinal end faces of the ingot. One sacrificial disk is positioned adjacent each of the longitudinal end faces. The method also includes connecting the bond beam to a wire saw that includes a wire web and performing a slicing operation on the ingot by operating the wire saw to drive the wire web and move the bond beam and the ingot in a movement direction towards the wire web to slice the wafers from the ingot.

Abstract: A system for slicing wafers from a monocrystalline semiconductor ingot includes a wire saw, a bond beam, the monocrystalline semiconductor ingot, and two sacrificial disks. The wire saw includes a wire web and wire guides operable to drive the wire web during a slicing operation. The bond beam is connected to the wire saw. The wire saw is operable to move the bond beam in a movement direction towards the wire web during the slicing operation to slice the wafers from the ingot. The ingot includes longitudinal end faces and a circumferential edge extending between the longitudinal end faces. The ingot is attached to the bond beam along the circumferential edge. One sacrificial disk is positioned adjacent each of the longitudinal end faces of the ingot to inhibit uncontrolled breakage of the wafers during the slicing operation.

Abstract: Method to form low-contact-resistance contacts to source/drain features are provided. A method of the present disclosure includes receiving a workpiece including an opening that exposes a surface of an n-type source/drain feature and a surface of a p-type source/drain feature, selectively depositing a first silicide layer on the surface of the p-type source/drain feature while the surface of the n-type source/drain feature is substantially free of the first silicide layer, depositing a metal layer on the first silicide layer and the surface of the n-type source/drain feature, and depositing a second silicide layer over the metal layer. The selectively depositing includes passivating the surface of the surface of the n-type source/drain features with a self-assembly layer, selectively depositing the first silicide layer on the surface of the p-type source/drain feature, and removing the self-assembly layer.

Abstract: A memory structure including a substrate, charge storage layers, and a gate is provided. The charge storage layers are located on the substrate. The gate is located on the substrate on one side of the charge storage layers. The gate extends along a first direction. The gate has a protruding portion protruding along a second direction. The second direction intersects the first direction. The protruding portion is located between two adjacent charge storage layers arranged along the first direction.

Abstract: A scraper includes a blade body defining a rear end and a front end opposite the rear end. The blade body is provided with an end face at the front end, and the end face has a first edge connected to a bottom surface and a second edge connected to an top surface opposite the bottom surface. The top surface is provided with a plurality of grooves, and each of the plurality of grooves has a first end connected to the end face and a second end extended toward the rear end. A first thickness is formed between the first edge and the second edge, and a second thickness is formed between the first edge and the first end. The second thickness is less than the first thickness. The scraper, through the aforementioned structure, can provide good scraping efficiency while maintaining good structural strength.

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

Abstract: An integrated circuit (IC) with conductive structures and a method of fabricating the IC are disclosed. The method includes depositing a first dielectric layer on a semiconductor device, forming a conductive structure in the first dielectric layer, removing a portion of the first dielectric layer to expose a sidewall of the conductive structure, forming a barrier structure surrounding the sidewall of the conductive structure, depositing a conductive layer on the barrier structure, and performing a polishing process on the barrier structure and the conductive layer.

Abstract: A light source device includes a light guide plate, an optical adhesive, and a light source element. The light guide plate includes a light guide substrate and an enhancement layer. The light guide substrate has a light incident surface, a first surface, and a second surface. The first surface is opposite to the second surface, and the light incident surface extends between the first surface and the second surface. The enhancement layer is disposed on the light guide substrate. A thickness of the enhancement layer is from 1 micrometer to 25 micrometers and a first refractive index of the light guide substrate is greater than a second refractive index of the enhancement layer. The optical adhesive is interposed between the first surface of the light guide substrate and the optical adhesive. The light source element is disposed beside the light incident surface to emit light toward the light incident surface.

Abstract: A wheeled stand for a table saw has a stand body, two wheels rotatably connected to the stand body, and a kickstand pivotably connected to the stand body. The stand body has a first side, a second side, an infeed side, and an outfeed side. The two wheels are disposed near the second side of the stand body. The kickstand disposed at the outfeed side of the stand body and has a folded position and an unfolded position in which the kickstand obliquely extends downwardly and away from the infeed side of the stand body. The kickstand can be unfolded and support the stand body at the outfeed side thereof during cutting a workpiece to prevent the wheeled stand from being tipped over.

Abstract: A method for packing includes a preparing step, a moving step, a first time feeding strap step, an encircling article step, a first time tightening step, a second time feeding strap step, a manual inserting step, a second time tightening step, and a strap cutting and bonding step. A strap feeding and retreating control unit of the strapping machine is controlled to tighten the packing strap tightly around the article, and then the strap feeding and retreating control unit is controlled to automatically pull out the packing strap, so that two insertion spaces are created between the packing strap and the article. The two right-angle pad elements can be respectively inserted into the two insertion spaces. Then, the packing strap is tightened to tightly wrap around the article and the two right-angle pad elements. Next, the packing strap is cut and bonded to complete the packing action of the article.

Abstract: A method includes forming a first transistor over a substrate, in which the first transistor includes first source/drain epitaxy structures; forming a second transistor over the first transistor, in which the second transistor includes second source/drain epitaxy structures; forming an opening extending through one of the second source/drain epitaxy structures and exposing a top surface of one of the first source/drain epitaxy structures; performing a first deposition process to form a first metal in the opening, in which a first void is formed in the first metal during the first deposition process; performing a first etching back process to the first metal until the first void is absent; and performing a second deposition process to form a second metal in the opening and over the first metal.

Abstract: An immersion cooling system is provided. The immersion cooling system includes a box, an upper cover, plural fixing components, plural latches and a link module. The box has an opening upwardly. The upper cover covers the opening. The fixing components are disposed on the box and arranged adjacent to the outer perimeter of the opening. The latches corresponding to the fixing components are disposed on the upper cover. The link module includes plural crossbars corresponding to the latches. The link module moves downwardly close to the upper cover, scroll-wheels of the latches roll along limiting surfaces of corresponding fixing components and press against the upper cover, the upper cover closes the opening to form an airtight space. The link module moves upwardly away from the upper cover, the scroll-wheels are separated away from the limiting surfaces of corresponding fixing components, allows the upper cover to separate from the opening.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate. The semiconductor device includes a P-type device over the semiconductor fin and an N-type device over the semiconductor fin. The P-type device includes a first source/drain (S/D) feature adjacent a first gate structure. The P-type device includes a dipole layer over the first S/D feature, where the dipole layer includes a first metal and a second metal different from the first metal. The P-type device further includes a first silicide layer over the dipole layer, where the first silicide layer includes the first metal. The N-type device includes a second S/D feature adjacent a second gate structure. The N-type device further includes a second silicide layer directly contacting the second S/D feature, where the second silicide layer includes the first metal, and where a composition of the second silicide layer is different from that of the dipole layer.

Abstract: A semiconductor device structure and methods of forming the same are described. In some embodiments, the structure includes an N-type source/drain epitaxial feature disposed over a substrate, a P-type source/drain epitaxial feature disposed over the substrate, a first silicide layer disposed directly on the N-type source/drain epitaxial feature, and a second silicide layer disposed directly on the P-type source/drain epitaxial feature. The first and second silicide layers include a first metal, and the second silicide layer is substantially thicker than the first silicide layer. The structure further includes a third silicide layer disposed directly on the first silicide layer and a fourth silicide layer disposed directly on the second silicide layer. The third and fourth silicide layer include a second metal different from the first metal, and the third silicide layer is substantially thicker than the fourth silicide layer.