Abstract: A device for adjusting tautness of a belt of a motor of a table saw is provided with an adjustment screw, and a pivot. In response to unfastening the adjustment screw, the motor counterclockwise rotates about the pivot to tighten the belt until predetermined tautness is obtained. The adjustment screw fastens to keep the belt at the predetermined tautness. Alternatively, the motor clockwise rotates about the pivot to loosen the belt.

Abstract: A directional patterning method includes following steps. A substrate is provided with a mask layer thereon, and the mask layer has at least one opening pattern therein. A cyclic deposition and etching process is performed to increase a length of the at least one opening pattern.

Abstract: A data packet transmission method—that includes: obtaining, by a terminal, N application programs that are running; and if the N application programs include an application program including a low-latency service; determining whether an unlicensed frequency band is in a congestion state; and instructing a network device to schedule a data packet of the terminal to a licensed frequency band for transmission when the unlicensed frequency band is in a congestion state. When determining that the N running application programs include the application program including the low-latency service, the terminal may instruct the network device to schedule the data packet of the terminal to the licensed frequency band for transmission, so as to transmit a data packet of the low-latency service by using the licensed frequency band. Resources in the licensed frequency band are centrally scheduled by the network device, instead of being used through contention.

Abstract: A scale assembly of a table saw includes front and rear outer slide members disposed at front and rear ends of a slide mechanism respectively; front and rear inner slide members disposed at front and rear ends of a table assembly respectively wherein the front inner slide member slides in the front outer slide member, and the rear inner slide member slides in the rear outer slide member; a block member secured to a front end of a rip fence assembly and including a channel and a spring biased member; and a lever in the channel and including an exposed trigger, a projection, and first and second recesses. In a locked position, the spring biased member has one end entered the first recess and the projection enters a lengthwise cavity on an outer surface of the front outer slide member.

Abstract: The present disclosure is related to a detecting device which includes a fixing component, a sensing component, and a terminal. The fixing component is fixed to an object under test and generates a first magnetic field. The sensing component includes a driving module and a reference module. The driving module generates a second magnetic field, and the driving module further generates a sensing signal according to an electromagnetic induction produced by the first magnetic field and the second magnetic field. The reference module is spaced from the driving module by a distance, such that the reference module is outside of the second magnetic field and generates a reference signal. The terminal produces detection information according to the sensing signal and the reference signal.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a semiconductor chip; a substrate facing an active surface of the semiconductor chip; and a conductive bump extending from the active surface of the semiconductor chip toward the substrate, wherein the conductive bump comprises: a plurality of bump segments comprising a first group of bump segments and a second group of bump segments, wherein each bump segment comprises the same segment height in a direction orthogonal to the active surface of the semiconductor chip, and each bump segment comprises a volume defined by the multiplication of the segment height with the average cross-sectional area of the bump segment; wherein the ratio of the total volume of the first group of bump segments to the total volume of the second group of bump segments is between about 0.03 and about 0.8.

Abstract: A method of generating a plurality of photomasks includes generating a circuit graph. The circuit graph comprises a plurality of vertices and a plurality of edges. Each of the plurality of vertices is representative of one of a plurality of conductive lines. The plurality of edges are representative of a spacing between the conductive lines less than an acceptable minimum distance. Kn+1 graph comprising a first set of vertices selected from the plurality of vertices connected in series by a first set of edges selected from the plurality of edges and having at least one non-series edge connection between a first vertex and a second vertex selected from the first set of vertices is reduced by merging a third vertex into a fourth vertex selected from the first set of the plurality of vertices. An n-pattern conflict check is performed and the photomasks generated based on the result.

Abstract: An input device includes a wheel supporting structure, a scroll wheel, a hook part, a linking part, and a switching mechanism. The scroll wheel is rotatably supported by the wheel supporting structure, is exposed from the input device, and has a rotary shaft with a plurality of toothed slots thereon. The hook part is disposed biased on the wheel supporting structure to selectively engage with the toothed slots. The linking part is pivotally connected to the wheel supporting structure. The switching mechanism includes an abutting part and a switching part. The abutting part abuts against the linking part. The switching part is coupled to the abutting part. Therein, the switching mechanism is operable to move the abutting part through the switching part to rotate the linking part to abut against and move the hook part to disengage from the toothed slots.

Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.

Abstract: A method includes removing a dummy gate to leave a trench between gate spacers, forming a gate dielectric extending into the trench, depositing a metal layer over the gate dielectric, with the metal layer including a portion extending into the trench, depositing a filling region into the trench, with the metal layer have a first and a second vertical portion on opposite sides of the filling region, etching back the metal layer, with the filling region at least recessed less than the metal layer, and remaining parts of the portion of the metal layer forming a gate electrode, depositing a dielectric material into the trench, and performing a planarization to remove excess portions of the dielectric material. A portion of the dielectric material in the trench forms at least a portion of a dielectric hard mask over the gate electrode.

Abstract: System that facilitates rapid onboarding of an autonomous (cashier-less) store by capturing images of the store's items from multiple angles, with varying backgrounds, and that builds a classifier training dataset from these images. The system may have cameras in different positions, and backgrounds that generate different background colors. It may have a platform for items that can be switched between a transparent and non-transparent state; cameras below the platform may therefore capture images of the bottom side of the item when the platform is transparent. When an item is placed in the imaging system, a fully automated process may generate a sequence of background colors and may capture and process images from all of the cameras to create training images. Images of the item from multiple angles, including views of the entire external surface of the item, may be captured without requiring an operator to move or reorient the item.

Abstract: A method for forming a chip package structure is provided. The method includes disposing a chip over a substrate. The method includes forming a heat-spreading wall structure over the substrate. The heat-spreading wall structure is adjacent to the chip, and there is a first gap between the chip and the heat-spreading wall structure. The method includes forming a first heat conductive layer in the first gap. The method includes forming a second heat conductive layer over the chip. The method includes disposing a heat-spreading lid over the substrate to cover the heat-spreading wall structure, the first heat conductive layer, the second heat conductive layer, and the chip. The heat-spreading lid is bonded to the substrate, the heat-spreading wall structure, the first heat conductive layer, and the second heat conductive layer.

Abstract: The present invention provides a system and a method for measuring physiological signal. The system includes a plurality of electrodes and a measurement apparatus. A plurality of first electrodes of the electrodes are attached on a first area of a subject. A plurality of second electrodes of the electrodes are attached on a second area of the subject. The measurement apparatus is coupled to the electrodes and performs testing on the first electrodes and the second electrodes to obtain a plurality of testing results. The measurement apparatus selects one of the first electrodes as a first measuring electrode and selects one of the second electrodes as a second measuring electrode according to the testing results. The measurement apparatus measures a physiological signal of the subject through the first measuring electrode and the second measuring electrode.

Abstract: A semiconductor structure includes a substrate having a surface and a conductive via in the substrate. The surface has an inner region and an outer region surrounding the inner region. The semiconductor structure also includes an under bump metallurgy (UBM) pad on the surface and within the outer region, where the UBM pad has a first zone and a second zone. The first zone faces towards a center of the surface and the second zone faces away from the center of the surface. The conductive via is disposed outside the second zone and at least partially overlaps the first zone from a top view perspective.

Abstract: The invention relates to an astaxanthin compound composition, the preparation system and the method of preparing the astaxanthin compound composition. The astaxanthin compound composition comprises Haematococcus pluvialis ingredient, extract of wolfberry, extract of jujube, and arginine. The preparation system includes a mixing unit and an additive-adding unit, those which operate sequentially to prepare a compound astaxanthin compound composition, the invention thus provides a stable and sustainably active compound astaxanthin compound composition with long shelf-life, which can bring favorable effects on regulating the lipid profile.

Abstract: The present invention encompasses compositions comprising a polyurethane and a block copolymer with at least two homopolymer subunits. In one aspect, compositions of the present disclosure are coating compositions. In another aspect, compositions of the present disclosure are adhesive compositions.

Abstract: The present invention relates to the communications field, and discloses a Wi-Fi hotspot recommendation method, a terminal, and a graphical user interface, so as to resolve a problem that a Wi-Fi hotspot selected by a user according to information such as an RSSI is not necessarily a Wi-Fi hotspot with optimal Internet surfing experience in an area in which the user is located. A specific solution is as follows: A terminal scans a Wi-Fi hotspot; determines an Internet-accessible hotspot in Wi-Fi hotspots that are obtained by means of scanning; determines network quality obtained when the terminal accesses a network by using the Internet-accessible hotspot; and displays an identifier of the Internet-accessible hotspot and an identifier that indicates the network quality obtained when the terminal accesses the network by using the Internet-accessible hotspot. The present invention is applied to a Wi-Fi hotspot recommendation process.

Abstract: A wireless communication includes a control circuit and a receiver (RX) circuit. The control circuit obtains indicator information from another wireless communication system, identifies a transmitter (TX) and receiver (RX) packet delivery scenario as one of a packet overlapping scenario and a packet non-overlapping scenario according to the indicator information, and generates RX gain control information in response to the TX and RX packet delivery scenario. The RX circuit refers to the RX gain control information to set an RX gain used for receiving data.

Abstract: Semiconductor device packages and method are provided. A semiconductor device package according to the present disclosure includes a substrate including a first region, a passive device disposed over the first region of the substrate, a contact pad disposed over the passive device, a passivation layer disposed over the contact pad, a recess through the passivation layer, and an under-bump metallization (UBM) layer. The recess exposes the contact pad and the UBM layer includes an upper portion disposed over the passivation layer and a lower portion disposed over a sidewall of the recess. A projection of the upper portion of the UBM layer along a direction perpendicular to the substrate falls within an area of the contact pad.

Abstract: Systems, methods, and devices are described herein for integrated circuit (IC) layout validation. A plurality of IC patterns are collected which include a first set of patterns capable of being manufactured and a second set of patterns incapable of being manufactured. A machine learning model is trained using the plurality of IC patterns. The machine learning model generates a prediction model for validating IC layouts. The prediction model receives data including a set of test patterns comprising scanning electron microscope (SEM) images of IC patterns. Design violations associated with an IC layout are determined based on the SEM images and the plurality of IC patterns. A summary of the design violations is provided for further characterization of the IC layout.