Abstract: A method for correcting pixel information of color pixels on a color filter array of an image sensor includes: establishing an M×M distance factor table, selecting M×M pixels of the color filter array, calculating a red/green/blue-color contribution from the red/green/blue pixels to a target pixel in the selected M×M pixels, calculating a red/blue/green-color pixel performance of the target pixel, calculating a red/blue/green-color correcting factor, obtaining a corrected pixel information of each of the red/green/blue pixels, by applying the red/green/blue-color correcting factor to the measured pixel information of each of the red/green/blue pixels.

Abstract: A method for correcting pixel information of color pixels on a color filter array of an image sensor includes: establishing an M×M distance factor table, selecting M×M pixels of the color filter array, calculating a red/green/blue-color contribution from the red/green/blue pixels to a target pixel in the selected M×M pixels, calculating a red/blue/green-color pixel performance of the target pixel, calculating a red/blue/green-color correcting factor, obtaining a corrected pixel information of each of the red/green/blue pixels, by applying the red/green/blue-color correcting factor to the measured pixel information of each of the red/green/blue pixels.

Abstract: A method for correcting pixel information of color pixels on a color filter array of an image sensor includes: establishing an M×M distance factor table, selecting M×M pixels of the color filter array, calculating a red/green/blue-color contribution from the red/green/blue pixels to a target pixel in the selected M×M pixels, calculating a red/blue/green-color pixel performance of the target pixel, calculating a red/blue/green-color correcting factor, obtaining a corrected pixel information of each of the red/green/blue pixels, by applying the red/green/blue-color correcting factor to the measured pixel information of each of the red/green/blue pixels.

Abstract: A new method is provided for the creation of a dummy pattern. A typical wafer exposure mask contains a Clear Out Window (CLWD) pattern, this CLWD pattern is of no value during the process of shielding the area on the surface of the wafer where the alignment mark must be placed. This CLWD can therefore be used to create a dummy overlay pattern, resulting in a reduction in the wafer scaling error that typically occurs as a result of metal deposition. For the same reasons, a dummy overlay pattern can also be created in the scribe lines of the wafer surface.

Abstract: A verification photomask disclosed. The mask may be for process window verification purposes when switching between fabrication equipment, and/or for optical proximity correction (OPC) verification purposes. The mask includes device areas that are separated by scribe lines. One or more verification patterns are integrated into the scribe lines for verification purposes. These patterns can include: proximity patterns, photoresist-spacing patterns, polysilicon end cap patterns, as well as other patterns. A method for making the mask, and a semiconductor device created at least in part by a method including use of the mask, are also disclosed.

Abstract: A variable transmission focal mask to compensate lens heating is disclosed. A semiconductor fabrication alignment and exposure equipment includes an exposure and alignment unit, a variable transmission mask, and a stage. The unit has a light source and a lens. The mask is under the lens, and at least indirectly measures focus. The mask further can adjust the focus in real time in response to determining that the focus is out of specification. A wafer is placed on the stage for exposure to the light source through a mask or a reticle. The variable transmission mask normally has a substantially high transmission of light rating that can be adjusted downward to adjust the focus. For example, the mask can be a liquid crystal display (LCD) that can be darkened to so reduce its transmission of light rating.

Abstract: An optical proximity correction (OPC) verification mask is disclosed. The mask includes device areas that are separated by scribe lines. One or more OPC test patterns are integrated into the scribe lines for verification purposes. These patterns can include: line-end shortening (LES) patterns, such as serifs and hammerheads added to the ends of lines; corner rounding patterns, such as positive and negative serifs; and, scattering bars (SB's) and anti-scattering bars (ASB's) to compensate for isolated-dense proximity effects and isolated-feature depth of focus reduction. Other OPC patterns may also be included. A method for making the mask, and a semiconductor device created at least in part by a method including use of the mask, are also disclosed.

Abstract: A variable transmission focal mask to compensate lens heating is disclosed. A semiconductor fabrication alignment and exposure equipment includes an exposure and alignment unit, a variable transmission mask, and a stage. The unit has a light source and a lens. The mask is under the lens, and at least indirectly measures focus. The mask further can adjust the focus in real time in response to determining that the focus is out of specification. A wafer is placed on the stage for exposure to the light source through a mask or a reticle. The variable transmission mask normally has a substantially high transmission of light rating that can be adjusted downward to adjust the focus. For example, the mask can be a liquid crystal display (LCD) that can be darkened to so reduce its transmission of light rating.

Abstract: An optical proximity correction (OPC) verification mask is disclosed. The mask includes device areas that are separated by scribe lines. One or more OPC test patterns are integrated into the scribe lines for verification purposes. These patterns can include: line-end shortening (LES) patterns, such as serifs and hammerheads added to the ends of lines; corner rounding patterns, such as positive and negative serifs; and, scattering bars (SB's) and anti-scattering bars (ASB's) to compensate for isolated-dense proximity effects and isolated-feature depth of focus reduction. Other OPC patterns may also be included. A method for making the mask, and a semiconductor device created at least in part by a method including use of the mask, are also disclosed.

Abstract: A verification photomask disclosed. The mask may be for process window verification purposes when switching between fabrication equipment, and/or for optical proximity correction (OPC) verification purposes. The mask includes device areas that are separated by scribe lines. One or more verification patterns are integrated into the scribe lines for verification purposes. These patterns can include: proximity patterns, photoresist-spacing patterns, polysilicon end cap patterns, as well as other patterns. A method for making the mask, and a semiconductor device created at least in part by a method including use of the mask, are also disclosed.

Abstract: The present invention provides a method of forming a Self-aligned contact with fewer process steps. The invention includes a three step insitu process of (1) a first descum step, (2) a dry etch step and (3) second descum step followed by (4) an isotropic etch step. The process comprises coating, exposing, and developing, and baking a photoresist layer over an insulating layer. In an important process stage, three steps are performed: (1) an insitu first descum step, (2) a dry etch step and (3) a second descum step. The dry etch step forms a first self-aligned contact opening. Next, the first contact opening is isotropically etched forming a smoother second contact opening 44. The photoresist layer 30 is then removed. Lastly, a metal layer 60 is deposited in said second self aligned contact opening 44. The invention reduces cycle time and eliminates several process steps while maintaining high yields. The smoother second contact opening 44 provides better metal adhesion.