Patents by Inventor Chin Kuo

Chin Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7308774
    Abstract: A solar insect killer and catcher includes a casing, a solar plate, a power supply, a control switch, a timer, a circuit board and a plurality of light-emitting elements to emit the lights having various wavelengths. If a user intends to kill or catch the insects, he/she can prepare a water-collecting basin or dig a water-collecting pit outdoors. When the casing emits the lights having various wavelengths according to the preset timings, many kinds of insects can be attracted by the lights and then fly into the water-collecting basin or water-collecting pit. As a result, the insects cannot escape from the water collecting basin or water collecting pit and be captured therein.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: December 18, 2007
    Assignee: Aleague International Co.
    Inventor: Chin-Kuo Lin
  • Patent number: 7307316
    Abstract: A thin film transistor, comprising a first N-type LDD (Lightly Doped Drain) and a second N-type LDD, is provided. The two N-type LDDs are formed in a semiconductor layer by tilted implantation with a gate electrode serving as a mask. The two N-type LDDs are adjacent to source/drain regions, respectively. The thin film transistor further comprises a third P-type LDD and a fourth P-type LDD. The two P-type LDDs are formed in a semiconductor layer by tilted implantation with a gate electrode serving as a mask. The source/drain regions and the two N-type LDDs are surrounded by the two P-type LDDs, respectively.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: December 11, 2007
    Assignee: AU Optronics Corp.
    Inventor: Chin-Kuo Ting
  • Publication number: 20070190701
    Abstract: A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so that the remaining metal layer beside the patterned polysilicon layer forms a source and a drain. A gate insulation layer is formed on the substrate to cover the source, the drain and the patterned polysilicon layer. A gate is formed on the gate insulation layer over the patterned polysilicon layer.
    Type: Application
    Filed: August 11, 2006
    Publication date: August 16, 2007
    Applicant: QUANTA DISPLAY INC.
    Inventor: Chin-Kuo Ting
  • Publication number: 20070151141
    Abstract: A solar insect killer and catcher includes a casing, a solar plate, a power supply, a control switch, a timer, a circuit board and a plurality of light-emitting elements to emit the lights having various wavelengths. If a user intends to kill or catch the insects, he/she can prepare a water-collecting basin or dig a water-collecting pit outdoors. When the casing emits the lights having various wavelengths according to the preset timings, many kinds of insects can be attracted by the lights and then fly into the water-collecting basin or water-collecting pit. As a result, the insects cannot escape from the water collecting basin or water collecting pit and be captured therein.
    Type: Application
    Filed: January 5, 2006
    Publication date: July 5, 2007
    Inventor: Chin-Kuo Lin
  • Publication number: 20070153189
    Abstract: A method for manufacturing a substrate of a flat panel display device is disclosed. The method includes following steps: providing a substrate having patterned transparent electrode thereon; and forming an alignment layer on the surface of the transparent electrode. The formed alignment layer includes a homeotropic alignment film and a homogeneous alignment film adjacent to the homeotropic alignment film. Moreover, the homeotropic alignment film is formed utilizing printing on or on a periphery of to the homogeneous alignment film. Through this method, the flat panel display device can be manufactured without increasing the quantity of the mask cycles, and without a complex process of gradation exposure. Moreover, the problem resulted from multiple rubbing can be reduced, and the cost for manufacturing can be decreased.
    Type: Application
    Filed: November 21, 2006
    Publication date: July 5, 2007
    Applicant: Quanta Display Inc.
    Inventor: Chin-Kuo Ting
  • Publication number: 20070090513
    Abstract: A power module fabrication method and structure thereof is disclosed.
    Type: Application
    Filed: March 9, 2006
    Publication date: April 26, 2007
    Inventors: Chin Kuo, Yi Hsieh
  • Patent number: 7209435
    Abstract: Systems and methods are described for providing network route redundancy through Layer 2 devices, such as a loop free Layer 2 network having a plurality of switching devices. A virtual switch is coupled to the loop free Layer 2 network, the virtual switch having two or more switches configured to transition between master and backup modes to provide redundant support for the loop free Layer 2 network, the switches communicating their status through use of a plurality of redundancy control packets. The system also includes means for allowing the redundancy control packets to be flooded through the Layer 2 network. The means may include time-to-live data attached to the redundancy control packet which is decremented only when the packets are transferred through devices which are configured to recognize the protocol used in redundancy control packets.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: April 24, 2007
    Assignee: Foundry Networks, Inc.
    Inventors: Andrew Tai-Chin Kuo, Ivy Pei-Shan Hsu, Jordi Moncada-Elias, Raikumar Jalan, Gurudeep Kamat
  • Publication number: 20070059879
    Abstract: A pixel structure is provided, which includes a substrate, a thin film transistor (TFT), a capacitor, a protection layer and a pixel electrode. The substrate has an active device region and a capacitor region and a plurality of openings are formed within the capacitor region. Besides, the TFT is disposed within the active device region, while the capacitor is disposed within the capacitor region and formed on the openings. The protection layer covers the TFT and the capacitor. The pixel electrode is disposed on the protection layer and electrically connected to the TFT and the capacitor.
    Type: Application
    Filed: April 12, 2006
    Publication date: March 15, 2007
    Inventor: Chin-Kuo Ting
  • Publication number: 20070057203
    Abstract: An apparatus for producing an atomic beam comprising an ionization chamber, an ion beam drawing device, a neutralization chamber and a voltage regulating device is provided. The ionization chamber generates an ion beam and the ion beam drawing device draws the ion beam out from the ionization chamber. The neutralization chamber and the voltage regulating device are disposed on the path of the ion beam. Moreover, the ion beam drawing device is disposed between the ionization chamber and the neutralization chamber and the voltage regulating device is disposed between the ion beam drawing device and the neutralization chamber. The energy of the ion beam can be reduced by the voltage regulating device. The ion beam is neutralized to a neutral atomic beam after passing through the neutralization chamber. Therefore, the apparatus for producing the atomic beam provided in this invention can effectively produce the neutral atomic beam.
    Type: Application
    Filed: June 15, 2006
    Publication date: March 15, 2007
    Inventor: Chin-Kuo Ting
  • Publication number: 20070048915
    Abstract: A method for forming a thin film transistor. A buffer layer is formed on a substrate. A single crystal layer is formed on the buffer layer. An amorphous layer is formed on the single crystal layer. The amorphous layer is transferred to a crystallized layer by laser annealing. A gate dielectric layer is formed on the crystallized layer. A gate electrode is formed on the gate dielectric layer, wherein the crystallized layer is a single crystal layer or a polycrystal layer.
    Type: Application
    Filed: March 8, 2006
    Publication date: March 1, 2007
    Inventor: Chin-Kuo Ting
  • Publication number: 20070027937
    Abstract: Methods and apparatuses for backing up data to a database are provided. A specified data set to be backed up is broken down into a plurality of data blocks, each data block is associated with a data block digest, and the data blocks and associated data block digests are stored in the database. When one or more data blocks are subsequently changed, an update to the backup may be performed by adding to the backup data only the data blocks that have changed since the initial backup. Methods and apparatuses for restoring backup data from a database are also provided. Timestamp information associated with the data blocks in the database is used to select the data blocks to be restored.
    Type: Application
    Filed: January 13, 2006
    Publication date: February 1, 2007
    Inventors: Emma McGrattan, Stephen Ball, Sami Moucaddem, Jean-Francois Rivet, Chin Kuo, Frank Yang
  • Publication number: 20070015599
    Abstract: A sports equipment handle includes a handle pipe, at least one groove disposed on the external circumferential surface of the handle pipe and axially extended along the handle pipe, at least one sheet handle strap being wrapped and fixed onto the external circumferential surface where the groove of the handle pipe resides, such that the groove is provided for fixing two corresponding overlapped edges of the sheet handle strap, and the overlapped section of the external circumferential surface is even with the overall external circumferential surface of the handle strap.
    Type: Application
    Filed: July 14, 2005
    Publication date: January 18, 2007
    Inventors: Wei-Chao Yang, Chang-Chin Kuo
  • Patent number: 7113068
    Abstract: A winding structure of an inductor used in a power factor correction circuit is provided. The winding structure includes a ring-shaped core with a gap, a first coil and a second coil wound around the core. The negative end of the first coil and the positive end of the second coil is coupled to form a central tap.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: September 26, 2006
    Inventor: Chin-Kuo Chou
  • Patent number: D532667
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: November 28, 2006
    Assignee: Mobiletron Electronics Co., Ltd.
    Inventors: Kim Y. C. Tsai, Ju-Chien Chen, Fu-Tasi Wu, Tung-Chin Kuo, Hsiang-Po Huang
  • Patent number: D534048
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: December 26, 2006
    Assignee: Mobiletron Electronics Co., Ltd.
    Inventors: Kim Y. C. Tsai, Ju-Chien Chen, Fu-Tasi Wu, Tung-Chin Kuo, Hsiang-Po Huang
  • Patent number: D534406
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: January 2, 2007
    Assignee: Mobiletron Electronics Co., Ltd.
    Inventors: Kim Y. C. Tsai, Ju-Chien Chen, Fu-Tasi Wu, Tung-Chin Kuo, Hsiang-Po Huang
  • Patent number: D534779
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: January 9, 2007
    Assignee: Mobiletron Electronics Co., Ltd.
    Inventors: Kim Y. C. Tsai, Ju-Chien Chen, Fu-Tasi Wu, Tung-Chin Kuo, Hsiang-Po Huang
  • Patent number: D536943
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: February 20, 2007
    Assignee: Mobiletron Electronics Co., Ltd.
    Inventors: Kim Y. C. Tsai, Ju-Chien Chen, Fu-Tasi Wu, Tung-Chin Kuo, Hsiang-Po Huang
  • Patent number: D536944
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: February 20, 2007
    Assignee: Mobiletron Electronics Co., Ltd.
    Inventors: Kim Y. C. Tsai, Ju-Chien Chen, Fu-Tasi Wu, Tung-Chin Kuo, Hsiang-Po Huang
  • Patent number: D541740
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: May 1, 2007
    Assignee: Mobiletron Electronics Co., Ltd.
    Inventors: Kim Y. C. Tsai, Ju-Chien Chen, Fu-Tasi Wu, Tung-Chin Kuo, Hsiang-Po Huang