Patents by Inventor Chin Lee Kuan

Chin Lee Kuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190158024
    Abstract: An apparatus is provided which comprises: a crystal having an input and an output; a first interconnect line having first and second ends, wherein the first end is coupled to the input; a second interconnect line having first and second ends, wherein the first end is coupled to the output; a first capacitor coupled to the input and ground; and a second capacitor coupled to the second end of the second interconnect line. An apparatus is provided which comprises: a high pass filter; a pair of AC coupling capacitors coupled to the high pass filter; a low pass filter coupled to the pair of AC coupling capacitors; and an analog to digital converter (ADC) coupled to the low pass filter.
    Type: Application
    Filed: December 31, 2018
    Publication date: May 23, 2019
    Applicant: Intel Corporation
    Inventors: Khang Choong YONG, Raymond CHONG, Ramaswamy PARTHASARATHY, Stephen HALL, Chin Lee KUAN
  • Publication number: 20190006333
    Abstract: A stiffener on a semiconductor package substrate includes a plurality of parts that are electrically coupled to the semiconductor package substrate on a die side. Both stiffener parts are electrically contacted through a passive device that is soldered between the two stiffener parts and by an electrically conductive adhesive that bonds a given stiffener part to the semiconductor package substrate. The passive device is embedded between two stiffener parts to create a smaller X-Y footprint as well as a lower Z-direction profile.
    Type: Application
    Filed: June 25, 2018
    Publication date: January 3, 2019
    Inventors: Jenny Shio Yin Ong, Seok Ling Lim, Bok Eng Cheah, Jackson Chung Peng Kong, Chin Lee Kuan
  • Patent number: 10171033
    Abstract: An apparatus is provided which comprises: a crystal having an input and an output; a first interconnect line having first and second ends, wherein the first end is coupled to the input; a second interconnect line having first and second ends, wherein the first end is coupled to the output; a first capacitor coupled to the input and ground; and a second capacitor coupled to the second end of the second interconnect line. An apparatus is provided which comprises: a high pass filter; a pair of AC coupling capacitors coupled to the high pass filter; a low pass filter coupled to the pair of AC coupling capacitors; and an analog to digital converter (ADC) coupled to the low pass filter.
    Type: Grant
    Filed: March 25, 2017
    Date of Patent: January 1, 2019
    Assignee: Intel Corporation
    Inventors: Khang Choong Yong, Raymond Chong, Ramaswamy Parthasarathy, Stephen Hall, Chin Lee Kuan
  • Publication number: 20180375438
    Abstract: An apparatus is provided which comprises: a first voltage regulator; a second voltage regulator; and a switch to selectively couple the first voltage regulator to the second voltage regulator, such that a first output node of the first voltage regulator is temporarily coupled to a second output node of the second voltage regulator via the switch.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 27, 2018
    Inventors: Sameer Shekhar, Amit K. Jain, Alexander Waizman, Michael Zelikson, Chin Lee Kuan
  • Publication number: 20180364775
    Abstract: Described is an apparatus which comprises: a power supply node; a plurality of inductors inductively coupled with one another, wherein at least one inductor of the plurality is electrically coupled to the power supply node; a plurality of loads; and a plurality of capacitors coupled to the plurality of inductors, respectively, and also coupled to the plurality of loads, respectively.
    Type: Application
    Filed: June 19, 2017
    Publication date: December 20, 2018
    Inventors: Amit K. Jain, Chin Lee Kuan, Sameer Shekhar
  • Patent number: 10083922
    Abstract: A device and method of utilizing spiral interconnects for voltage and power regulation are shown. Examples of spiral interconnects include air core inductors. An integrated circuit package attached to a motherboard using spiral interconnects is shown. Methods of attaching an integrated circuit package to a motherboard using spiral interconnects are shown including air core inductors. Methods of attaching spiral interconnects include using electrically conductive adhesive or solder.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: September 25, 2018
    Assignee: Intel Corporation
    Inventors: Min Suet Lim, Chin Lee Kuan, Eng Huat Goh, Khang Choong Yong, Bok Eng Cheah, Jackson Chung Peng Kong, Howe Yin Loo
  • Patent number: 10085342
    Abstract: A microelectronic device incorporating an air core inductor having one or more inserts to provide efficiency of the inductor are described. One or more inserts having a selected permeability may be placed within regions defined by coils of the air core inductor. The inserts can be formed of a solid material of the selected permeability or such a material can be applied to other structures, such as circuit components. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: September 25, 2018
    Assignee: Intel Corporation
    Inventors: Bok Eng Cheah, Jackson Chung Peng Kong, Khang Choong Yong, Min Suet Lim, Chin Lee Kuan, Howe Yin Loo
  • Publication number: 20180168043
    Abstract: A microelectronic device incorporating an air core inductor having one or more inserts to provide efficiency of the inductor are described. One or more inserts having a selected permeability may be placed within regions defined by coils of the air core inductor. The inserts can be formed of a solid material of the selected permeability or such a material can be applied to other structures, such as circuit components. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 13, 2016
    Publication date: June 14, 2018
    Inventors: Bok Eng Cheah, Jackson Chung Peng Kong, Khang Choong Yong, Min Suet Lim, Chin Lee Kuan, Howe Yin Loo
  • Publication number: 20180145042
    Abstract: A device and method of utilizing spiral interconnects for voltage and power regulation are shown. Examples of spiral interconnects include air core inductors. An integrated circuit package attached to a motherboard using spiral interconnects is shown. Methods of attaching an integrated circuit package to a motherboard using spiral interconnects are shown including air core inductors. Methods of attaching spiral interconnects include using electrically conductive adhesive or solder.
    Type: Application
    Filed: November 23, 2016
    Publication date: May 24, 2018
    Inventors: Min Suet Lim, Chin Lee Kuan, Eng Huat Goh, Khang Choong Yong, Bok Eng Cheah, Jackson Chung Peng Kong, Howe Yin Loo
  • Publication number: 20180123514
    Abstract: An apparatus is provided which comprises: a crystal having an input and an output; a first interconnect line having first and second ends, wherein the first end is coupled to the input; a second interconnect line having first and second ends, wherein the first end is coupled to the output; a first capacitor coupled to the input and ground; and a second capacitor coupled to the second end of the second interconnect line. An apparatus is provided which comprises: a high pass filter; a pair of AC coupling capacitors coupled to the high pass filter; a low pass filter coupled to the pair of AC coupling capacitors; and an analog to digital converter (ADC) coupled to the low pass filter.
    Type: Application
    Filed: March 25, 2017
    Publication date: May 3, 2018
    Inventors: Khang Choong YONG, Raymond CHONG, Ramaswamy PARTHASARATHY, Stephen HALL, Chin Lee KUAN
  • Publication number: 20170373587
    Abstract: Methods and apparatus relating to a compact partitioned capacitor design for multiple voltage and/or load domains (e.g., with improved decoupling) are described. In an embodiment, a capacitor provides substrate decoupling for a plurality of loads. Moreover, the capacitor is capable of decoupling two or more voltage domains. Furthermore, in some embodiments the capacitor is capable of decoupling two or more voltage domains and mitigating self-noise and/or cross-noise between them. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: June 28, 2016
    Publication date: December 28, 2017
    Applicant: Intel Corporation
    Inventors: Chin Lee Kuan, Sameer Shekhar, Amit K. Jain