Abstract: An electronic device is disclosed. The electronic device includes a substrate, a plurality of color filters disposed on the substrate, an optical film disposed on the plurality of color filter, and a defect disposed between the substrate and the optical film. The optical film has a first base, a protective layer on the first base, and a second base between the first base and the protective layer and having a first processed area. In a top view of the electronic device, the first processed area corresponds to the defect and at least partially overlaps at least two color filters.

Abstract: A display may include an array of pixels that receive control signals from a chain of gate drivers. The pixels can be formed using semiconducting oxide transistors, whereas the gate drivers can be formed using silicon transistor. Each gate driver may include a shift register subcircuit and an output buffer subcircuit. The shift register subcircuit may include a first set of transistors at least partially controlled by one or more shift register clock signals. The output buffer subcircuit may include a second set of transistors at least partially controlled by one or more output buffer clock signals. The output buffer clock signals can toggle independently from the shift register clock signals. Operated in this way, the shift register clock signals can have pulse widths optimized for stability while the output buffer clock signals can have pulse widths optimized for speed.

Abstract: A keyswitch structure includes a baseplate, a keycap disposed over the baseplate and configured to be movable relative to the baseplate, a membrane switch disposed between the keycap and the baseplate and configured to have one or more buffer portions with two open edges opposite to each other, and a first linking bar connected to the keycap and disposed between the keycap and the membrane switch. The first linking bar has a first long side and a first short side connected to each other. When the keycap moves relative to the baseplate, the one or more buffer portions provide buffer to the first short side and/or an end section of the first long side.

Abstract: A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.

Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.

Abstract: A virtual metrology method using a convolutional neural network (CNN) is provided. In this method, a dynamic time warping (DTW) algorithm is used to delete unsimilar sets of process data, and adjust the sets of process data to be of the same length, thereby enabling the CNN to be used for virtual metrology. A virtual metrology model of the embodiments of the present invention includes several CNN models and a conjecture model, in which plural inputs of the CNN model are sets of time sequence data of respective parameters, and plural outputs of the CNN models are inputs to the conjecture model.

Abstract: Embodiments of the present disclosure relates to a wet bench processing including an in-situ pre-treatment prior to performing the first set of wet bench operations. The pre-treatment may include a pre-clean operation and/or a pre-heat operation. The pre-treatment may be performed in one of the existing ONB tanks without requiring adding new tanks to an existing wet bench tool. The pre-clean operation removes particles from a batch of wafers to avoid or reduce cross-contamination and defect issues, thus improving the yield rate of the wet bench process. The pre-heat operation provides better control and stabilize the temperature in the CHB tank to stabilize the process, such as to stabilize an etch rate.

Abstract: A method of forming a semiconductor device includes soaking a batch of wafers in a first cleaning liquid, replacing the first cleaning liquid with a second cleaning liquid, soaking the batch of wafers in the second cleaning liquid, and soaking the batch of wafers in an etchant. The first cleaning liquid has a first temperature. The second cleaning liquid has a second temperature. The etchant has a third temperature. The second temperature is between the first temperature and the third temperature.

Abstract: A method for selective bump formation on a wafer includes performing a wafer test on the wafer. Known good dies (KGDs) on the wafer are identified based on the wafer test performed. Solder bumps are formed on the KGDs.

Abstract: The present invention relates to gas distributors used in wafer carriers. The gas distributors comprise a body having an interior space, a separator configured at the front side of the body in the interior space, and an air inlet connected with the body. One edge of the separator and the front side of the body together form a passage. The configuration of the passage in the gas distributors enables the gas distributors to evenly distribute gases.

Abstract: A system for orienting a semiconductor wafer. The system includes a wafer retaining device configured to retain a semiconductor wafer, a light source configured to emit light toward an edge exclusion area of the wafer, and a lens configured to direct and focus light emitted from the light source at a subsurface first part of a first portion of the wafer to alter a crystalline structure of the subsurface first part and form a subsurface mark that is detectable using light of a predetermined wavelength, a predetermined transmittance through the wafer, and at a predetermined reflectance angle relative to an axis of rotation of the wafer and based on the predetermined wavelength.

Abstract: A back light module includes a light guide plate, at least one first light source, at least one second light source and at least one first reflection element. The light guide plate includes a first light incident surface, a second light incident surface opposite to the first light incident surface, a light emitting surface, and a bottom surface opposite to the light emitting surface. The first light source is disposed beside the first light incident surface and suitable to provide a first non-collimated light beam to the first light incident surface. The second light source is disposed beside the second light incident surface and suitable to provide a first collimated light beam to the second light incident surface. The first reflection element is disposed beside the first light incident surface to reflect the first collimated light beam emitted so as to make the first collimated light beam diverge.

Abstract: The present invention relates to gas distributors used in wafer carriers. The gas distributors comprise a body having an interior space, a separator configured at the front side of the body in the interior space, and an air inlet connected with the body. One edge of the separator and the front side of the body together form a passage. The configuration of the passage in the gas distributors enables the gas distributors to evenly distribute gases.

Abstract: A reticle pod with drain structure comprises an outer container and an inner container, wherein an upper cover of inner container is disposed with a plurality of retainers, and a plurality of supporters disposed on the outer container are used to press the retainers for fastening and stabilizing the reticle in the inner container and thus ensuring safety and stability of the reticle in the reticle pod. Collision risks of the reticle in the reticle pod due to vacillation of reticle pod during transportation can be reduced. Cost of reticles also can be greatly decreased. Further, a plurality of drain holes is disposed on a lower cover of the outer container for draining the remained water in the outer container. It will be done without disassembling the lower cover of outer container for reducing the contamination opportunity in the pod and preventing from wasting of labor and time for disassembling.

Abstract: A system for orienting a semiconductor wafer. The system includes a wafer retaining device configured to retain a semiconductor wafer, a light source configured to emit light toward an edge exclusion area of the wafer, and a lens configured to direct and focus light emitted from the light source at a subsurface first part of a first portion of the wafer to alter a crystalline structure of the subsurface first part and form a subsurface mark that is detectable using light of a predetermined wavelength, a predetermined transmittance through the wafer, and at a predetermined reflectance angle relative to an axis of rotation of the wafer and based on the predetermined wavelength.

Abstract: A back light module includes a light guide plate, at least one first light source, at least one second light source and at least one first reflection element. The light guide plate includes a first light incident surface, a second light incident surface opposite to the first light incident surface, a light emitting surface, and a bottom surface opposite to the light emitting surface. The first light source is disposed beside the first light incident surface and suitable to provide a first non-collimated light beam to the first light incident surface. The second light source is disposed beside the second light incident surface and suitable to provide a first collimated light beam to the second light incident surface. The first reflection element is disposed beside the first light incident surface to reflect the first collimated light beam emitted so as to make the first collimated light beam diverge.

Abstract: A method of orienting a semiconductor wafer. The method includes rotating a wafer about a central axis; exposing a plurality of edge portions of the rotating wafer to light having a predetermined wavelength from one or more light sources; detecting a subsurface mark in one of the plurality of edge portions of the rotating wafer; and orienting the wafer using the detected subsurface mark as a reference.

Abstract: A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.

Abstract: A method for selective bump formation on a wafer includes performing a wafer test on the wafer. Known good dies (KGDs) on the wafer are identified based on the wafer test performed. Solder bumps are formed on the KGDs.

Abstract: A method of orienting a semiconductor wafer. The method includes rotating a wafer about a central axis; exposing a plurality of edge portions of the rotating wafer to light having a predetermined wavelength from one or more light sources; detecting a subsurface mark in one of the plurality of edge portions of the rotating wafer; and orienting the wafer using the detected subsurface mark as a reference.