Patents by Inventor Chin-Tien Chiu

Chin-Tien Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Printed circuit board with coextensive electrical connectors and contact pad areas
    Patent number: 9006912
    Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: April 14, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Chih-Chin Liao, Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheemen Yu, Hem Takiar
  • RIGID WAVE PATTERN DESIGN ON CHIP CARRIER SUBSTRATE AND PRINTED CIRCUIT BOARD FOR SEMICONDUCTOR AND ELECTRONIC SUB-SYSTEM PACKAGING
    Publication number: 20150054177
    Abstract: A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking.
    Type: Application
    Filed: October 30, 2014
    Publication date: February 26, 2015
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: Chin-Tien Chiu, Chih-Chin Liao, Ken Jian Ming Wang, Han-Shiao Chen, Cheeman Yu, Hem Takiar
  • WIRE TAIL CONNECTOR FOR A SEMICONDUCTOR DEVICE
    Publication number: 20150001739
    Abstract: A memory device, and a method of making the memory device, are disclosed. The memory device is fabricated by mounting one or more semiconductor die on a substrate, and wire bonding the die to the substrate. The die and wire bonds are encapsuated, and the encapsulated device is singulated. The wire bonds are severed during the singulation step, and thereafter the severed wire bonds are connected to the substrate by external connectors on one or more surfaces of the molding compound.
    Type: Application
    Filed: October 22, 2012
    Publication date: January 1, 2015
    Inventors: Chin Tien Chiu, Cheeman Yu, Hem Takiar
  • METHODS FOR FORMING COLOR IMAGES ON MEMORY DEVICES AND MEMORY DEVICES FORMED THEREBY
    Publication number: 20140346686
    Abstract: A memory device including graphical content and a method of making the memory device with graphical content are disclosed. The graphical content is formed on a release media. The release media and the unencapsulated memory device are placed in a mold and encapsulated. During the encapsulation and curing of the molding compound, the graphical content is transferred from the release media to the encapsulated memory device.
    Type: Application
    Filed: September 2, 2011
    Publication date: November 27, 2014
    Inventors: Fu Peng, Zhong Lu, Chin Tien Chiu, Cheeman Yu, Matthew Chen, Weiting Jiang
  • Molded SiP package with reinforced solder columns
    Patent number: 8878346
    Abstract: An integrated circuit, and a semiconductor die package formed therefrom, are disclosed including solder columns for adding structural support to the package during the fabrication process.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: November 4, 2014
    Assignee: SanDisk Technologies Inc.
    Inventors: Chin-Tien Chiu, Hem Takiar, Hui Liu, Jiang Hua Java Zhu, Jack Chang-Chien, Cheemen Yu
  • Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging
    Patent number: 8878368
    Abstract: A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: November 4, 2014
    Assignee: SanDisk Technologies Inc.
    Inventors: Chin-Tien Chiu, Chih-Chin Liao, Ken Jian Ming Wang, Han-Shiao Chen, Cheeman Yu, Hem Takiar
  • SEMICONDUCTOR DEVICE INCLUDING ELECTROMAGNETIC ABSORPTION AND SHIELDING
    Publication number: 20140231973
    Abstract: A semiconductor device is disclosed including material for absorbing EMI and/or RFI The device includes a substrate (202), one or more semiconductor die (224,225), and molding compound around the one or more semiconductor die (224,225). The material for absorbing EMI and/or RFI may be provided within or on a solder mask layer (210) on the substrate (202). The device may further include EMI/RFI-absorbing material around the molding compound and in contact with the EMI/RFI-absorbing material on the substrate to completely enclose the one or more semiconductor die in EMI/RFI-absorbing material.
    Type: Application
    Filed: April 26, 2012
    Publication date: August 21, 2014
    Inventors: Dacheng Huang, Ye Bai, Kaiyou Qian, Chin-Tien Chiu
  • WATERFALL WIRE BONDING
    Publication number: 20140183727
    Abstract: A wire bonded structure for a semiconductor device is disclosed. The wire bonded structure comprises a bonding pad; and a continuous length of wire mutually diffused with the bonding pad, the wire electrically coupling the bonding pad with a first electrical contact and a second electrical contact different from the first electrical contact.
    Type: Application
    Filed: May 18, 2011
    Publication date: July 3, 2014
    Applicants: SANDISK INFORMATION TECHNOLOGY (SHANGHAI) CO., LTD., SANDISK SEMICONDUCTOR (SHANGHAI) CO., LTD.
    Inventors: Zhong Lu, Fen Yu, Chin Tien Chiu, Cheeman Yu, Fuqiang Xiao
  • EMI SHIELDING AND THERMAL DISSIPATION FOR SEMICONDUCTOR DEVICE
    Publication number: 20140015116
    Abstract: A memory device including a metallic layer shielding electromagnetic radiation and/or dissipating heat, and a method of making the memory device, are disclosed. The metallic layer is formed on a metallic layer transfer assembly. The metallic layer transfer assembly and the unencapsulated memory device are placed in a mold and encapsulated. During the encapsulation and curing of the molding compound, the metallic layer is transferred from the shield to the encapsulated memory device.
    Type: Application
    Filed: December 16, 2011
    Publication date: January 16, 2014
    Applicants: Sandisk Information Technology (Shanghai) Co.,, Sandisk Semiconductor (Shanghai) Co., Ltd.
    Inventors: Peng Fu, Shan Luo, Zhong Lu, Kaiyou Qian, Chin Tien Chiu, Cheeman Yu, Hem Takiar, Ye Bai
  • RIGID WAVE PATTERN DESIGN ON CHIP CARRIER SUBSTRATE AND PRINTED CIRCUIT BOARD FOR SEMICONDUCTOR AND ELECTRONIC SUB-SYSTEM PACKAGING
    Publication number: 20130299959
    Abstract: A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking.
    Type: Application
    Filed: July 15, 2013
    Publication date: November 14, 2013
    Inventors: Chin-Tien Chiu, Chih-Chin Liao, Ken Jian Ming Wang, Han-Shiao Chen, Cheeman Yu, Hem Takiar
  • Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging
    Patent number: 8487441
    Abstract: A rigid wave pattern formed on a first side of a substrate in a semiconductor die package. The rigid wave pattern aligns with and overlies the contact fingers formed on the second side of the substrate. The rigid wave pattern includes a first pattern with an etched portion and an unetched portion around the etched portion. When the substrate and dice are encased during the molding process, the rigid wave pattern effectively reduces deformation of and stresses on the dice, therefore substantially alleviating die cracking.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: July 16, 2013
    Assignee: SanDisk Technologies Inc.
    Inventors: Chin-Tien Chiu, Chih-Chin Liao, Ken Jian Ming Wang, Han-Shiao Chen, Cheemen Yu, Hem Takiar
  • Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards
    Patent number: 8482139
    Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: July 9, 2013
    Assignee: SanDisk Technologies Inc.
    Inventors: Che-Jung Chang, Chin-Tien Chiu, Cheeman Yu, Hem Takiar, Jack Chang Chien, Ning Liu
  • CHIP-ON-PACKAGE STRUCTURE FOR MULTIPLE DIE STACKS
    Publication number: 20130015589
    Abstract: A multi-die semiconductor device is disclosed. The device may include one or more first-sized die on a substrate and one or more second-sized die affixed over the one or more first-sized die. The second-sized die may have a larger footprint than the first-sized die. An internal molding compound may be provided on the substrate having a footprint the same size as the second-sized die. The second-sized die may be supported on the internal molding compound. Thereafter, the first and second-sized die and the internal molding compound may be encapsulated in an external molding compound.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 17, 2013
    Inventors: Chih-Chin Liao, Chin-Tien Chiu, Cheeman Yu, Suresh Kumar Upadhyayula, Wen Cheng Li, Zhong Lu
  • EPOXY COATING ON SUBSTRATE FOR DIE ATTACH
    Publication number: 20120279651
    Abstract: A system and method are disclosed for applying a die attach epoxy to substrates on a panel of substrates. The system includes a window clamp having one or more windows through which the epoxy may be applied onto the substrate panel. The size and shape of the one or more windows correspond to the size and shape of the area on the substrate to receive the die attach epoxy. Once the die attach epoxy is sprayed onto the substrate through the windows of the window clamp, the die may be affixed to the substrate and the epoxy cured in one or more curing steps. The system may further include a clean-up follower for cleaning epoxy off of the window clamp, and a window cleaning mechanism for cleaning epoxy off of the sidewalls of the windows of the window clamp.
    Type: Application
    Filed: May 5, 2011
    Publication date: November 8, 2012
    Inventors: Wei Gu, Zhong Lu, Shrikar Bhagath, Chin-Tien Chiu, Hem Takiar, XiangYang Liu
  • Printed Circuit Board With Coextensive Electrical Connectors And Contact Pad Areas
    Publication number: 20120273968
    Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
    Type: Application
    Filed: July 9, 2012
    Publication date: November 1, 2012
    Inventors: Chih-Chin Liao, Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheemen Yu, Hem Takiar
  • GLOB TOP SEMICONDUCTOR PACKAGE
    Publication number: 20120193802
    Abstract: A semiconductor package is disclosed including a substrate, a solder mask layer, one or more semiconductor die mounted to the solder mask layer and electrically coupled to the substrate, and a glob top cover over the semiconductor die. The solder mask further includes a dam protruding above surrounding areas of the solder mask layer and a cavity recessed into the solder mask layer for limiting flow of the glob top cover when the glob top material is applied.
    Type: Application
    Filed: February 1, 2011
    Publication date: August 2, 2012
    Inventors: Chin-Tien Chiu, Chih-Chin Liao, Peng Fu
  • Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards
    Patent number: 8232145
    Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: July 31, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Che-Jung Chang, Chin-Tien Chiu, Cheeman Yu, Hem Takiar, Jack Chang Chien, Ning Liu
  • Printed circuit board with coextensive electrical connectors and contact pad areas
    Patent number: 8217522
    Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: July 10, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Chih-Chin Liao, Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheeman Yu, Hem Takiar
  • Semiconductor die having a redistribution layer
    Patent number: 8212360
    Abstract: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: July 3, 2012
    Assignee: SanDisk Technologies Inc.
    Inventors: Chien-Ko Liao, Chin-Tien Chiu, Jack Chang Chien, Cheemen Yu, Hem Takiar
  • HIDDEN PLATING TRACES
    Publication number: 20120164828
    Abstract: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.
    Type: Application
    Filed: March 2, 2012
    Publication date: June 28, 2012
    Inventors: Hem Takiar, Cheeman Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen, Chih-Chin Liao