Abstract: A metal organic chemical vapor deposition (MOCVD) method and apparatus are provided. The MOCVD method includes: providing a substrate, in which a metal-based material layer is disposed on a first surface of the substrate; putting the substrate on a base in a chamber, in which the metal-based material layer is between the substrate and the base; and performing a MOCVD process on a second surface opposite to the first surface. The difference in thermal conductivity between the metal-based material layer and the substrate is in the range of 1 W/m° C. to 20 W/m° C., and the thermal expansion coefficients of the metal-based material layer and the substrate are of the same order.

Abstract: An evaporation device and an evaporation apparatus applying the same are adapted to performing evaporation process to an object to be coated. The evaporation device includes a tape carrier and a mask. The tape carrier has a heating region. The object to be coated is located over the heating region and is adapted to move along a feeding direction. The tape carrier is adapted to carry a coating material to pass through the heating region. The coating material is heated in the heating region and evaporated. The mask having an opening between the heating region and the object to be coated is disposed in the periphery of the heating region. The evaporated coating material is adapted to pass through the opening and coated on the object.

Abstract: A resistive random access memory and a method for fabricating the same are provided. The method includes providing a bottom electrode formed on a substrate. A metal oxide layer is formed on the bottom electrode. An oxygen atom gettering layer is formed on the metal oxide layer. A top electrode is formed on the oxygen atom gettering layer. The previous mentioned structure is subjected to a thermal treatment, driving the oxygen atoms of the metal oxide layer to migrate into and react with the oxygen atom gettering layer, thus leaving a plurality of oxygen vacancies of the metal oxide layer.

Abstract: A photovoltaic organic light emitting diodes (PV-OLED) device and manufacturing method thereof are introduced. The PV-OLED device includes a substrate, a solar cell module, and a plurality of organic light emitting diodes. The solar cell module is disposed on a surface of the substrate. The organic light emitting diodes are disposed on the same surface of the substrate that the solar cell module is disposed on. The organic light emitting diode is electrically isolated from the solar cell module. The solar cell module can apply power to the organic light emitting diodes for emitting light.

Abstract: According to an embodiment of the disclosure, an organic light emitting device is provided, which includes: an inflexible tube comprising an external surface and an internal surface; a transparent conductive layer on the internal surface of the inflexible tube; an organic light emitting layer disposed in the inflexible tube and on the transparent conductive layer; and a conductive layer disposed in the inflexible tube and on the organic light emitting layer. According to an embodiment of the disclosure, a method for forming an organic light emitting device is also provided.

Abstract: A showerhead integrating intake and exhaust is provided for showering a gas. The showerhead at least includes a showerhead body that has a gas-active surface and a plurality of intake bores thereon. The showerhead body further includes a central exhaust vent disposed on the gas-active surface. The central exhaust vent may exhaust standing gas and further pre-exhaust byproduct from reaction process.

Abstract: This prevent disclosure provides a plasma enhanced atomic layer deposition apparatus and the controlling method thereof. The plasma enhanced atomic layer deposition apparatus includes: a plurality of reaction chambers, each of the reaction chambers having a first reaction space and a second reaction space; an adjustable partition unit controlled to separate or communicate the first and the second reaction spaces; and a plurality of heating carriers respectively disposed in the plurality of reaction chambers. The method manipulates the movement of the partition plate, leading to separation or communication between the first and second reaction spaces, so as to avoid the interference or inter-reaction between process gases and the resultant particles contaminating the substrates.

Abstract: A conductive bridging random access memory (CBRAM) device and a method of manufacturing the same are provided. The CBRAM device includes a first electrode layer, a dielectric layer, a solid electrolyte layer, a second electrode layer and a metal layer. The solid electrolyte layer is located on the first electrode layer. The second electrode layer is located on the solid electrolyte layer. The metal layer is located near the solid electrolyte layer. The dielectric layer is located between the solid electrolyte layer and the metal layer. Since the metal layer is disposed near the solid electrolyte layer in the CBRAM device, it can generate a positive electric field during an erase operation, so as to accelerate a break of mutually connected metal filaments.

Abstract: Disclosed is an encapsulation film. An inorganic oxide film is formed on an organic sealing layer by an atomic layer deposition (ALD) to form the encapsulation film, wherein the organic sealing layer is a polymer containing hydrophilic groups. The organic sealing layer and the inorganic oxide layer have covalent bondings therebetween. The encapsulation film can solve the moisture absorption problem of conventional organic sealing layers, thereby being suitable for use as a package of optoelectronic devices.

Abstract: A manufacturing method and system using a plane-type film continuous evaporation source are disclosed, in which the manufacturing method comprises the steps of: providing a plane-type film continuous evaporation source, being a substrate having at least one evaporation material coated on a surface thereof while distributing the at least one evaporation material in a specific area of the substrate capable of covering all the plates to be processed by the evaporated evaporation material; arranging a heater inside the specific area to be used for enabling the at least one evaporation material to evaporate and thus spreading toward the processed plates. Thereby, the evaporated evaporation material can be controlled at the molecular/atomic level for enabling the same to form a film according to surface-nucleation, condensation and growth with superior evenness, nano-scale adjustability, specialized structure and function that can not be achieve by the films from conventional spray coating means.

Abstract: A structure and a method of fabricating a bottom electrode of a metal-insulator-metal (MIM) capacitor are provided. First, a transition metal layer is formed on a substrate. Thereafter, a self-assembling polymer film having a nano-pattern is formed on the transition metal layer to expose a portion of the transition metal layer. Using the self-assembling polymer film as a mask, the exposed portion of the transition metal layer is treated to undergo a phase change so that the bottom electrode can achieve a nano-level of phase separation. Thereafter, the self-assembling polymer film is removed.

Abstract: A method for forming a capacitor in a dynamic random access memory, comprising steps of: providing a semiconductor substrate having at least a transistor, whereon an interlayer dielectric layer having at least a first plug is formed so that the first plug is connected to the drain of the transistor; depositing an etching stop layer on the first plug and the interlayer dielectric layer; depositing a first insulating layer on the etching stop layer; forming at least a second plug on the first insulating layer and the etching stop layer so that the second plug is connected to the first plug; depositing a second insulating layer on the first insulating layer and the second plug; forming at least a mold cavity in the second insulating layer so that the aperture of the mold cavity is larger than the diameter of the second plug and there is a deviation between the mold cavity and the second plug; removing the first insulating layer in the mold cavity until the etching stop layer; depositing a first electrode layer t

Abstract: A method for forming a capacitor comprises providing a substrate. A bottom electrode material layer is formed on the substrate. A first mask layer is formed on the bottom electrode material layer. A second mask layer is formed on the first mask layer. The second mask layer is patterned to form a patterned second mask layer in a predetermined region for formation of a capacitor. A plurality of hemispherical grain structures are formed on a sidewall of the patterned second mask layer. The first mask layer is etched by using the hemispherical grain structures and the patterned second mask layer as a mask, thereby forming a patterned first mask layer having a pattern. The pattern of the first mask layer is transferred to the bottom electrode material layer. And, a capacitor dielectric layer and a top electrode layer are formed on the bottom electrode material layer to form the capacitor.

Abstract: A method of manufacturing through-silicon-via (TSV) and a TSV structure are provided. The TSV structure includes a silicon substrate, an annular capacitor, a conductive through-via, a layer of low-k material, and a bump. The annular capacitor is within the silicon substrate and constituted of a first conductive layer, a capacitor dielectric layer, and a second conductive layer from the inside to the outside. The conductive through-via is disposed in the silicon substrate surrounded by the annular capacitor, and the layer of low-k material is between the annular capacitor and the conductive through-via. The bump is in touch with the conductive through-via for bonding other chip.

Abstract: A conductive bridging random access memory (CBRAM) device and a method of manufacturing the same are provided. The CBRAM device includes a first electrode layer, a dielectric layer, a solid electrolyte layer, a second electrode layer and a metal layer. The solid electrolyte layer is located on the first electrode layer. The second electrode layer is located on the solid electrolyte layer. The metal layer is located near the solid electrolyte layer. The dielectric layer is located between the solid electrolyte layer and the metal layer. Since the metal layer is disposed near the solid electrolyte layer in the CBRAM device, it can generate a positive electric field during an erase operation, so as to accelerate a break of mutually connected metal filaments.

Abstract: A metal-insulator-metal (MIM) capacitor having a top electrode, a bottom electrode and a capacitor dielectric layer is provided. The top electrode is located over the bottom electrode and the capacitor dielectric layer is disposed between the top and the bottom electrode. The capacitor dielectric layer comprises several titanium oxide (TiO2) layers and at least one tetragonal structure material layer. The tetragonal structure material layer is disposed between two titanium oxide layers and each tetragonal structure material layer has the same or a different thickness. Leakage path can be cut off through the tetragonal material layer between the titanium oxide layers. In the meantime, the tetragonal structure material layer can induce the titanium oxide layers to transform into a high k rutile phase.

Abstract: A method of fabricating a photodetector device includes preparing a silicon substrate, forming a patterned mesa on the silicon substrate, and forming a patterned conductive layer over the patterned mesa.

Abstract: A resistive random access memory and a method for fabricating the same are provided. The method includes providing a bottom electrode formed on a substrate. A metal oxide layer is formed on the bottom electrode. An oxygen atom gettering layer is formed on the metal oxide layer. A top electrode is formed on the oxygen atom gettering layer. The previous mentioned structure is subjected to a thermal treatment, driving the oxygen atoms of the metal oxide layer to migrate into and react with the oxygen atom gettering layer, thus leaving a plurality of oxygen vacancies of the metal oxide layer.

Abstract: A method for forming a capacitor in a dynamic random access memory, comprising steps of: providing a semiconductor substrate having at least a transistor, whereon an interlayer dielectric layer having at least a first plug is formed so that the first plug is connected to the drain of the transistor; depositing an etching stop layer on the first plug and the interlayer dielectric layer; depositing a first insulating layer on the etching stop layer; forming at least a second plug on the first insulating layer and the etching stop layer so that the second plug is connected to the first plug; depositing a second insulating layer on the first insulating layer and the second plug; forming at least a mold cavity in the second insulating layer so that the aperture of the mold cavity is larger than the diameter of the second plug and there is a deviation between the mold cavity and the second plug; removing the first insulating layer in the mold cavity until the etching stop layer; depositing a first electrode layer t

Abstract: A resistance memory is manufactured using semiconductor processing to comprise planar dual-tip electrodes so that the electric field in the resistance memory is concentrated to reduce the number of fuses in the dielectric material and improve the device characteristics. The resistance memory comprises: a first memory cell including a first bottom electrode and a common top electrode; and a second memory cell including a second bottom electrode and the common top electrode shared with the first memory cell; wherein the first bottom electrode, the second bottom electrode and the common top electrode are disposed on the same plane and are separated by a resistive conversion layer; wherein the common top electrode is connected to the ground through a via, while the first bottom electrode and the second bottom electrode are connected to the source of a transistor through a plug, respectively.