Patents by Inventor Ching-Han Huang
Ching-Han Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210036658Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.Type: ApplicationFiled: October 19, 2020Publication date: February 4, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chi Sheng TSENG, Lu-Ming LAI, Ching-Han HUANG, Hui-Chung LIU, Kuo-Hua LAI, Cheng-Ling HUANG
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Patent number: 10841679Abstract: A microelectromechanical systems package structure includes a first substrate, a transducer unit, a semiconductor chip and a second substrate. The first substrate defines a through hole. The transducer unit is electrically connected to the first substrate, and includes a base and a membrane. The membrane is located between the through hole and the base. The semiconductor chip is electrically connected to the first substrate and the transducer unit. The second substrate is attached to the first substrate and defines a cavity. The transducer unit and the chip are disposed in the cavity, and the second substrate is electrically connected to the transducer unit and the semiconductor chip through the first substrate.Type: GrantFiled: January 24, 2018Date of Patent: November 17, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Hsu-Liang Hsiao, Yu-Hsuan Tsai, Pu Shan Huang, Ching-Han Huang, Lu-Ming Lai
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Patent number: 10812017Abstract: A semiconductor package structure includes an organic substrate having a first surface, a first recess depressed from the first surface, a first chip over the first surface and covering the first recess, thereby defining a first cavity enclosed by a back surface of the first chip and the first recess, and a second chip over the first chip. The first cavity is an air cavity or a vacuum cavity.Type: GrantFiled: August 2, 2019Date of Patent: October 20, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chi Sheng Tseng, Lu-Ming Lai, Ching-Han Huang, Hui-Chung Liu, Kuo-Hua Lai, Cheng-Ling Huang
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Patent number: 10782184Abstract: The present disclosure relates to an optical device. The optical device comprises an electronic component, a plurality of light conducting pillars and an opaque layer. The electronic component includes a plurality of pixels. Each of the light conducting pillars is disposed over a corresponding pixel of the plurality of pixels of the electronic component. The opaque layer covers a lateral surface of each of the light conducting pillars.Type: GrantFiled: August 25, 2017Date of Patent: September 22, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yu-Min Peng, Ching-Han Huang, Lu-Ming Lai
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Publication number: 20200283288Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a support structure, an electronic component and an adhesive. The support structure is disposed on the substrate. The electronic component is disposed on the support structure. The adhesive is disposed between the substrate and the electronic component and covers the support structure. A hardness of the support structure is less than a hardness of the electronic component.Type: ApplicationFiled: May 27, 2020Publication date: September 10, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ming Yen LEE, Chia-Hao SUNG, Ching-Han HUANG, Yu-Hsuan TSAI
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Patent number: 10689249Abstract: A semiconductor device package includes a carrier, a wall disposed on a top surface of the carrier, a cover, and a sensor element. The cover includes a portion protruding from a bottom surface of the cover, where the protruding portion of the cover contacts a top surface of the wall to define a space. The sensor element is positioned in the space.Type: GrantFiled: September 16, 2015Date of Patent: June 23, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ching-Han Huang, Hsun-Wei Chan, Lu-Ming Lai
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Patent number: 10689248Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a support structure, an electronic component and an adhesive. The support structure is disposed on the substrate. The electronic component is disposed on the support structure. The adhesive is disposed between the substrate and the electronic component and covers the support structure. A hardness of the support structure is less than a hardness of the electronic component.Type: GrantFiled: March 14, 2018Date of Patent: June 23, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming Yen Lee, Chia Hao Sung, Ching-Han Huang, Yu-Hsuan Tsai
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Publication number: 20200140262Abstract: A semiconductor device package includes a carrier; a sensor element disposed on or within the carrier; a cover disposed above the carrier and comprising a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface; and a light transmissive element covering the penetrating hole, wherein the sensor element senses or detects light passing through the light transmissive element.Type: ApplicationFiled: January 6, 2020Publication date: May 7, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ching-Han HUANG, Hsun-Wei CHAN, Yu-Hsuan TSAI
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Publication number: 20200111761Abstract: A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.Type: ApplicationFiled: October 3, 2019Publication date: April 9, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: An-Nong WEN, Ching-Han HUANG, Ching-Ho CHANG
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Publication number: 20200111760Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes a semiconductor die, a cap layer, a conductive terminal, and a dam structure. The semiconductor die has a first surface. The cap layer is over the semiconductor die and has a second surface facing the first surface of the semiconductor die. The conductive terminal penetrates the cap layer and electrically connects to the semiconductor die. The dam structure is between the semiconductor die and the cap layer and surrounds a portion of the conductive terminal between the first surface and the second surface, thereby forming a gap between the cap layer and the semiconductor die.Type: ApplicationFiled: September 25, 2019Publication date: April 9, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Che HUANG, Ching-Han HUANG, An-Nong WEN, Po-Ming HUANG
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Patent number: 10526200Abstract: A semiconductor device package includes: (1) a carrier; (2) a sensor element disposed on or within the carrier; and (3) a cover including a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface, and the penetrating hole exposing the sensor element. The semiconductor device package is characterized such that (i) the inner sidewall is divided into an upper portion and a lower portion, the upper portion is substantially perpendicular to the top surface, and the lower portion is tilted; or (ii) the entire inner sidewall is tilted. The lower portion of the inner sidewall or the entire inner sidewall is tilted at an angle of between about 10° to less than about 90°, relative to the top surface.Type: GrantFiled: November 16, 2017Date of Patent: January 7, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ching-Han Huang, Hsun-Wei Chan, Yu-Hsuan Tsai
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Publication number: 20190267298Abstract: A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity.Type: ApplicationFiled: February 21, 2019Publication date: August 29, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsin Lin WU, Yu-Hsuan TSAI, Chang Chin TSAI, Lu-Ming LAI, Ching-Han HUANG
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Publication number: 20180334380Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a substrate with a first groove and a semiconductor device. The first groove has a first portion, a second portion, and a third portion, and the second portion is between the first portion and the third portion. The semiconductor device includes a membrane and is disposed on the second portion of the first groove. The semiconductor device has a first surface adjacent to the substrate and opposite to the membrane. The membrane is exposed by the first surface.Type: ApplicationFiled: May 18, 2017Publication date: November 22, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Liang HSIAO, Lu-Ming LAI, Ching-Han HUANG, Chia-Hung SHEN
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Publication number: 20180265347Abstract: The present disclosure relates to a semiconductor device package. The semiconductor device package includes a substrate, a support structure, an electronic component and an adhesive. The support structure is disposed on the substrate. The electronic component is disposed on the support structure. The adhesive is disposed between the substrate and the electronic component and covers the support structure. A hardness of the support structure is less than a hardness of the electronic component.Type: ApplicationFiled: March 14, 2018Publication date: September 20, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ming Yen LEE, Chia Hao SUNG, Ching-Han HUANG, Yu-Hsuan TSAI
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Publication number: 20180213312Abstract: A microelectromechanical systems package structure includes a first substrate, a transducer unit, a semiconductor chip and a second substrate. The first substrate defines a through hole. The transducer unit is electrically connected to the first substrate, and includes a base and a membrane. The membrane is located between the through hole and the base. The semiconductor chip is electrically connected to the first substrate and the transducer unit. The second substrate is attached to the first substrate and defines a cavity. The transducer unit and the chip are disposed in the cavity, and the second substrate is electrically connected to the transducer unit and the semiconductor chip through the first substrate.Type: ApplicationFiled: January 24, 2018Publication date: July 26, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Hsu-Liang Hsiao, Yu-Hsuan Tsai, Pu Shan Huang, Ching-Han Huang, Lu-Ming Lai
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Publication number: 20180072563Abstract: A semiconductor device package includes: (1) a carrier; (2) a sensor element disposed on or within the carrier; and (3) a cover including a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface, and the penetrating hole exposing the sensor element. The semiconductor device package is characterized such that (i) the inner sidewall is divided into an upper portion and a lower portion, the upper portion is substantially perpendicular to the top surface, and the lower portion is tilted; or (ii) the entire inner sidewall is tilted. The lower portion of the inner sidewall or the entire inner sidewall is tilted at an angle of between about 10° to less than about 90°, relative to the top surface.Type: ApplicationFiled: November 16, 2017Publication date: March 15, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ching-Han HUANG, Hsun-Wei CHAN, Yu-Hsuan TSAI
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Publication number: 20180066982Abstract: The present disclosure relates to an optical device. The optical device comprises an electronic component, a plurality of light conducting pillars and an opaque layer. The electronic component includes a plurality of pixels. Each of the light conducting pillars is disposed over a corresponding pixel of the plurality of pixels of the electronic component. The opaque layer covers a lateral surface of each of the light conducting pillars.Type: ApplicationFiled: August 25, 2017Publication date: March 8, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yu-Min PENG, Ching-Han HUANG, Lu-Ming LAI
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Patent number: 9881845Abstract: An electronic device includes a transducer including a sensing area and a covering structure that covers the transducer. The covering structure includes a shelter portion and defines at least one aperture. The shelter portion covers the sensing area. The aperture includes a first curved surface and a second curved surface farther away from the sensing area than the first curved surface, and a first center of a first curvature of the first curved surface is at a different location than a second center of a second curvature of the second curved surface.Type: GrantFiled: October 12, 2016Date of Patent: January 30, 2018Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yung-Yi Chang, Hsun-Wei Chan, Ching-Han Huang
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Patent number: 9850124Abstract: A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.Type: GrantFiled: October 27, 2015Date of Patent: December 26, 2017Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ching-Han Huang, Hsun-Wei Chan, Yu-Hsuan Tsai
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Publication number: 20170113922Abstract: A semiconductor device package includes a carrier, a sensor element disposed on or within the carrier, a cover and a filter. The cover includes a base substrate and a periphery barrier. The base substrate includes an inner sidewall. The inner sidewall of the base substrate defines a penetrating hole extending from a top surface of the base substrate to a bottom surface of the base substrate; at least a portion of the inner sidewall of the base substrate is tilted. The periphery barrier is coupled to the bottom surface of the base substrate and contacts a top surface of the carrier. The filter is disposed on the top surface of the base substrate and covers the penetrating hole.Type: ApplicationFiled: October 27, 2015Publication date: April 27, 2017Inventors: Ching-Han HUANG, Hsun-Wei CHAN, Yu-Hsuan TSAI