Abstract: A method of manufacturing a semiconductor structure includes depositing a silicon layer over a substrate, removing a portion of the silicon layer to form a gate stack, and performing a hydrogen treatment on the gate stack to repair a plurality of voids in the stack structure.

Abstract: In some implementations, a control device may determine a spacing measurement in a first dimension between a wafer on a susceptor and a pre-heat ring of a semiconductor processing tool and/or a gapping measurement in a second dimension between the wafer and the pre-heat ring, using one or more images captured in situ during a process by at least one optical sensor. Accordingly, the control device may generate a command based on a setting associated with the process being performed by the semiconductor processing tool and the spacing measurement and/or the gapping measurement. The control device may provide the command to at least one motor to move the susceptor.

Abstract: The present disclosure provides a semiconductor processing apparatus according to one embodiment. The semiconductor processing apparatus includes a chamber; a base station located in the chamber for supporting a semiconductor substrate; a preheating assembly surrounding the base station; a first heating element fixed relative to the base station and configured to direct heat to the semiconductor substrate; and a second heating element moveable relative to the base station and operable to direct heat to a portion of the semiconductor substrate.

Abstract: An integrated circuit die includes a FinFET transistor. The FinFET transistor includes an anti-punch through region below a channel region. Undesirable dopants are removed from the anti-punch through region during formation of the source and drain regions. When source and drain recesses are formed, a layer of dielectric material is deposited in the recesses. An annealing process is then performed. Undesirable dopants diffuse from the anti-punch through region into the layer of dielectric material during the annealing process. The layer of dielectric material is then removed. The source and drain regions are then formed by depositing semiconductor material in the recesses.

Abstract: An integrated circuit die includes a FinFET transistor. The FinFET transistor includes an anti-punch through region below a channel region. Undesirable dopants are removed from the anti-punch through region during formation of the source and drain regions. When source and drain recesses are formed, a layer of dielectric material is deposited in the recesses. An annealing process is then performed. Undesirable dopants diffuse from the anti-punch through region into the layer of dielectric material during the annealing process. The layer of dielectric material is then removed. The source and drain regions are then formed by depositing semiconductor material in the recesses.

Abstract: A semiconductor manufacturing apparatus includes an air distributor inside a chamber. The air distributor includes a first annular plate and a second annular plate disposed in an interior volume of the chamber, and an inner surface of the first annular plate and an inner surface of the second annular plate are connected to each other. A hollow region is defined by the first annular plate and the second annular plate. A gas through hole is extended from an outer surface of the first annular plate to the inner surface of the first annular plate. A plurality of ditches are between the inner surface of the first annular plate and the inner surface of the second annular plate, wherein the ditches are connected with the gas through hole and extended from the gas through hole to the hollow region to blow gas toward the hollow region.

Abstract: An integrated circuit die includes a FinFET transistor. The FinFET transistor includes an anti-punch through region below a channel region. Undesirable dopants are removed from the anti-punch through region during formation of the source and drain regions. When source and drain recesses are formed, a layer of dielectric material is deposited in the recesses. An annealing process is then performed. Undesirable dopants diffuse from the anti-punch through region into the layer of dielectric material during the annealing process. The layer of dielectric material is then removed. The source and drain regions are then formed by depositing semiconductor material in the recesses.

Abstract: A semiconductor fabrication apparatus includes a processing chamber; a wafer stage configured in the processing chamber; and a chemical delivery mechanism configured in the processing chamber to provide a chemical to a reaction zone in the processing chamber. The chemical delivery mechanism includes an edge chemical injector, a first radial chemical injector, and a second radial chemical injector configured on three sides of the reaction zone.

Abstract: A semiconductor fabrication apparatus includes a processing chamber; a wafer stage configured in the processing chamber; and a chemical delivery mechanism configured in the processing chamber to provide a chemical to a reaction zone in the processing chamber. The chemical delivery mechanism includes an edge chemical injector, a first radial chemical injector, and a second radial chemical injector configured on three sides of the reaction zone.

Abstract: A semiconductor fabrication apparatus includes a processing chamber; a wafer stage configured in the processing chamber; a first chemical delivery mechanism configured in the processing chamber to provide a first chemical to a first reaction zone in the processing chamber; and air edge mechanisms configured on both sides of the first reaction zone to isolate the first reaction zone from other reaction zones in the processing chamber.

Abstract: A semiconductor manufacturing apparatus includes an air distributor inside a chamber. The air distributor includes a first annular plate and a second annular plate disposed in an interior volume of the chamber, and an inner surface of the first annular plate and an inner surface of the second annular plate are connected to each other. A hollow region is defined by the first annular plate and the second annular plate. A gas through hole is extended from an outer surface of the first annular plate to the inner surface of the first annular plate. A plurality of ditches are between the inner surface of the first annular plate and the inner surface of the second annular plate, wherein the ditches are connected with the gas through hole and extended from the gas through hole to the hollow region to blow gas toward the hollow region.

Abstract: A semiconductor fabrication apparatus includes a processing chamber; a wafer stage configured in the processing chamber; a first chemical delivery mechanism configured in the processing chamber to provide a first chemical to a first reaction zone in the processing chamber; and air edge mechanisms configured on both sides of the first reaction zone to isolate the first reaction zone from other reaction zones in the processing chamber.

Abstract: A semiconductor manufacturing apparatus includes a chamber, a view port window on a sidewall of the chamber and configured to receive an optical emission spectroscopy (OES); and an air distributor located between the view port window and an inner space of the chamber. The air distributor includes a hollow region aligned with the transparent window and configured to generate an air curtain in the hollow region to isolate the view port from the inner space.

Abstract: A semiconductor fabrication apparatus includes a processing chamber, a wafer stage configured in the processing chamber, a first chemical delivery mechanism configured in the processing chamber to provide a first chemical to a first reaction zone in the processing chamber, and a second chemical delivery mechanism configured in the processing chamber to provide a second chemical to a second reaction zone in the processing chamber. The second chemical delivery mechanism includes an edge chemical injector and a first radial chemical injector both configured to deliver the second chemical to the second reaction zone.

Abstract: A method for manufacturing a semiconductor device is provided, including forming a fin field effect transistor (FinFET) structure on a semiconductor substrate. The FinFET structure includes at least one fin, and a gate electrode structure and source/drain regions on the at least one fin. A dielectric film is formed over the at least on fin. The dielectric film is irradiated with ultra violet (UV) radiation from a single UV source.

Abstract: A method of manufacturing a semiconductor structure includes depositing a silicon layer over a substrate, removing a portion of the silicon layer to form a gate stack, and performing a hydrogen treatment on the gate stack to repair a plurality of voids in the stack structure.

Abstract: A semiconductor fabrication apparatus includes a processing chamber, a wafer stage configured in the processing chamber, a first chemical delivery mechanism configured in the processing chamber to provide a first chemical to a first reaction zone in the processing chamber, and a second chemical delivery mechanism configured in the processing chamber to provide a second chemical to a second reaction zone in the processing chamber. The second chemical delivery mechanism includes an edge chemical injector and a first radial chemical injector both configured to deliver the second chemical to the second reaction zone.

Abstract: The present disclosure provides a semiconductor fabrication apparatus in accordance with one embodiment. The apparatus includes a processing chamber; a wafer stage configured in the processing chamber, the wafer stage is operable to secure and rotate a plurality of wafers around an axis; a first chemical delivery mechanism configured in the processing chamber to provide a first chemical to a first reaction zone in the processing chamber; and a second chemical delivery mechanism configured in the processing chamber to provide a second chemical to a second reaction zone in the processing chamber. The second chemical delivery mechanism includes an edge chemical injector and a first radial chemical injector.

Abstract: The semiconductor device structures are provided. The semiconductor device structure includes a gate stack structure formed on a substrate and an isolation structure formed in the substrate. The semiconductor device structure further includes a source/drain stressor structure formed between the gate stack structure and the isolation structure and a metal silicide layer formed on the source/drain stressor structure. A portion of the metal silicide layer is below a top surface of the isolation structure.

Abstract: A method for manufacturing a semiconductor device is provided, including forming a fin field effect transistor (FinFET) structure on a semiconductor substrate. The FinFET structure includes at least one fin, and a gate electrode structure and source/drain regions on the at least one fin. A dielectric film is formed over the at least on fin. The dielectric film is irradiated with ultra violet (UV) radiation from a single UV source.