Patents by Inventor Ching-Wen Chen

Ching-Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11509934
    Abstract: A method and apparatus for video coding incorporating enhanced multiple transform (EMT) are disclosed. According to one method, the number of candidates for EMT in the horizontal direction or vertical direction is reduced depending on the current block size. According to another method, an EMT flag, one or more EMT indices or both are signalled only if the total number of non-zero coefficients in at least a part of the 2D coefficient block is greater than a threshold, where the threshold is equal to 1 or larger. A method and apparatus for video coding using non-separable secondary transform (NSST) are disclosed. According to this method, a total number of non-zero first coefficients in a partial block of the 2D coefficient block is determined and used to determine whether to apply the NSST process.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: November 22, 2022
    Assignee: HFI INNOVATION INC.
    Inventors: Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Publication number: 20220368951
    Abstract: A method and apparatus for block partition in video encoding and decoding are disclosed. According to one method of the present invention, input data associated with a current block in a current picture are received, wherein the current block comprises a luma block and a chroma block to be encoded or decoded, and wherein a minimum block size is constrained to be no greater than a constrained minimum size for the luma block regardless of whether a dual partition tree or a single partition tree is used for the current block. The luma block is partitioned into one or more luma leaf blocks and the chroma block into one or more chroma leaf blocks using the dual partition tree or the single partition tree. Said one or more luma leaf blocks and said one or more chroma leaf blocks are encoded or decoded.
    Type: Application
    Filed: September 23, 2020
    Publication date: November 17, 2022
    Inventors: Tzu-Der CHUANG, Ching-Yeh CHEN, Chih-Wei HSU, Yu-Wen HUANG
  • Publication number: 20220360298
    Abstract: A mobile device includes an NFC (Near Field Communication) antenna including a metal coil and a first dielectric substrate, a coupling metal element, and a second dielectric substrate. The metal coil is disposed on the first dielectric substrate. The coupling metal element is adjacent to the metal coil. The coupling metal element does not directly touch the metal coil. The coupling metal element is disposed on the second dielectric substrate. The coupling metal element is configured to adjust the operational frequency of the NFC antenna.
    Type: Application
    Filed: January 11, 2022
    Publication date: November 10, 2022
    Inventors: Ting-Han SHIH, Ching-Wen CHEN
  • Publication number: 20220357148
    Abstract: A three-dimensional (3D) sensing system for determining a 3D profile of an object and a method are provided. The 3D sensing system includes a first light source, a liquid crystal lens, a light detector and a control circuit. The first light source is configured to emit polarized light with a polarization setting for projecting a structured light pattern on the object. The liquid crystal lens in a polarization state allows incident light with the polarization setting to pass through and block incident light without the polarization setting from passing through. The light detector is configured to detect light reflected from the object and passing through the liquid crystal lens. When the 3D sensing system is in a 3D mode, the control circuit is configured to turn on the first light source and control the liquid crystal lens to enter the polarization state.
    Type: Application
    Filed: May 4, 2021
    Publication date: November 10, 2022
    Inventors: Wu-Feng Chen, Ching-Wen Wang, Cheng-Che Tsai, Hsueh-Tsung Lu
  • Patent number: 11493332
    Abstract: A three-dimensional (3D) sensing system for determining a 3D profile of an object and a method are provided. The 3D sensing system includes a liquid crystal lens, a structure light source and a control circuit. The structure light source is configured to emit a structure light pattern with a plurality of dots on the object through the liquid crystal lens. The control circuit is configured to control the liquid crystal lens to separate the plurality of dots under a separating mode, and the control circuit is configured to control the liquid crystal lens to overlap the plurality of dots under an overlapping mode.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: November 8, 2022
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Hsueh-Tsung Lu, Ching-Wen Wang, Cheng-Che Tsai, Wu-Feng Chen
  • Patent number: 11494926
    Abstract: A method for performing hybrid depth detection with aid of an adaptive projector and associated apparatus are provided. The method includes: utilizing an image processing circuit to obtain distance information; utilizing the image processing circuit to determine a distance range according to the distance information; utilizing the image processing circuit to perform projection type selection to determine at least one selected projection type corresponding to the distance range among multiple predetermined projection types; utilizing the adaptive projector to perform projection of the at least one selected projection type to capture at least one corresponding image with a camera, and utilizing the image processing circuit to perform depth detection according to corresponding image to generate depth map; and utilizing the image processing circuit to selectively output the depth map as resultant depth map or perform depth data combination to generate combined depth map as resultant depth map.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: November 8, 2022
    Assignees: HIMAX TECHNOLOGIES LIMITED, LIQXTAL TECHNOLOGY INC.
    Inventors: Biing-Seng Wu, Pen-Hsin Chen, Ching-Wen Wang, Cheng-Che Tsai, Hung-Shan Chen, Yi Hung, Ming-Syuan Chen, Hsueh-Tsung Lu, Wu-Feng Chen
  • Patent number: 11488878
    Abstract: Embodiments of mechanisms for testing a die package with multiple packaged dies on a package substrate use an interconnect substrate to provide electrical connections between dies and the package substrate and to provide probing structures (or pads). Testing structures, including daisy-chain structures, with metal lines to connect bonding structures connected to signals, power source, and/or grounding structures are connected to probing structures on the interconnect substrate. The testing structures enable determining the quality of bonding and/or functionalities of packaged dies bonded. After electrical testing is completed, the metal lines connecting the probing structures and the bonding structures are severed to allow proper function of devices in the die package. The mechanisms for forming test structures with probing pads on interconnect substrate and severing connecting metal lines after testing could reduce manufacturing cost.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: November 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Hua Chen, Chen-Shien Chen, Ching-Wen Hsiao
  • Patent number: 11480190
    Abstract: A fan module including a first body, a second body, a first fan assembly, a power module, and a second fan assembly is provided. The second body is slidably disposed at the first body to form a circulation space together. The first fan assembly is rotatably disposed at the first body and has sliding grooves. The power module is disposed in the first body and connected to the first fan assembly. The second fan assembly is rotatably disposed at the second body and has sliding portions, respectively and slidably disposed in corresponding sliding grooves. The power module is adapted to drive the first and second fan assemblies to rotate relative to the first body. A link module is adapted to drive the first and second bodies to relatively slide along an axial direction, so that the first and second fan assemblies are relatively separated or overlapped along the axial direction.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: October 25, 2022
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Han-Hsuan Tsai, Jui-Min Huang, Wei-Hao Lan, Chien-Chu Chen, Ching-Ya Tu, Chih-Wen Chiang, Ching-Tai Chang, Ken-Ping Lin, Yao-Lin Chang, Cheng-Ya Chi
  • Publication number: 20220336325
    Abstract: A semiconductor device includes a substrate and a first transistor on a first side of the substrate. The semiconductor device further includes a first electrode contacting a first region of the first transistor. The semiconductor device further includes a spacer extending along a sidewall of the first transistor. The semiconductor device further includes a self-aligned interconnect structure (SIS) separated from at least a portion of the first electrode by the spacer, wherein the SIS extends through the substrate. The semiconductor device further includes a second electrode contacting a surface of the first electrode farthest from the substrate, wherein the second electrode directly contacts the SIS.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 20, 2022
    Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Syuan CIOU, Hui-Zhong ZHUANG, Ching-Wei TSAI, Shang-Wen CHANG
  • Publication number: 20220335634
    Abstract: A depth processor including a region of interest determination circuit and a depth decoder is provided. The region of interest determination circuit is configured to determine a size of a region of interest of an input image. The depth decoder is coupled to the region of interest determination circuit and configured to generate a depth map of the input image according to a filter size. The filter size is set according to the size of the region of interest of the input image.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 20, 2022
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Hsueh-Tsung Lu, Ching-Wen Wang, Cheng-Che Tsai, Wu-Feng Chen
  • Patent number: 11475581
    Abstract: A depth processor including a region of interest determination circuit and a depth decoder is provided. The region of interest determination circuit is configured to determine a region of interest of an input image. The depth decoder is coupled to the region of interest determination circuit and configured to generate a depth map of the region of interest of the input image.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: October 18, 2022
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Hsueh-Tsung Lu, Ching-Wen Wang, Cheng-Che Tsai, Wu-Feng Chen
  • Publication number: 20220329874
    Abstract: Encoding methods and apparatuses include receiving input video data of a current block in a current picture and applying a Cross-Component Adaptive Loop Filter (CCALF) processing on the current block based on cross-component filter coefficients to refine chroma components of the current block according to luma sample values. The method further includes signaling two Adaptive Loop Filter (ALF) signal flags and two CCALF signal flags in an Adaptation Parameter Set (APS) with an APS parameter type equal to ALF or parsing two ALF signal flags and two CCALF signal flags from an APS with an APS parameter type equal to ALF, signaling or parsing one or more Picture Header (PH) CCALF syntax elements or Slice Header (SH) CCALF syntax elements, wherein both ALF and CCALF signaling are present either in a PH or SH, and encoding or decoding the current block in the current picture.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Inventors: Ching-Yeh CHEN, Olena CHUBACH, Chen-Yen LAI, Tzu-Der CHUANG, Chih-Wei HSU, Yu-Wen HUANG
  • Patent number: 11470348
    Abstract: Exemplary video processing methods and apparatuses for encoding or decoding a current block by bi-directional prediction. Multiple weight sets are utilized for blending List 0 and List 1 predictors, and the selection among multiple weight sets may be implicitly determined based on video information. Each weight set is composed of multiple candidate weights, and one candidate weight is selected for the current block. A weight pair associated with the selected weight for the current block is used for weighted averaging List 0 and List 1 predictors of the current block to generate a final inter predictor. The video processing methods and apparatuses encode or decode the current block according to the final inter predictor of the current block.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: October 11, 2022
    Assignee: HFI INNOVATION INC.
    Inventors: Yu-Chi Su, Ching-Yeh Chen, Yu-Wen Huang, Tzu-Der Chuang
  • Patent number: 11470356
    Abstract: A method and apparatus of video encoding video coding for a video encoder or decoder using Neural Network (NN) are disclosed. According to this method, the multiple frames in a video sequence comprises multiple segments, where each of the multiple segments comprises a set of frames. The NN (Neural Network) processing is applied to a target signal in one or more encoded frames of a target segment in the encoder side or to the target signal in one or more decoded frames of the target segment in the decoder side using one NN parameter set for the target segment. The target signal may correspond to reconstructed residual, reconstructed output, de-blocked output, SAO (sample adaptive offset) output, ALF (adaptive loop filter) output, or a combination thereof. In another embodiment, the NN processing is applied to a target signal only in one or more specific encoded or decoded frames.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: October 11, 2022
    Assignee: MEDIATEK INC.
    Inventors: Yu-Ling Hsiao, Yu-Chi Su, Jan Klopp, Ching-Yeh Chen, Tzu-Der Chuang, Chih-Wei Hsu, Yu-Wen Huang
  • Publication number: 20220310591
    Abstract: A semiconductor device includes a substrate and a first active region on a first side of the substrate. The semiconductor device further includes a first gate structure surrounding a first portion of the first active region. The semiconductor device further includes a second active region on a second side of the substrate, wherein the second side is opposite the first side. The semiconductor device further includes a second gate structure surrounding a first portion of the second active region. The semiconductor device further includes a gate via extending through the substrate, wherein the gate via directly connects to the first gate structure, and the gate via directly connects to the second gate structure.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 29, 2022
    Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Syuan CIOU, Hui-Zhong ZHUANG, Ching-Wei TSAI, Shang-Wen CHANG
  • Publication number: 20220301201
    Abstract: A depth processor including a region of interest determination circuit and a depth decoder is provided. The region of interest determination circuit is configured to determine a region of interest of an input image. The depth decoder is coupled to the region of interest determination circuit and configured to generate a depth map of the region of interest of the input image.
    Type: Application
    Filed: March 17, 2021
    Publication date: September 22, 2022
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Hsueh-Tsung Lu, Ching-Wen Wang, Cheng-Che Tsai, Wu-Feng Chen
  • Patent number: 11450751
    Abstract: An IC structure includes a source epitaxial structure, a drain epitaxial structure, a first silicide region, a second silicide region, a source contact, a backside via rail, a drain contact, and a front-side interconnection structure. The first silicide region is on a front-side surface and a first sidewall of the source epitaxial structure. The second silicide region is on a front-side surface of the drain epitaxial structure. The source contact is in contact with the first silicide region and has a protrusion extending past a backside surface of the source epitaxial structure. The backside via rail is in contact with the protrusion of the source contact. The drain contact is in contact with the second silicide region. The front-side interconnection structure is on a front-side surface of the source contact and a front-side surface of the drain contact.
    Type: Grant
    Filed: January 24, 2021
    Date of Patent: September 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Li-Zhen Yu, Chun-Yuan Chen, Cheng-Chi Chuang, Shang-Wen Chang, Yi-Hsun Chiu, Pei-Yu Wang, Ching-Wei Tsai, Chih-Hao Wang
  • Publication number: 20220294113
    Abstract: An antenna structure and an electronic device are provided. The antenna structure includes a first radiating member, a second radiating member, a grounding member, and a capacitance element. The first radiating member includes a first radiating part, a second radiating part, a feeding part, and a grounding part. The second radiating member is coupling to the first radiating member. The second radiating member includes a third radiating part and a main body part that are connected to each other. There is a first predetermined length between a feeding point of the feeding part and an open end of the second radiating part. There is an electrical length between a connection point where the main body part is electrically connected to the capacitance element and an open end of the third radiating part. The electrical length is greater than the first predetermined length.
    Type: Application
    Filed: September 13, 2021
    Publication date: September 15, 2022
    Inventors: CHENG-WEI CHIANG, CHING-WEN CHEN
  • Publication number: 20220285295
    Abstract: An organic interposer includes interconnect-level dielectric material layers embedding redistribution interconnect structures, at least one dielectric capping layer overlying a topmost interconnect-level dielectric material layer, a bonding-level dielectric layer overlying the at least one dielectric capping layer, and a dual-layer inductor structure, which may include a lower conductive coil embedded within the topmost interconnect-level dielectric material layer, a conductive via structure vertically extending through the at least one dielectric capping layer, and an upper conductive coil embedded within the bonding-level dielectric layer and comprising copper.
    Type: Application
    Filed: May 27, 2022
    Publication date: September 8, 2022
    Inventors: Wei-Han CHIANG, Ming-Da CHENG, Ching-Ho CHENG, Wei Sen CHANG, Hong-Seng SHUE, Ching-Wen HSIAO, Chun-Hung CHEN
  • Publication number: 20220283496
    Abstract: The present disclosure provides a photomask, including a plurality of pattern areas, each of the pattern areas is defined by a respective boundary, a first pattern area including a first mask feature, and a training area adjacent to a boundary of the pattern area, the training area comprising a first training feature, wherein the first training feature is comparable to the first mask feature.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 8, 2022
    Inventors: CHIEN-HUNG LAI, HAO-MING CHANG, HSUAN-WEN WANG, CHING-TING YANG, CHENG-KUANG CHEN, CHIEN-CHAO HUANG