Patents by Inventor Ching-Wen Wang

Ching-Wen Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220052035
    Abstract: A vertical electrostatic discharge protection device includes a heavily-doped semiconductor substrate, a first semiconductor epitaxial layer, a first doped buried layer, a second semiconductor epitaxial layer, a first doped well, at least one second doped well, and a first heavily-doped area. The epitaxial layers are stacked on the substrate. The first doped buried layer is formed in the first semiconductor epitaxial layer. The first doped well is formed in the second semiconductor epitaxial layer. The first doped well is formed on the first doped buried layer, and the doping concentration of the first doped well is lower than that of the first doped buried layer. The second doped well is formed in the second semiconductor epitaxial layer. The second doped well is adjacent to the first doped well.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 17, 2022
    Inventors: CHING-WEN WANG, CHIH-WEI CHEN, MEI-LIAN FAN, KUN-HSIEN LIN
  • Patent number: 11252386
    Abstract: A structured-light scanning system includes a plurality of switchable projectors that respectively generate emitted lights with a predetermined pattern, each switchable projector being capable of switchably generating either a two-dimensional (2D) emitted light or a three-dimensional (3D) emitted light; an optical alignment device that aligns the emitted lights to generate an aligned light, which is projected onto and reflected from a surface of an object, resulting in a reflected light; and an image sensor that detects the reflected light.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: February 15, 2022
    Assignee: Himax Technologies Limited
    Inventors: Wu-Feng Chen, Hsueh-Tsung Lu, Cheng-Che Tsai, Ching-Wen Wang
  • Publication number: 20210203894
    Abstract: A structured light projector and a method for structured light projection are disclosed. The structured light projector includes a projection module, a processor. The projection module is configured to project an optical pattern onto a region of space, and includes a light source, a diffractive optical element and a liquid crystal lens. The light source is configured to generate a light beam. The diffractive optical element is configured to convert the light beam into the optical pattern. The liquid crystal lens is interposed between the light source and the diffractive optical element, and is configured to collimate the light beam. The processor is configured to generate a control signal depending on an environment temperature of the projection module for controlling the liquid crystal lens.
    Type: Application
    Filed: October 14, 2020
    Publication date: July 1, 2021
    Inventors: Hsueh-Tsung LU, Ching-Wen WANG, Cheng-Che TSAI, Wu-Feng CHEN
  • Patent number: 10996483
    Abstract: A structured light projector and a method for structured light projection are disclosed. The structured light projector includes a projection module, an image sensor and a processor. The projection module is configured to project an optical pattern onto a region of space. The image sensor is configured to capture an image by detecting the optical pattern projected onto the region of space. The processor is configured to calculate disparity information of the optical pattern projected onto the region of space from the captured image, and is configured to compensate for the disparity of depending on an environment temperature of the projection module.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 4, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Ching-Wen Wang, Cheng-Che Tsai, Wu-Feng Chen, Yi-Hsiu Lin, Hsueh-Tsung Lu
  • Publication number: 20210086033
    Abstract: An improved structure of a long board of a swim fin does not use a plate in gradually changing thickness, but rather uses a fiberboard in fixed thickness. The fiberboard is provided with at least a first opening and at least a second opening arranged in line from small size to large size. The first opening can be triangular, and the second opening can be n-shaped, so that the mechanical strength of fiber flat plate changes gradually from one end to the other end. The plate effective thickness is changed gradually without time consuming processing technique. As such, the manufacturing time and cost are reduced, and consistent manufacturing quality is maintained.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 25, 2021
    Inventor: Ching-Wen WANG
  • Patent number: 10890442
    Abstract: A structured light projector and a method for structured light projection are disclosed. The structured light projector includes a projection module, a liquid crystal (LC) lens and a processor. The projection module is configured to project an optical pattern. The (LC) lens module is disposed over the projection module, and is configured to focus the optical pattern onto a region of space. The processor is configured to generate a control signal depending on an environment temperature of the projection module for controlling the LC lens.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: January 12, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Ching-Wen Wang, Cheng-Che Tsai, Wu-Feng Chen, Hsueh-Tsung Lu
  • Patent number: 10890839
    Abstract: The structured light imaging device includes a projector including a diffractive optical element, an image sensor, and a processing circuit. The processing circuit is configured to control the projector to emit a beam having a special pattern, and alter an amplitude of the beam during a sensing period. The image sensor is configured to capture an image corresponding to the beam during the sensing period, and transmits the image to the processing circuit. The processing circuit calculates a depth according to the image and a predetermined image having the special pattern. Therefore, the interference phenomenon is reduced.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: January 12, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Ching-Wen Wang, Cheng-Che Tsai, Tsai-Hsing Chen, Seng-Yu Huang, Wei-Cheng Lu, Hsueh-Tsung Lu
  • Patent number: 10784252
    Abstract: An ESD protection circuit, which protects a subject NMOS transistor coupled between an I/O pad and a ground, includes a first discharge device arranged between the I/O pad and the ground, having a trigger-on voltage that is lower than a breakdown voltage of the subject NMOS transistor; and a gate voltage control device, including a discharge NMOS transistor coupled to the ground and a gate of the subject NMOS transistor; a first PMOS transistor connected to the gate of the subject NMOS transistor and a connection node; and a first NMOS transistor connected to the connection node and the ground. The connection node is connected to the gate of the discharge NMOS transistor, and the gate of the first PMOS transistor and the gate of the first NMOS transistor are connected to each other.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: September 22, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang Huang, Li-Fan Chen, Chih-Hsuan Lin, Yu-Kai Wang, Hung-Wei Chen, Ching-Wen Wang, Ting-You Lin, Chun-Chih Chen
  • Publication number: 20200098740
    Abstract: An ESD protection circuit, which protects a subject NMOS transistor coupled between an I/O pad and a ground, includes a first discharge device arranged between the I/O pad and the ground, having a trigger-on voltage that is lower than a breakdown voltage of the subject NMOS transistor; and a gate voltage control device, including a discharge NMOS transistor coupled to the ground and a gate of the subject NMOS transistor; a first PMOS transistor connected to the gate of the subject NMOS transistor and a connection node; and a first NMOS transistor connected to the connection node and the ground. The connection node is connected to the gate of the discharge NMOS transistor, and the gate of the first PMOS transistor and the gate of the first NMOS transistor are connected to each other.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Li-Fan CHEN, Chih-Hsuan LIN, Yu-Kai WANG, Hung-Wei CHEN, Ching-Wen WANG, Ting-You LIN, Chun-Chih CHEN
  • Patent number: 10570947
    Abstract: A flipper screw includes a lower cover with a screw and a lower cover with nut, and it is used for fixing the web by replacing the anti-slip screw. The upper cover and the lower cover are provided with plural snap portion, which can be snapped in the rib around the screw hole, so as to avoid the web accidentally being released from the flipper.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: February 25, 2020
    Inventor: Ching-Wen Wang
  • Patent number: 10256201
    Abstract: A method for fabricating a bonding pad structure includes forming a dielectric layer on a substrate; forming a first metal pattern layer in the dielectric layer. The first metal pattern layer includes a first body portion having a plurality of first openings in a central region of the first body portion and a plurality of second openings arranged along a peripheral region of the first body portion and surrounding the plurality of first openings; and a plurality of first island portions correspondingly disposed in the plurality of second openings and spaced apart from the first body portion. The method further includes forming a plurality of first interconnect structures in the dielectric layer and corresponding to the plurality of first island portions; and forming a bonding pad on the dielectric layer and directly above the first metal pattern layer.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 9, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chi-Li Tu, Hung-Wei Chen, Shi-Hsiang Lu, Ching-Wen Wang
  • Patent number: 10058738
    Abstract: An improved structure of swimming equipment includes a swim fin shoe body, a holder, an assembling slot and a straight swim fin board. Two ends of the swim fin shoe body are provided with a tip and a heel respectively. The tip of the swim fin shoe body extends at an angle towards the front and underside of the swim fin shoe body to form the holder, and the front end of the holder is provided with the assembling slot. Two ends of the straight swim fin board are provided with a paddling section and a detachable assembling section assembled in the assembling slot. The assembling section and paddling section form a straight pattern jointly, so that the straight swim fin board tilts towards the front and underside of the swim fin shoe body along with the holder.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: August 28, 2018
    Inventor: Ching-Wen Wang
  • Patent number: 9997510
    Abstract: The invention provides a semiconductor device layout structure disposed in an active region. The semiconductor device layout structure includes a first well region having a first conduction type. A second well region having a second conduction type opposite the first conduction type is disposed adjacent to and enclosing the first well region. A first doped region having the second conduction type is disposed within the first well region. A second doped region having the second conduction type is disposed within the first well region. The second doped region is separated from and surrounds the first doped region. A third doped region having the second conduction type is disposed within the second well region.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: June 12, 2018
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chi-Li Tu, Ching-Wen Wang, Karuna Nidhi
  • Publication number: 20180122757
    Abstract: A method for fabricating a bonding pad structure includes forming a dielectric layer on a substrate; forming a first metal pattern layer in the dielectric layer. The first metal pattern layer includes a first body portion having a plurality of first openings in a central region of the first body portion and a plurality of second openings arranged along a peripheral region of the first body portion and surrounding the plurality of first openings; and a plurality of first island portions correspondingly disposed in the plurality of second openings and spaced apart from the first body portion. The method further includes forming a plurality of first interconnect structures in the dielectric layer and corresponding to the plurality of first island portions; and forming a bonding pad on the dielectric layer and directly above the first metal pattern layer.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 3, 2018
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chi-Li TU, Hung-Wei CHEN, Shi-Hsiang LU, Ching-Wen WANG
  • Patent number: 9929114
    Abstract: A bonding pad structure is provided. The structure includes a dielectric layer on a substrate. A bonding pad is disposed on the dielectric layer and a first metal pattern layer is embedded in the dielectric layer and directly below the bonding pad. The first metal pattern layer includes a first body portion and first island portions. The first body portion has first openings in a central region of the first body portion and second openings arranged along a peripheral region of the first body portion and surrounding the first openings. The first island portions are correspondingly disposed in the second openings and spaced apart from the first body portion. First interconnect structures are disposed in the dielectric layer and correspond to the first island portions, such that the bonding pad is electrically connected to the first island portions.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: March 27, 2018
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chi-Li Tu, Hung-Wei Chen, Shi-Hsiang Lu, Ching-Wen Wang
  • Publication number: 20170069620
    Abstract: The invention provides a semiconductor device layout structure disposed in an active region. The semiconductor device layout structure includes a first well region having a first conduction type. A second well region having a second conduction type opposite the first conduction type is disposed adjacent to and enclosing the first well region. A first doped region having the second conduction type is disposed within the first well region. A second doped region having the second conduction type is disposed within the first well region. The second doped region is separated from and surrounds the first doped region. A third doped region having the second conduction type is disposed within the second well region.
    Type: Application
    Filed: September 9, 2015
    Publication date: March 9, 2017
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chi-Li TU, Ching-Wen WANG, Karuna NIDHI
  • Publication number: 20140175963
    Abstract: A case assembly includes an upper case, a lower case, a pivot, a first shaft, a second shaft, and a stopper. The pivot is pivotally connected to the lower case, such that the upper case is able to rotate with respect to the lower case. The stopper has a shaft hole, a guiding slot hole, and a fixing slot hole. The shaft hole is disposed at one end of the stopper, and fixing slot hole is disposed at the other end of the stopper. The fixing slot hole communicates with the guiding slot hole. The first and the second shafts respectively insert into the shaft hole and the guiding slot hole. When the upper case rotates with respect to the lower case, the second shaft is stuck in the fixing slot hole from the guiding slot hole.
    Type: Application
    Filed: March 5, 2013
    Publication date: June 26, 2014
    Applicant: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Ching Wen Wang, Meng Fu Lu
  • Patent number: 8667651
    Abstract: A combined diving utensil has a buckling assembly, a seesaw and a fastening element. The buckling assembly includes a male buckle and a female buckle. Of which, one end of the female buckle is provided with an opening, and the other end provided with a mating joint. One end of the male buckle is provided with a threading portion, and the other end provided with an extension coupled with the mating joint. A plurality of ribs are set on one surface of the fastening element, which is set on the threading portion of the male buckle. A stopper is set close to the end of the fastening element. The seesaw is provided with a thrust rib plate, which is mated with a plurality of ribs on the fastening element and pivoted on the female buckle via the fulcrum.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: March 11, 2014
    Inventor: Ching-Wen Wang
  • Patent number: 8598639
    Abstract: A silicon photodiode with symmetry layout and deep well bias in CMOS technology is provided. The silicon photodiode includes a substrate, a deep well, and a PN diode structure. The deep well is disposed on the substrate, where an extra bias is applied to the deep well. The region surrounded by the deep well forms the main body of the silicon photodiode. The PN diode structure is located in the region surrounded by the deep well, where the silicon photodiode has a symmetry layout. The deep well is adopted when fabricating the silicon photodiode, and the extra bias is applied to the deep well to eliminate the interference and effect of the substrate absorbing light, and further greatly improve speed and bandwidth. Furthermore, the silicon photodiode has a symmetry layout, so that uniform electric field distribution is achieved, and the interference of the substrate noise is also reduced.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: December 3, 2013
    Assignee: National Central University
    Inventors: Yue-Ming Hsin, Fang-Ping Chou, Ching-Wen Wang, Guan-Yu Chen
  • Publication number: 20130205551
    Abstract: A combined diving utensil has a buckling assembly, a seesaw and a fastening element. The buckling assembly includes a male buckle and a female buckle. Of which, one end of the female buckle is provided with an opening, and the other end provided with a mating joint. One end of the male buckle is provided with a threading portion, and the other end provided with an extension coupled with the mating joint. A plurality of ribs are set on one surface of the fastening element, which is set on the threading portion of the male buckle. A stopper is set close to the end of the fastening element. The seesaw is provided with a thrust rib plate, which is mated with a plurality of ribs on the fastening element and pivoted on the female buckle via the fulcrum.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 15, 2013
    Inventor: Ching-Wen WANG